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Grissiom f51bce3fed add rm48x50 bsp and libcpu
We currently only support building with CCS and SCons is not using.
bsp/rm48x50/HALCoGen/HALCoGen.{hcg,dil} is the HALCoGen project file.
You may need to regenerate the source file as you like, providing that:

    1, IRQ is in Dispatch Mode and the table entry is IRQ_Handler. The
    channel 5 in enabled and connected to IRQ.

    2, RTI driver is enabled and compare3 source is selected to counter1
    and the compare3 will generate tick in the period of 10ms. This
    value is coresponding with RT_TICK_PER_SECOND in rtconfig.h.

In CCS, you need to create a new CCS project and create link folders
pointing at bsp/rm48x50, libcpu/arm/rm48x50 and src/, include/. Remember
to add the include path to the Build Properties.
2013-05-24 22:55:13 +08:00

98 lines
2.0 KiB
C

/** @file pom.h
* @brief POM Driver Definition File
* @date 23.May.2013
* @version 03.05.01
*
*/
/* (c) Texas Instruments 2009-2013, All rights reserved. */
#ifndef __POM_H__
#define __POM_H__
#include "reg_pom.h"
/* USER CODE BEGIN (0) */
/* USER CODE END */
/** @enum pom_region_size
* @brief Alias names for pom region size
* This enumeration is used to provide alias names for POM region size:
*/
enum pom_region_size
{
SIZE_32BYTES = 0U,
SIZE_64BYTES = 1U,
SIZE_128BYTES = 2U,
SIZE_256BYTES = 3U,
SIZE_512BYTES = 4U,
SIZE_1KB = 5U,
SIZE_2KB = 6U,
SIZE_4KB = 7U,
SIZE_8KB = 8U,
SIZE_16KB = 9U,
SIZE_32KB = 10U,
SIZE_64KB = 11U,
SIZE_128KB = 12U,
SIZE_256KB = 13U
};
/** @def INTERNAL_RAM
* @brief Alias name for Internal RAM
*/
#define INTERNAL_RAM 0x08000000U
/** @def SDRAM
* @brief Alias name for SD RAM
*/
#define SDRAM 0x80000000U
/** @def ASYNC_MEMORY
* @brief Alias name for Async RAM
*/
#define ASYNC_MEMORY 0x60000000U
typedef uint32 REGION_t;
/** @struct REGION_CONFIG_ST
* @brief POM region configuration
*/
typedef struct
{
uint32 Prog_Reg_Sta_Addr;
uint32 Ovly_Reg_Sta_Addr;
uint32 Reg_Size;
}REGION_CONFIG_t;
/* USER CODE BEGIN (1) */
/* USER CODE END */
/**
* @defgroup POM POM
* @brief Parameter Overlay Module.
*
* The POM provides a mechanism to redirect accesses to non-volatile memory into a volatile memory
* internal or external to the device. The data requested by the CPU will be fetched from the overlay memory
* instead of the main non-volatile memory.
*
* Related Files
* - reg_pom.h
* - pom.h
* - pom.c
* @addtogroup POM
* @{
*/
/* POM Interface Functions */
void POM_Region_Config(REGION_CONFIG_t *Reg_Config_Ptr,REGION_t Region_Num);
void POM_Reset(void);
void POM_Init(void);
void POM_Disable(void);
/**@}*/
#endif /* __POM_H_*/