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We currently only support building with CCS and SCons is not using. bsp/rm48x50/HALCoGen/HALCoGen.{hcg,dil} is the HALCoGen project file. You may need to regenerate the source file as you like, providing that: 1, IRQ is in Dispatch Mode and the table entry is IRQ_Handler. The channel 5 in enabled and connected to IRQ. 2, RTI driver is enabled and compare3 source is selected to counter1 and the compare3 will generate tick in the period of 10ms. This value is coresponding with RT_TICK_PER_SECOND in rtconfig.h. In CCS, you need to create a new CCS project and create link folders pointing at bsp/rm48x50, libcpu/arm/rm48x50 and src/, include/. Remember to add the include path to the Build Properties.
160 lines
3.8 KiB
C
160 lines
3.8 KiB
C
/** @file mibspi.h
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* @brief MIBSPI Driver Definition File
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* @date 23.May.2013
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* @version 03.05.01
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*
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*/
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/* (c) Texas Instruments 2009-2013, All rights reserved. */
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#ifndef __MIBSPI_H__
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#define __MIBSPI_H__
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#include "reg_mibspi.h"
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/** @enum triggerEvent
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* @brief Transfer Group Trigger Event
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*/
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enum triggerEvent
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{
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TRG_NEVER = 0U,
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TRG_RISING = 1U,
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TRG_FALLING = 2U,
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TRG_BOTH = 3U,
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TRG_HIGH = 5U,
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TRG_LOW = 6U,
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TRG_ALWAYS = 7U
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};
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/** @enum triggerSource
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* @brief Transfer Group Trigger Source
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*/
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enum triggerSource
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{
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TRG_DISABLED,
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TRG_GIOA0,
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TRG_GIOA1,
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TRG_GIOA2,
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TRG_GIOA3,
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TRG_GIOA4,
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TRG_GIOA5,
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TRG_GIOA6,
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TRG_GIOA7,
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TRG_HET1_8,
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TRG_HET1_10,
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TRG_HET1_12,
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TRG_HET1_14,
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TRG_HET1_16,
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TRG_HET1_18,
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TRG_TICK
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};
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/** @enum mibspiPinSelect
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* @brief mibspi Pin Select
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*/
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enum mibspiPinSelect
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{
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PIN_CS0 = 0U,
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PIN_CS1 = 1U,
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PIN_CS2 = 2U,
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PIN_CS3 = 3U,
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PIN_CS4 = 4U,
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PIN_CS5 = 5U,
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PIN_CS6 = 6U,
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PIN_CS7 = 7U,
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PIN_ENA = 8U,
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PIN_CLK = 9U,
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PIN_SIMO = 10U,
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PIN_SOMI = 11U,
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PIN_SIMO_1 = 17U,
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PIN_SIMO_2 = 18U,
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PIN_SIMO_3 = 19U,
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PIN_SIMO_4 = 20U,
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PIN_SIMO_5 = 21U,
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PIN_SIMO_6 = 22U,
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PIN_SIMO_7 = 23U,
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PIN_SOMI_1 = 25U,
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PIN_SOMI_2 = 26U,
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PIN_SOMI_3 = 27U,
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PIN_SOMI_4 = 28U,
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PIN_SOMI_5 = 29U,
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PIN_SOMI_6 = 30U,
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PIN_SOMI_7 = 31U
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};
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/** @enum chipSelect
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* @brief Transfer Group Chip Select
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*/
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enum chipSelect
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{
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CS_NONE = 0xFFU,
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CS_0 = 0xFEU,
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CS_1 = 0xFDU,
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CS_2 = 0xFBU,
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CS_3 = 0xF7U,
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CS_4 = 0xEFU,
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CS_5 = 0xDFU,
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CS_6 = 0xBFU,
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CS_7 = 0x7FU
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};
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/**
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* @defgroup MIBSPI MIBSPI
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* @brief Multi-Buffered Serial Peripheral Interface Module.
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*
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* The MibSPI/MibSPIP is a high-speed synchronous serial input/output port that allows a serial bit stream of
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* programmed length (2 to 16 bits) to be shifted in and out of the device at a programmed bit-transfer rate.
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* The MibSPI has a programmable buffer memory that enables programmed transmission to be completed
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* without CPU intervention
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*
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* Related Files
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* - reg_mibspi.h
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* - mibspi.h
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* - mibspi.c
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* @addtogroup MIBSPI
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* @{
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*/
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/* MIBSPI Interface Functions */
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void mibspiInit(void);
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void mibspiSetFunctional(mibspiBASE_t *mibspi, uint32 port);
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void mibspiSetData(mibspiBASE_t *mibspi, uint32 group, uint16 * data);
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uint32 mibspiGetData(mibspiBASE_t *mibspi, uint32 group, uint16 * data);
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void mibspiTransfer(mibspiBASE_t *mibspi, uint32 group);
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boolean mibspiIsTransferComplete(mibspiBASE_t *mibspi, uint32 group);
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void mibspiEnableGroupNotification(mibspiBASE_t *mibspi, uint32 group, uint32 level);
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void mibspiDisableGroupNotification(mibspiBASE_t *mibspi, uint32 group);
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void mibspiEnableLoopback(mibspiBASE_t *mibspi, loopBackType_t Loopbacktype);
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void mibspiDisableLoopback(mibspiBASE_t *mibspi);
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/** @fn void mibspiNotification(mibspiBASE_t *mibspi, uint32 flags)
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* @brief Error interrupt callback
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* @param[in] mibspi - mibSpi module base address
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* @param[in] flags - Copy of error interrupt flags
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*
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* This is a error callback that is provided by the application and is call upon
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* an error interrupt. The paramer passed to the callback is a copy of the error
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* interrupt flag register.
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*/
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void mibspiNotification(mibspiBASE_t *mibspi, uint32 flags);
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/** @fn void mibspiGroupNotification(mibspiBASE_t *mibspi, uint32 group)
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* @brief Transfer complete notification callback
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* @param[in] mibspi - mibSpi module base address
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* @param[in] group - Transfer group
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*
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* This is a callback function provided by the application. It is call when
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* a transfer is complete. The parameter is the transfer group that triggered
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* the interrupt.
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*/
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void mibspiGroupNotification(mibspiBASE_t *mibspi, uint32 group);
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/**@}*/
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#endif
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