316 lines
10 KiB
C
316 lines
10 KiB
C
/*!
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*******************************************************************************
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**
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** \file gd_spi.h
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**
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** \brief Serail Peripheral Interface driver.
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**
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** (C) Goke Microelectronics China 2007 - 2010
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**
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** \attention THIS SAMPLE CODE IS PROVIDED AS IS. HUNAN GOFORTUNE SEMICONDUCTOR
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** ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR
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** OMMISSIONS.
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**
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** \version \$Id: gd_spi.h,v 1.1 2013/11/21 01:27:52
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**
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*******************************************************************************
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*/
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#ifndef GD_SPI_H
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#define GD_SPI_H
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#include <gtypes.h>
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#include <gmodids.h>
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/*!
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*******************************************************************************
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**
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** \anchor gd_spi_error_base
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** \brief The base error code for the serial peripheral interface driver.
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**
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*******************************************************************************
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*/
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/*@{*/
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#define GD_SPI_ERR_BASE ( GD_SPI_MODULE_ID << 16)
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/*@}*/
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typedef enum
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{
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GD_SPI_CHANNEL_0 = 0,
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GD_SPI_CHANNEL_1,
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GD_SPI_CHANNEL_NUM
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}GD_SPI_CHANNEL_E;
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typedef enum
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{
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GD_SPI_SLAVE0 = 0,
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GD_SPI_SLAVE1,
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GD_SPI_SLAVE2,
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GD_SPI_SLAVE3,
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GD_SPI_SLAVE4,
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GD_SPI_SLAVE5,
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GD_SPI_SLAVE_NUM
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}GD_SPI_SLAVE_E;
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// TODO: to be confirmed for each clock value
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typedef enum
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{
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GD_SPI_FREQ_81M = 81000000,
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GD_SPI_FREQ_40M = 40000000,
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GD_SPI_FREQ_30M = 30000000,
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GD_SPI_FREQ_27M = 27000000,
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GD_SPI_FREQ_20M = 20000000,
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GD_SPI_FREQ_16M = 16000000,
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GD_SPI_FREQ_13M = 13500000,
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GD_SPI_FREQ_10M = 10000000,
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GD_SPI_FREQ_9M = 9000000,
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GD_SPI_FREQ_6M = 6000000,
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GD_SPI_FREQ_3M = 3000000,
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GD_SPI_FREQ_1M = 1000000,
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}GD_SPI_SPEED_MODE;
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typedef enum
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{
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SPI_POLARITY_MODE0 = 0,//!< Sclk low level,fisrt edge get data.
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SPI_POLARITY_MODE1,//!< Sclk low level,second edge get data.
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SPI_POLARITY_MODE2,//!< Sclk high level,first edge get data.
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SPI_POLARITY_MODE3,//!< Sclk high level,second edge get data.
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}GD_SPI_POLARITY_MODE;
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/*!
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*******************************************************************************
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**
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** \brief SPI driver error codes.
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**
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*******************************************************************************
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*/
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enum
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{
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GD_ERR_SPI_TYPE_NOT_SUPPORTED = GD_SPI_ERR_BASE, //!< Device not supported.
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GD_ERR_SPI_IN_USE, //!< Read error.
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GD_ERR_SPI_NOT_OPEN,
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GD_ERR_SPI_READ, //!< Read error.
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GD_ERR_SPI_WRITE, //!< Write error.
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GD_ERR_SPI_ERASE,
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GD_ERR_SPI_UNLOCK_FAIL,
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GD_ERR_SPI_INI_ERR,
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GD_ERR_SPI_BUSY,
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};
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/*!
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*******************************************************************************
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**
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** \brief SPI open parameter.
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**
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******************************************************************************/
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typedef enum
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{
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GD_SPI_UNUSED,
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GD_SPI_WRITE_ONLY,
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GD_SPI_READ_ONLY,
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GD_SPI_WRITE_READ,
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}GD_SPI_RW;
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typedef struct
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{
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/*! The connection parameters to be applied when open an instance of the
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driver.
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*/
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U8 spi;
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U8 slave;
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U8 csgpio;
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U8 polarity; //!< send and recive data mode
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U32 baudrate;
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GBOOL used_irq;
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} GD_SPI_OPEN_PARAMS_S;
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/*!
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*******************************************************************************
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**
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** \brief SPI ISR parameter.
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**
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******************************************************************************/
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typedef struct
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{
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/*! The connection parameters to be applied when used irq mode for the
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driver.
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*/
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U8 spi;
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U32 write_len;
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U32 read_len;
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U32 all_len;
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U32 wf_len;
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U32 rf_len;
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U32 w_xfer;
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U32 r_xfer;
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U8 bitpw;
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U8 finished;
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GD_SPI_RW rwmode;
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void* wbuf;
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void* rbuf;
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GD_HANDLE spihandle;
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GD_HANDLE spiIrqHandle;
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} GD_SPI_ISR_PARAMS_S;
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/*!
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*******************************************************************************
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**
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** \brief SPI global parameter.
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**
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******************************************************************************/
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typedef struct
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{
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U8 spi;
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U8 slave;
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U8 using;
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U8 polarity; //!< send and recive data mode
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U32 baudrate;
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GD_HANDLE cs;
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U8 datwidth;
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GBOOL used_irq;
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} GD_SPI_STATUS_PARAMS_S;
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/*!
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*******************************************************************************
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**
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** \brief SPI write parameter.
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**
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******************************************************************************/
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typedef struct
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{
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U32 wBitSet;
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U32 sBitSet;
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U32 eBitSet;
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U32 wipMask;
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U32 address;
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} GD_SPI_WR_PARAMS_S;
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typedef struct
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{
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U8 readID; // command to read the chip identification
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U8 writeEnable; // command to enable a write/erase sequence
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U8 writeDisable; // command to disable a write/erase sequence
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U8 readStatus; // command to read from status register
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U8 writeStatus; // command to write to status register
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U8 readData; // command to read data
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U8 readDataFast; // command to read data in fast mode
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U8 eraseSector; // command to erase a single sector
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U8 eraseChip; // command to erase the entire chip
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U8 programPage; // command to program a sector page
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U32 statusMaskWIP; // status register mask for bit write-in-progress
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U32 statusMaskWEL; // status register mask for bit write-enable-latch
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U8 readIO2; // command to read data by IO2
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U8 readIO4; // command to read data by IO4
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U8 programPage2; // command to program a sector page by IO2
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U8 programPage4; // command to program a sector page by IO4
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}
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GD_SPI_CMD_S;
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/*
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*******************************************************************
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* sflash cmd attribute
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* sflash cmd register bit definition
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* bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
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| rsrd | hold time | transfer data bytes |data cycle|adr and dummy cycle | cmd cycle |
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00-100ns 11111 -- 4 bytes 00 -x1
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01-3us other(e.g.,n) -- n bytes 0-3 cycle 0-3 cycle 01 -x2
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10-100us 10 -x4
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bit 16 15 14 13 12 11 10 9 8 [7: 0]
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| RWN | dummy cycle number | adr byte num | | cmd to DF |
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00 - rd data for SF 0 - 7 bytes cycle 0-7 bytes 1 - send cmd
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01 - wr data to SF 0 - no send cmd see specific flash cmd
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11 - nothing to do
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********************************************************************
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*/
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/* send cmd or not [8]*/
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#define SPI_SEND_CMD 0x00000100
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#define SPI_NO_SEND_CMD 0x00000000
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/* byte number of address to send [11:9]*/
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#define SPI_SEND_ADDR_BYTE_NUM_0 0x00000000
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#define SPI_SEND_ADDR_BYTE_NUM_1 0x00000200
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#define SPI_SEND_ADDR_BYTE_NUM_2 0x00000400
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#define SPI_SEND_ADDR_BYTE_NUM_3 0x00000600
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#define SPI_SEND_ADDR_BYTE_NUM_4 0x00000800
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#define SPI_SEND_ADDR_BYTE_NUM_5 0x00000a00
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#define SPI_SEND_ADDR_BYTE_NUM_6 0x00000c00
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#define SPI_SEND_ADDR_BYTE_NUM_7 0x00000e00
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/*Byte number of dummy cycle to send [14:12]*/
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#define SPI_SEND_DUMMY_BYTE_NUM_0 0x00000000
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#define SPI_SEND_DUMMY_BYTE_NUM_1 0x00001000
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#define SPI_SEND_DUMMY_BYTE_NUM_2 0x00002000
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#define SPI_SEND_DUMMY_BYTE_NUM_3 0x00003000
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#define SPI_SEND_DUMMY_BYTE_NUM_4 0x00004000
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#define SPI_SEND_DUMMY_BYTE_NUM_5 0x00005000
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#define SPI_SEND_DUMMY_BYTE_NUM_6 0x00006000
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#define SPI_SEND_DUMMY_BYTE_NUM_7 0x00007000
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/* Command operation[16:15]: 00 for read data from SPI; 01 for write data to SPI; 11 for nothing to do */
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#define SPI_RWN_READ 0x00000000
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#define SPI_RWN_WRITE 0x00008000
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#define SPI_RWN_NOTHING 0x00018000
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/*I/O mode of command cycle to SF[18:17]: 00 for x1; 01 for x2; 10 for x4*/
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#define SPI_CMD_MODE_1X 0x00000000
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#define SPI_CMD_MODE_2X 0x00020000
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#define SPI_CMD_MODE_4X 0x00040000
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/* I/O mode of address and dummy cycle to SF[20:19]*/
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#define SPI_ADDR_DUMMY_CYCLE_NUM_0 0x00000000
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#define SPI_ADDR_DUMMY_CYCLE_NUM_1 0x00080000
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#define SPI_ADDR_DUMMY_CYCLE_NUM_2 0x00100000
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#define SPI_ADDR_DUMMY_CYCLE_NUM_3 0x00180000
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/*I/O mode of data cycle to or from SF [22:21] */
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#define SPI_DATA_CYCLE_NUM_0 0x00000000
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#define SPI_DATA_CYCLE_NUM_1 0x00200000
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#define SPI_DATA_CYCLE_NUM_2 0x00400000
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#define SPI_DATA_CYCLE_NUM_3 0x00600000
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/*Transfer data byte number to or from SF[27:23]. For 11111 case, transfer 4bytes per request. For other case, transfer number bytes.*/
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#define SPI_TRANSFER_BYTE_NUM_4 0x0f800000
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#define SPI_TRANSFER_BYTE_LOC 23
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#define SPI_HOLD_TIME_100ns 0x00000000
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#define SPI_HOLD_TIME_3us 0x10000000
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#define SPI_HOLD_TIME_100us 0x20000000
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/*
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*******************************************************************************
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*******************************************************************************
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**
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** Generic serial flash specific API functions
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**
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*******************************************************************************
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*******************************************************************************
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*/
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#ifdef __cplusplus
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extern "C" {
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#endif
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GERR GD_SPI_Init( void );
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GERR GD_SPI_Exit( void );
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GERR GD_SPI_Open( GD_SPI_OPEN_PARAMS_S *openParamsP, GD_HANDLE* pHandle );
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GERR GD_SPI_Close( GD_HANDLE* pHandle );
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GERR GD_SPI_WriteWords( GD_HANDLE handle, U16* wbuffer, U32 w_words );
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GERR GD_SPI_WriteThenReadWords( GD_HANDLE handle, U16* wbuffer, U32 w_words, U16* rbuffer, U32 r_words );
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GERR GD_SPI_WriteBytes( GD_HANDLE handle, U8* wbuffer, U32 w_size );
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GERR GD_SPI_WriteThenReadBytes( GD_HANDLE handle, U8* wbuffer, U32 w_size, U8* rbuffer, U32 r_size );
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GERR GD_SPI_GetDevice(GD_HANDLE handle);
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GERR GD_SPI_ReleaseDevice(GD_HANDLE handle);
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GERR GD_SPI_SetDatFormat(GD_HANDLE handle, U8 dat_width);
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#ifdef __cplusplus
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}
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#endif
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#endif
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