97 lines
2.4 KiB
C
97 lines
2.4 KiB
C
/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2018-03-22 quanzhao first version
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*/
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#ifndef __PLATFORM_H__
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#define __PLATFORM_H__
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#include <rthw.h>
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#include <rtthread.h>
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/* SOC-relative definitions */
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//#include "realview.h"
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#include "gic_registers.h"
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#include "irq_numbers.h"
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/* the maximum number of gic */
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# define ARM_GIC_MAX_NR 1
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/* the maximum number of interrupts */
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#define ARM_GIC_NR_IRQS IMX_INTERRUPT_COUNT
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/* the maximum entries of the interrupt table */
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#define MAX_HANDLERS IMX_INTERRUPT_COUNT
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/* the basic constants needed by gic */
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rt_inline rt_uint32_t platform_get_gic_dist_base(void)
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{
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rt_uint32_t gic_base;
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asm volatile ("mrc p15, 4, %0, c15, c0, 0" : "=r"(gic_base));
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return gic_base + kGICDBaseOffset;
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}
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rt_inline rt_uint32_t platform_get_gic_cpu_base(void)
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{
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rt_uint32_t gic_base;
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asm volatile ("mrc p15, 4, %0, c15, c0, 0" : "=r"(gic_base));
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return gic_base + kGICCBaseOffset;
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}
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#define GIC_IRQ_START 0
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#define GIC_ACK_INTID_MASK 0x000003ff
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/* the definition needed by gic.c */
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#define __REG32(x) (*((volatile unsigned int *)(x)))
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/* keep compatible with platform SDK */
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typedef enum {
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CPU_0,
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CPU_1,
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CPU_2,
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CPU_3,
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} cpuid_e;
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enum _gicd_sgi_filter
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{
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//! Forward the interrupt to the CPU interfaces specified in the @a target_list parameter.
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kGicSgiFilter_UseTargetList = 0,
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//! Forward the interrupt to all CPU interfaces except that of the processor that requested
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//! the interrupt.
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kGicSgiFilter_AllOtherCPUs = 1,
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//! Forward the interrupt only to the CPU interface of the processor that requested the
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//! interrupt.
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kGicSgiFilter_OnlyThisCPU = 2
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};
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typedef void (*irq_hdlr_t) (void);
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extern void rt_hw_interrupt_mask(int vector);
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extern void rt_hw_interrupt_umask(int vector);
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extern rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
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void *param, const char *name);
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rt_inline void register_interrupt_routine(uint32_t irq_id, irq_hdlr_t isr)
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{
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rt_hw_interrupt_install(irq_id, (rt_isr_handler_t)isr, NULL, "unknown");
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}
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rt_inline void enable_interrupt(uint32_t irq_id, uint32_t cpu_id, uint32_t priority)
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{
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rt_hw_interrupt_umask(irq_id);
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}
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rt_inline void disable_interrupt(uint32_t irq_id, uint32_t cpu_id)
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{
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rt_hw_interrupt_mask(irq_id);
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}
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#endif /* __PLATFORM_H__ */
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