215 lines
6.5 KiB
C
215 lines
6.5 KiB
C
/*
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* Copyright (c) 2016, Freescale Semiconductor, Inc.
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* Copyright 2016-2019 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "fsl_wdog.h"
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/* Component ID definition, used by tools. */
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#ifndef FSL_COMPONENT_ID
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#define FSL_COMPONENT_ID "platform.drivers.wdog01"
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#endif
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/*******************************************************************************
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* Variables
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******************************************************************************/
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static WDOG_Type *const s_wdogBases[] = WDOG_BASE_PTRS;
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#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
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/* Array of WDOG clock name. */
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static const clock_ip_name_t s_wdogClock[] = WDOG_CLOCKS;
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#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
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static const IRQn_Type s_wdogIRQ[] = WDOG_IRQS;
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/*******************************************************************************
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* Code
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******************************************************************************/
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static uint32_t WDOG_GetInstance(WDOG_Type *base)
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{
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uint32_t instance;
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/* Find the instance index from base address mappings. */
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for (instance = 0; instance < ARRAY_SIZE(s_wdogBases); instance++)
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{
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if (s_wdogBases[instance] == base)
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{
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break;
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}
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}
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assert(instance < ARRAY_SIZE(s_wdogBases));
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return instance;
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}
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/*!
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* brief Initializes the WDOG configuration structure.
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*
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* This function initializes the WDOG configuration structure to default values. The default
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* values are as follows.
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* code
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* wdogConfig->enableWdog = true;
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* wdogConfig->workMode.enableWait = true;
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* wdogConfig->workMode.enableStop = false;
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* wdogConfig->workMode.enableDebug = false;
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* wdogConfig->enableInterrupt = false;
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* wdogConfig->enablePowerdown = false;
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* wdogConfig->resetExtension = flase;
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* wdogConfig->timeoutValue = 0xFFU;
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* wdogConfig->interruptTimeValue = 0x04u;
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* endcode
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*
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* param config Pointer to the WDOG configuration structure.
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* see wdog_config_t
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*/
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void WDOG_GetDefaultConfig(wdog_config_t *config)
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{
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assert(NULL != config);
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/* Initializes the configure structure to zero. */
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(void)memset(config, 0, sizeof(*config));
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config->enableWdog = true;
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config->workMode.enableWait = false;
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config->workMode.enableStop = false;
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config->workMode.enableDebug = false;
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config->enableInterrupt = false;
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config->softwareResetExtension = false;
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config->enablePowerDown = false;
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config->timeoutValue = 0xffu;
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config->interruptTimeValue = 0x04u;
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config->enableTimeOutAssert = false;
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}
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/*!
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* brief Initializes the WDOG.
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*
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* This function initializes the WDOG. When called, the WDOG runs according to the configuration.
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*
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* This is an example.
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* code
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* wdog_config_t config;
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* WDOG_GetDefaultConfig(&config);
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* config.timeoutValue = 0xffU;
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* config->interruptTimeValue = 0x04u;
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* WDOG_Init(wdog_base,&config);
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* endcode
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*
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* param base WDOG peripheral base address
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* param config The configuration of WDOG
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*/
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void WDOG_Init(WDOG_Type *base, const wdog_config_t *config)
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{
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assert(NULL != config);
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uint16_t value = 0u;
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uint32_t primaskValue = 0U;
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value = WDOG_WCR_WDE(config->enableWdog) | WDOG_WCR_WDW(config->workMode.enableWait) |
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WDOG_WCR_WDZST(config->workMode.enableStop) | WDOG_WCR_WDBG(config->workMode.enableDebug) |
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WDOG_WCR_SRE(config->softwareResetExtension) | WDOG_WCR_WT(config->timeoutValue) |
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WDOG_WCR_WDT(config->enableTimeOutAssert) | WDOG_WCR_SRS_MASK | WDOG_WCR_WDA_MASK;
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#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
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/* Set configuration */
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CLOCK_EnableClock(s_wdogClock[WDOG_GetInstance(base)]);
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#endif
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primaskValue = DisableGlobalIRQ();
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base->WICR = WDOG_WICR_WICT(config->interruptTimeValue) | WDOG_WICR_WIE(config->enableInterrupt);
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base->WMCR = WDOG_WMCR_PDE(config->enablePowerDown);
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base->WCR = value;
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EnableGlobalIRQ(primaskValue);
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if (config->enableInterrupt)
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{
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(void)EnableIRQ(s_wdogIRQ[WDOG_GetInstance(base)]);
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}
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}
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/*!
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* brief Shuts down the WDOG.
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*
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* This function shuts down the WDOG.
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* Watchdog Enable bit is a write one once only bit. It is not
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* possible to clear this bit by a software write, once the bit is set.
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* This bit(WDE) can be set/reset only in debug mode(exception).
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*/
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void WDOG_Deinit(WDOG_Type *base)
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{
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if (0U != (base->WCR & WDOG_WCR_WDBG_MASK))
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{
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WDOG_Disable(base);
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}
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}
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/*!
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* brief Gets the WDOG all reset status flags.
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*
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* This function gets all reset status flags.
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*
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* code
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* uint16_t status;
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* status = WDOG_GetStatusFlags (wdog_base);
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* endcode
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* param base WDOG peripheral base address
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* return State of the status flag: asserted (true) or not-asserted (false).see _wdog_status_flags
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* - true: a related status flag has been set.
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* - false: a related status flag is not set.
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*/
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uint16_t WDOG_GetStatusFlags(WDOG_Type *base)
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{
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uint16_t status_flag = 0U;
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status_flag |= (base->WCR & WDOG_WCR_WDE_MASK);
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status_flag |= (base->WRSR & WDOG_WRSR_POR_MASK);
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status_flag |= (base->WRSR & WDOG_WRSR_TOUT_MASK);
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status_flag |= (base->WRSR & WDOG_WRSR_SFTW_MASK);
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status_flag |= (base->WICR & WDOG_WICR_WTIS_MASK);
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return status_flag;
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}
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/*!
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* brief Clears the WDOG flag.
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*
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* This function clears the WDOG status flag.
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*
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* This is an example for clearing the interrupt flag.
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* code
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* WDOG_ClearStatusFlags(wdog_base,KWDOG_InterruptFlag);
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* endcode
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* param base WDOG peripheral base address
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* param mask The status flags to clear.
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* The parameter could be any combination of the following values.
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* kWDOG_TimeoutFlag
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*/
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void WDOG_ClearInterruptStatus(WDOG_Type *base, uint16_t mask)
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{
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if (0U != (mask & (uint16_t)kWDOG_InterruptFlag))
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{
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base->WICR |= WDOG_WICR_WTIS_MASK;
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}
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}
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/*!
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* brief Refreshes the WDOG timer.
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*
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* This function feeds the WDOG.
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* This function should be called before the WDOG timer is in timeout. Otherwise, a reset is asserted.
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*
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* param base WDOG peripheral base address
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*/
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void WDOG_Refresh(WDOG_Type *base)
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{
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uint32_t primaskValue = 0U;
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/* Disable the global interrupt to protect refresh sequence */
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primaskValue = DisableGlobalIRQ();
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base->WSR = WDOG_REFRESH_KEY & 0xFFFFU;
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base->WSR = (WDOG_REFRESH_KEY >> 16U) & 0xFFFFU;
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EnableGlobalIRQ(primaskValue);
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}
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