555 lines
24 KiB
C
555 lines
24 KiB
C
/*
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* Copyright 2017-2020 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef _FSL_ROMAPI_H_
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#define _FSL_ROMAPI_H_
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#include "fsl_common.h"
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/*!
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* @addtogroup romapi
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* @{
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*/
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/*! @brief ROMAPI version 1.1.0. */
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#define FSL_ROM_ROMAPI_VERSION (MAKE_VERSION(1U, 1U, 0U))
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/*! @brief ROM FLEXSPI NOR driver version 1.4.0. */
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#define FSL_ROM_FLEXSPINOR_DRIVER_VERSION (MAKE_VERSION(1U, 4U, 0U))
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/*!
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* @name Common ROMAPI fearures info defines
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* @{
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*/
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/* @brief ROM has FLEXSPI NOR API. */
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#define FSL_ROM_HAS_FLEXSPINOR_API (1)
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/* @brief ROM has run bootloader API. */
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#define FSL_ROM_HAS_RUNBOOTLOADER_API (0)
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/* @brief ROM has FLEXSPI NOR get config API. */
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#define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_GET_CONFIG (0)
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/* @brief ROM has flash init API. */
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#define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_FLASH_INIT (1)
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/* @brief ROM has erase API. */
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#define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE (1)
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/* @brief ROM has erase sector API. */
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#define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_SECTOR (1)
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/* @brief ROM has erase block API. */
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#define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_BLOCK (1)
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/* @brief ROM has erase all API. */
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#define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_ALL (0)
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/* @brief ROM has page program API. */
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#define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_PAGE_PROGRAM (1)
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/* @brief ROM has update lut API. */
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#define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_UPDATE_LUT (1)
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/* @brief ROM has FLEXSPI command API. */
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#define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_CMD_XFER (1)
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/*@}*/
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#define kROM_StatusGroup_FLEXSPI 60U /*!< ROM FLEXSPI status group number.*/
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#define kROM_StatusGroup_FLEXSPINOR 200U /*!< ROM FLEXSPI NOR status group number.*/
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#define FSL_ROM_FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) \
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(FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | \
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FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1))
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/*! @brief Generate bit mask */
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#define FSL_ROM_FLEXSPI_BITMASK(bit_offset) (1U << (bit_offset))
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/*! @brief FLEXSPI memory config block related defintions */
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#define FLEXSPI_CFG_BLK_TAG (0x42464346UL) /*!< ascii "FCFB" Big Endian */
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#define FLEXSPI_CFG_BLK_VERSION (0x56010400UL) /*!< V1.4.0 */
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#define CMD_SDR 0x01U
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#define CMD_DDR 0x21U
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#define RADDR_SDR 0x02U
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#define RADDR_DDR 0x22U
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#define CADDR_SDR 0x03U
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#define CADDR_DDR 0x23U
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#define MODE1_SDR 0x04U
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#define MODE1_DDR 0x24U
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#define MODE2_SDR 0x05U
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#define MODE2_DDR 0x25U
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#define MODE4_SDR 0x06U
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#define MODE4_DDR 0x26U
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#define MODE8_SDR 0x07U
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#define MODE8_DDR 0x27U
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#define WRITE_SDR 0x08U
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#define WRITE_DDR 0x28U
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#define READ_SDR 0x09U
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#define READ_DDR 0x29U
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#define LEARN_SDR 0x0AU
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#define LEARN_DDR 0x2AU
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#define DATSZ_SDR 0x0BU
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#define DATSZ_DDR 0x2BU
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#define DUMMY_SDR 0x0CU
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#define DUMMY_DDR 0x2CU
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#define DUMMY_RWDS_SDR 0x0DU
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#define DUMMY_RWDS_DDR 0x2DU
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#define JMP_ON_CS 0x1FU
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#define STOP 0U
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#define FLEXSPI_1PAD 0U
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#define FLEXSPI_2PAD 1U
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#define FLEXSPI_4PAD 2U
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#define FLEXSPI_8PAD 3U
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/*!
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* NOR LUT sequence index used for default LUT assignment
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* NOTE:
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* The will take effect if the lut sequences are not customized.
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*/
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#define NOR_CMD_LUT_SEQ_IDX_READ 0U /*!< READ LUT sequence id in lookupTable stored in config block */
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#define NOR_CMD_LUT_SEQ_IDX_READSTATUS 1U /*!< Read Status LUT sequence id in lookupTable stored in config block */
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#define NOR_CMD_LUT_SEQ_IDX_READSTATUS_XPI \
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2U /*!< Read status DPI/QPI/OPI sequence id in lookupTable stored in config block */
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#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE 3U /*!< Write Enable sequence id in lookupTable stored in config block */
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#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE_XPI \
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4U /*!< Write Enable DPI/QPI/OPI sequence id in lookupTable stored in config block */
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#define NOR_CMD_LUT_SEQ_IDX_ERASESECTOR 5U /*!< Erase Sector sequence id in lookupTable stored in config block */
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#define NOR_CMD_LUT_SEQ_IDX_READID 7U
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#define NOR_CMD_LUT_SEQ_IDX_ERASEBLOCK 8U /*!< Erase Block sequence id in lookupTable stored in config block */
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#define NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM 9U /*!< Program sequence id in lookupTable stored in config block */
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#define NOR_CMD_LUT_SEQ_IDX_CHIPERASE 11U /*!< Chip Erase sequence in lookupTable id stored in config block */
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#define NOR_CMD_LUT_SEQ_IDX_READ_SFDP 13U /*!< Read SFDP sequence in lookupTable id stored in config block */
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#define NOR_CMD_LUT_SEQ_IDX_RESTORE_NOCMD \
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14U /*!< Restore 0-4-4/0-8-8 mode sequence id in lookupTable stored in config block */
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#define NOR_CMD_LUT_SEQ_IDX_EXIT_NOCMD \
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15U /*!< Exit 0-4-4/0-8-8 mode sequence id in lookupTable stored in config blobk */
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/*!
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* @name Support for init FLEXSPI NOR configuration
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* @{
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*/
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/*! @brief Flash Pad Definitions */
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enum
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{
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kSerialFlash_1Pad = 1U,
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kSerialFlash_2Pads = 2U,
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kSerialFlash_4Pads = 4U,
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kSerialFlash_8Pads = 8U,
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};
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/*! @brief FLEXSPI clock configuration type */
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enum
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{
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kFLEXSPIClk_SDR, /*!< Clock configure for SDR mode */
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kFLEXSPIClk_DDR, /*!< Clock configurat for DDR mode */
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};
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/*! @brief FLEXSPI Read Sample Clock Source definition */
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typedef enum _flexspi_read_sample_clk
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{
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kFLEXSPIReadSampleClk_LoopbackInternally = 0U,
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kFLEXSPIReadSampleClk_LoopbackFromDqsPad = 1U,
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kFLEXSPIReadSampleClk_LoopbackFromSckPad = 2U,
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kFLEXSPIReadSampleClk_ExternalInputFromDqsPad = 3U,
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} flexspi_read_sample_clk_t;
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/*! @brief Flash Type Definition */
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enum
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{
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kFLEXSPIDeviceType_SerialNOR = 1U, /*!< Flash device is Serial NOR */
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};
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/*! @brief Flash Configuration Command Type */
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enum
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{
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kDeviceConfigCmdType_Generic, /*!< Generic command, for example: configure dummy cycles, drive strength, etc */
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kDeviceConfigCmdType_QuadEnable, /*!< Quad Enable command */
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kDeviceConfigCmdType_Spi2Xpi, /*!< Switch from SPI to DPI/QPI/OPI mode */
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kDeviceConfigCmdType_Xpi2Spi, /*!< Switch from DPI/QPI/OPI to SPI mode */
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kDeviceConfigCmdType_Spi2NoCmd, /*!< Switch to 0-4-4/0-8-8 mode */
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kDeviceConfigCmdType_Reset, /*!< Reset device command */
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};
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/*! @brief Defintions for FLEXSPI Serial Clock Frequency */
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typedef enum _flexspi_serial_clk_freq
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{
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kFLEXSPISerialClk_NoChange = 0U,
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kFLEXSPISerialClk_30MHz = 1U,
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kFLEXSPISerialClk_50MHz = 2U,
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kFLEXSPISerialClk_60MHz = 3U,
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kFLEXSPISerialClk_75MHz = 4U,
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kFLEXSPISerialClk_80MHz = 5U,
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kFLEXSPISerialClk_100MHz = 6U,
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kFLEXSPISerialClk_133MHz = 7U,
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kFLEXSPISerialClk_166MHz = 8U,
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kFLEXSPISerialClk_200MHz = 9U,
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} flexspi_serial_clk_freq_t;
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/*! @brief Misc feature bit definitions */
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enum
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{
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kFLEXSPIMiscOffset_DiffClkEnable = 0U, /*!< Bit for Differential clock enable */
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kFLEXSPIMiscOffset_Ck2Enable = 1U, /*!< Bit for CK2 enable */
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kFLEXSPIMiscOffset_ParallelEnable = 2U, /*!< Bit for Parallel mode enable */
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kFLEXSPIMiscOffset_WordAddressableEnable = 3U, /*!< Bit for Word Addressable enable */
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kFLEXSPIMiscOffset_SafeConfigFreqEnable = 4U, /*!< Bit for Safe Configuration Frequency enable */
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kFLEXSPIMiscOffset_PadSettingOverrideEnable = 5U, /*!< Bit for Pad setting override enable */
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kFLEXSPIMiscOffset_DdrModeEnable = 6U, /*!< Bit for DDR clock confiuration indication. */
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kFLEXSPIMiscOffset_UseValidTimeForAllFreq = 7U, /*!< Bit for DLLCR settings under all modes */
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};
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/*@}*/
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/*!
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* @name FLEXSPI NOR Configuration
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* @{
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*/
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/*! @brief FLEXSPI LUT Sequence structure */
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typedef struct _flexspi_lut_seq
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{
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uint8_t seqNum; /*!< Sequence Number, valid number: 1-16 */
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uint8_t seqId; /*!< Sequence Index, valid number: 0-15 */
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uint16_t reserved;
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} flexspi_lut_seq_t;
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typedef struct
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{
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uint8_t time_100ps; /*!< Data valid time, in terms of 100ps */
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uint8_t delay_cells; /*!< Data valid time, in terms of delay cells */
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} flexspi_dll_time_t;
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/*! @brief FLEXSPI Memory Configuration Block */
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typedef struct _flexspi_mem_config
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{
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uint32_t tag; /*!< [0x000-0x003] Tag, fixed value 0x42464346UL */
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uint32_t version; /*!< [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor, [7:0] - bugfix */
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uint32_t reserved0; /*!< [0x008-0x00b] Reserved for future use */
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uint8_t readSampleClkSrc; /*!< [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3 */
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uint8_t csHoldTime; /*!< [0x00d-0x00d] Data hold time, default value: 3 */
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uint8_t csSetupTime; /*!< [0x00e-0x00e] Date setup time, default value: 3 */
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uint8_t columnAddressWidth; /*!< [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed to 3, For
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Serial NAND, need to refer to datasheet */
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uint8_t deviceModeCfgEnable; /*!< [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 - Disable */
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uint8_t deviceModeType; /*!< [0x011-0x011] Specify the configuration command type:Quad Enable, DPI/QPI/OPI switch,
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Generic configuration, etc. */
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uint16_t waitTimeCfgCommands; /*!< [0x012-0x013] Wait time for all configuration commands, unit: 100us, Used for
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DPI/QPI/OPI switch or reset command */
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flexspi_lut_seq_t deviceModeSeq; /*!< [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id, [15:8] - LUt
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sequence number, [31:16] Reserved */
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uint32_t deviceModeArg; /*!< [0x018-0x01b] Argument/Parameter for device configuration */
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uint8_t configCmdEnable; /*!< [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable */
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uint8_t configModeType[3]; /*!< [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe */
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flexspi_lut_seq_t
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configCmdSeqs[3]; /*!< [0x020-0x02b] Sequence info for Device Configuration command, similar as deviceModeSeq */
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uint32_t reserved1; /*!< [0x02c-0x02f] Reserved for future use */
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uint32_t configCmdArgs[3]; /*!< [0x030-0x03b] Arguments/Parameters for device Configuration commands */
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uint32_t reserved2; /*!< [0x03c-0x03f] Reserved for future use */
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uint32_t controllerMiscOption; /*!< [0x040-0x043] Controller Misc Options, see Misc feature bit definitions for more
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details */
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uint8_t deviceType; /*!< [0x044-0x044] Device Type: See Flash Type Definition for more details */
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uint8_t sflashPadType; /*!< [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8 - Octal */
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uint8_t serialClkFreq; /*!< [0x046-0x046] Serial Flash Frequencey, device specific definitions, See System Boot
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Chapter for more details */
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uint8_t
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lutCustomSeqEnable; /*!< [0x047-0x047] LUT customization Enable, it is required if the program/erase cannot
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be done using 1 LUT sequence, currently, only applicable to HyperFLASH */
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uint32_t reserved3[2]; /*!< [0x048-0x04f] Reserved for future use */
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uint32_t sflashA1Size; /*!< [0x050-0x053] Size of Flash connected to A1 */
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uint32_t sflashA2Size; /*!< [0x054-0x057] Size of Flash connected to A2 */
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uint32_t sflashB1Size; /*!< [0x058-0x05b] Size of Flash connected to B1 */
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uint32_t sflashB2Size; /*!< [0x05c-0x05f] Size of Flash connected to B2 */
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uint32_t csPadSettingOverride; /*!< [0x060-0x063] CS pad setting override value */
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uint32_t sclkPadSettingOverride; /*!< [0x064-0x067] SCK pad setting override value */
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uint32_t dataPadSettingOverride; /*!< [0x068-0x06b] data pad setting override value */
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uint32_t dqsPadSettingOverride; /*!< [0x06c-0x06f] DQS pad setting override value */
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uint32_t timeoutInMs; /*!< [0x070-0x073] Timeout threshold for read status command */
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uint32_t commandInterval; /*!< [0x074-0x077] CS deselect interval between two commands */
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flexspi_dll_time_t dataValidTime[2]; /*!< [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B */
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uint16_t busyOffset; /*!< [0x07c-0x07d] Busy offset, valid value: 0-31 */
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uint16_t busyBitPolarity; /*!< [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device is busy, 1 -
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busy flag is 0 when flash device is busy */
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uint32_t lookupTable[64]; /*!< [0x080-0x17f] Lookup table holds Flash command sequences */
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flexspi_lut_seq_t lutCustomSeq[12]; /*!< [0x180-0x1af] Customizable LUT Sequences */
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uint32_t reserved4[4]; /*!< [0x1b0-0x1bf] Reserved for future use */
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} flexspi_mem_config_t;
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/*! @brief Serial NOR configuration block */
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typedef struct _flexspi_nor_config
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{
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flexspi_mem_config_t memConfig; /*!< Common memory configuration info via FLEXSPI */
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uint32_t pageSize; /*!< Page size of Serial NOR */
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uint32_t sectorSize; /*!< Sector size of Serial NOR */
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uint8_t ipcmdSerialClkFreq; /*!< Clock frequency for IP command */
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uint8_t isUniformBlockSize; /*!< Sector/Block size is the same */
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uint8_t isDataOrderSwapped; /*!< Data order (D0, D1, D2, D3) is swapped (D1,D0, D3, D2) */
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uint8_t reserved0[1]; /*!< Reserved for future use */
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uint8_t serialNorType; /*!< Serial NOR Flash type: 0/1/2/3 */
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uint8_t needExitNoCmdMode; /*!< Need to exit NoCmd mode before other IP command */
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uint8_t halfClkForNonReadCmd; /*!< Half the Serial Clock for non-read command: true/false */
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uint8_t needRestoreNoCmdMode; /*!< Need to Restore NoCmd mode after IP commmand execution */
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uint32_t blockSize; /*!< Block size */
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uint32_t reserve2[11]; /*!< Reserved for future use */
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} flexspi_nor_config_t;
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/*@}*/
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/*! @brief Manufacturer ID */
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enum
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{
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kSerialFlash_ISSI_ManufacturerID = 0x9DU, /*!< Manufacturer ID of the ISSI serial flash */
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kSerialFlash_Adesto_ManufacturerID = 0x1F, /*!< Manufacturer ID of the Adesto Technologies serial flash*/
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kSerialFlash_Winbond_ManufacturerID = 0xEFU, /*!< Manufacturer ID of the Winbond serial flash */
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kSerialFlash_Cypress_ManufacturerID = 0x01U, /*!< Manufacturer ID for Cypress */
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};
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/*! @brief ROM FLEXSPI NOR flash status */
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enum _flexspi_nor_status
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{
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kStatus_ROM_FLEXSPI_SequenceExecutionTimeout =
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MAKE_STATUS(kROM_StatusGroup_FLEXSPI, 0), /*!< Status for Sequence Execution timeout */
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kStatus_ROM_FLEXSPI_InvalidSequence = MAKE_STATUS(kROM_StatusGroup_FLEXSPI, 1), /*!< Status for Invalid Sequence */
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kStatus_ROM_FLEXSPI_DeviceTimeout = MAKE_STATUS(kROM_StatusGroup_FLEXSPI, 2), /*!< Status for Device timeout */
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kStatus_FLEXSPINOR_DTRRead_DummyProbeFailed =
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MAKE_STATUS(kROM_StatusGroup_FLEXSPINOR, 10), /*!< Status for DDR Read dummy probe failure */
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kStatus_ROM_FLEXSPINOR_SFDP_NotFound =
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MAKE_STATUS(kROM_StatusGroup_FLEXSPINOR, 7), /*!< Status for SFDP read failure */
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kStatus_ROM_FLEXSPINOR_Flash_NotFound =
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MAKE_STATUS(kROM_StatusGroup_FLEXSPINOR, 9), /*!< Status for Flash detection failure */
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};
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typedef enum _flexspi_operation
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{
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kFLEXSPIOperation_Command, /*!< FLEXSPI operation: Only command, both TX and RX buffer are ignored. */
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kFLEXSPIOperation_Config, /*!< FLEXSPI operation: Configure device mode, the TX FIFO size is fixed in LUT. */
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kFLEXSPIOperation_Write, /*!< FLEXSPI operation: Write, only TX buffer is effective */
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kFLEXSPIOperation_Read, /*!< FLEXSPI operation: Read, only Rx Buffer is effective. */
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kFLEXSPIOperation_End = kFLEXSPIOperation_Read,
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} flexspi_operation_t;
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/*! @brief FLEXSPI Transfer Context */
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typedef struct _flexspi_xfer
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{
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flexspi_operation_t operation; /*!< FLEXSPI operation */
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uint32_t baseAddress; /*!< FLEXSPI operation base address */
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uint32_t seqId; /*!< Sequence Id */
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uint32_t seqNum; /*!< Sequence Number */
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bool isParallelModeEnable; /*!< Is a parallel transfer */
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uint32_t *txBuffer; /*!< Tx buffer */
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uint32_t txSize; /*!< Tx size in bytes */
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uint32_t *rxBuffer; /*!< Rx buffer */
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uint32_t rxSize; /*!< Rx size in bytes */
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} flexspi_xfer_t;
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if defined(FSL_FEATURE_BOOT_ROM_HAS_ROMAPI) && FSL_FEATURE_BOOT_ROM_HAS_ROMAPI
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/*!
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* @name Initialization
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* @{
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*/
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/*!
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* @brief Initialize Serial NOR devices via FLEXSPI
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*
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* This function checks and initializes the FLEXSPI module for the other FLEXSPI APIs.
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*
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* @param instance storage the instance of FLEXSPI.
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* @param config A pointer to the storage for the driver runtime state.
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*
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* @retval kStatus_Success Api was executed succesfuly.
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* @retval kStatus_InvalidArgument A invalid argument is provided.
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* @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided.
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* @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout.
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* @retval kStatus_ROM_FLEXSPI_DeviceTimeout the device timeout
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*/
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status_t ROM_FLEXSPI_NorFlash_Init(uint32_t instance, flexspi_nor_config_t *config);
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/*@}*/
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/*!
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* @name Programming
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* @{
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*/
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/*!
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* @brief Program data to Serial NOR via FLEXSPI.
|
|
*
|
|
* This function programs the NOR flash memory with the dest address for a given
|
|
* flash area as determined by the dst address and the length.
|
|
*
|
|
* @param instance storage the instance of FLEXSPI.
|
|
* @param config A pointer to the storage for the driver runtime state.
|
|
* @param dstAddr A pointer to the desired flash memory to be programmed.
|
|
* NOTE:
|
|
* It is recommended that use page aligned access;
|
|
* If the dstAddr is not aligned to page,the driver automatically
|
|
* aligns address down with the page address.
|
|
* @param src A pointer to the source buffer of data that is to be programmed
|
|
* into the NOR flash.
|
|
*
|
|
* @retval kStatus_Success Api was executed succesfuly.
|
|
* @retval kStatus_InvalidArgument A invalid argument is provided.
|
|
* @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided.
|
|
* @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout.
|
|
* @retval kStatus_ROM_FLEXSPI_DeviceTimeout the device timeout
|
|
*/
|
|
status_t ROM_FLEXSPI_NorFlash_ProgramPage(uint32_t instance,
|
|
flexspi_nor_config_t *config,
|
|
uint32_t dstAddr,
|
|
const uint32_t *src);
|
|
|
|
/*@}*/
|
|
|
|
/*!
|
|
* @name Erasing
|
|
* @{
|
|
*/
|
|
#if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_SECTOR) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_SECTOR
|
|
/*!
|
|
* @brief Erase one sector specified by address
|
|
*
|
|
* This function erases one of NOR flash sectors based on the desired address.
|
|
*
|
|
* @param instance storage the index of FLEXSPI.
|
|
* @param config A pointer to the storage for the driver runtime state.
|
|
* @param address The start address of the desired NOR flash memory to be erased.
|
|
* NOTE:
|
|
* It is recommended that use sector-aligned access nor device;
|
|
* If dstAddr is not aligned with the sector,The driver automatically
|
|
* aligns address down with the sector address.
|
|
*
|
|
* @retval kStatus_Success Api was executed succesfuly.
|
|
* @retval kStatus_InvalidArgument A invalid argument is provided.
|
|
* @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided.
|
|
* @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout.
|
|
* @retval kStatus_ROM_FLEXSPI_DeviceTimeout the device timeout
|
|
*/
|
|
status_t ROM_FLEXSPI_NorFlash_EraseSector(uint32_t instance, flexspi_nor_config_t *config, uint32_t address);
|
|
#endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_SECTOR */
|
|
|
|
#if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_BLOCK) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_BLOCK
|
|
/*!
|
|
* @brief Erase one block specified by address
|
|
*
|
|
* This function erases one block of NOR flash based on the desired address.
|
|
*
|
|
* @param instance storage the index of FLEXSPI.
|
|
* @param config A pointer to the storage for the driver runtime state.
|
|
* @param start The start address of the desired NOR flash memory to be erased.
|
|
* NOTE:
|
|
* It is recommended that use block-aligned access nor device;
|
|
* If dstAddr is not aligned with the block,The driver automatically
|
|
* aligns address down with the block address.
|
|
*
|
|
* @retval kStatus_Success Api was executed succesfuly.
|
|
* @retval kStatus_InvalidArgument A invalid argument is provided.
|
|
* @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided.
|
|
* @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout.
|
|
* @retval kStatus_ROM_FLEXSPI_DeviceTimeout the device timeout
|
|
*/
|
|
status_t ROM_FLEXSPI_NorFlash_EraseBlock(uint32_t instance, flexspi_nor_config_t *config, uint32_t start);
|
|
#endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_BLOCK */
|
|
|
|
/*!
|
|
* @brief Erase Flash Region specified by address and length
|
|
*
|
|
* This function erases the appropriate number of flash sectors based on the
|
|
* desired start address and length.
|
|
*
|
|
* @param instance storage the index of FLEXSPI.
|
|
* @param config A pointer to the storage for the driver runtime state.
|
|
* @param start The start address of the desired NOR flash memory to be erased.
|
|
* NOTE:
|
|
* It is recommended that use sector-aligned access nor device;
|
|
* If dstAddr is not aligned with the sector,the driver automatically
|
|
* aligns address down with the sector address.
|
|
* @param length The length, given in bytes to be erased.
|
|
* NOTE:
|
|
* It is recommended that use sector-aligned access nor device;
|
|
* If length is not aligned with the sector,the driver automatically
|
|
* aligns up with the sector.
|
|
* @retval kStatus_Success Api was executed succesfuly.
|
|
* @retval kStatus_InvalidArgument A invalid argument is provided.
|
|
* @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided.
|
|
* @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout.
|
|
* @retval kStatus_ROM_FLEXSPI_DeviceTimeout the device timeout
|
|
*/
|
|
status_t ROM_FLEXSPI_NorFlash_Erase(uint32_t instance, flexspi_nor_config_t *config, uint32_t start, uint32_t length);
|
|
|
|
/*@}*/
|
|
|
|
/*!
|
|
* @name Command
|
|
* @{
|
|
*/
|
|
|
|
#if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_CMD_XFER) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_CMD_XFER
|
|
/*!
|
|
* @brief FLEXSPI command
|
|
*
|
|
* This function is used to perform the command write sequence to the NOR device.
|
|
*
|
|
* @param instance storage the index of FLEXSPI.
|
|
* @param xfer A pointer to the storage FLEXSPI Transfer Context.
|
|
*
|
|
* @retval kStatus_Success Api was executed succesfuly.
|
|
* @retval kStatus_InvalidArgument A invalid argument is provided.
|
|
* @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided.
|
|
* @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout.
|
|
*/
|
|
status_t ROM_FLEXSPI_NorFlash_CommandXfer(uint32_t instance, flexspi_xfer_t *xfer);
|
|
#endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_CMD_XFER */
|
|
/*@}*/
|
|
|
|
/*!
|
|
* @name UpdateLut
|
|
* @{
|
|
*/
|
|
#if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_UPDATE_LUT) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_UPDATE_LUT
|
|
/*!
|
|
* @brief Configure FLEXSPI Lookup table
|
|
*
|
|
* @param instance storage the index of FLEXSPI.
|
|
* @param seqIndex storage the sequence Id.
|
|
* @param lutBase A pointer to the look-up-table for command sequences.
|
|
* @param seqNumber storage sequence number.
|
|
*
|
|
* @retval kStatus_Success Api was executed succesfuly.
|
|
* @retval kStatus_InvalidArgument A invalid argument is provided.
|
|
* @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided.
|
|
* @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout.
|
|
*/
|
|
status_t ROM_FLEXSPI_NorFlash_UpdateLut(uint32_t instance,
|
|
uint32_t seqIndex,
|
|
const uint32_t *lutBase,
|
|
uint32_t seqNumber);
|
|
#endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_UPDATE_LUT */
|
|
|
|
/*@}*/
|
|
|
|
/*!
|
|
* @name ClearCache
|
|
* @{
|
|
*/
|
|
|
|
/*!
|
|
* @brief Software reset for the FLEXSPI logic.
|
|
*
|
|
* This function sets the software reset flags for both AHB and buffer domain and
|
|
* resets both AHB buffer and also IP FIFOs.
|
|
*
|
|
* @param instance storage the index of FLEXSPI.
|
|
*/
|
|
void ROM_FLEXSPI_NorFlash_ClearCache(uint32_t instance);
|
|
|
|
/*@}*/
|
|
|
|
#endif /* FSL_FEATURE_BOOT_ROM_HAS_ROMAPI */
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
/*! @}*/
|
|
|
|
#endif /* _FSL_ROMAPI_H_ */
|