279 lines
4.8 KiB
Plaintext
279 lines
4.8 KiB
Plaintext
if ARCH_ARMV8 && ARCH_CPU_64BIT
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menu "AArch64 Architecture Configuration"
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config ARCH_TEXT_OFFSET
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hex "Text offset"
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default 0x200000
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config ARCH_RAM_OFFSET
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hex "RAM offset"
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default 0
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config ARCH_SECONDARY_CPU_STACK_SIZE
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int "Secondary CPU stack size"
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default 4096
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config ARCH_HAVE_EFFICIENT_UNALIGNED_ACCESS
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bool
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default y
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config ARCH_USING_GENERIC_CPUID
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bool "Using generic cpuid implemenation"
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select ARCH_USING_HW_THREAD_SELF
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default y if RT_USING_OFW
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default n
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endmenu
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endif
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config ARCH_CPU_64BIT
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bool
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config RT_USING_CACHE
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bool
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default n
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config RT_USING_HW_ATOMIC
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bool
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default n
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config ARCH_CPU_BIG_ENDIAN
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bool
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config ARCH_ARM_BOOTWITH_FLUSH_CACHE
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bool
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default n
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config ARCH_CPU_STACK_GROWS_UPWARD
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bool
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default n
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config RT_USING_CPU_FFS
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bool
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default n
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config ARCH_MM_MMU
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bool
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config ARCH_MM_MPU
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bool
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config ARCH_ARM
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bool
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config ARCH_ARM_CORTEX_M
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bool
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select ARCH_ARM
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config ARCH_ARM_CORTEX_R
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bool
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select ARCH_ARM
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config ARCH_ARM_CORTEX_FPU
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bool
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config ARCH_ARM_CORTEX_SECURE
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bool
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config ARCH_ARM_CORTEX_M0
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bool
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select ARCH_ARM_CORTEX_M
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config ARCH_ARM_CORTEX_M3
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bool
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select ARCH_ARM_CORTEX_M
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select RT_USING_CPU_FFS
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select RT_USING_HW_ATOMIC
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config ARCH_ARM_MPU
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bool
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depends on ARCH_ARM
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select ARCH_MM_MPU
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config ARCH_ARM_CORTEX_M4
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bool
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select ARCH_ARM_CORTEX_M
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select RT_USING_CPU_FFS
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select RT_USING_HW_ATOMIC
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config ARCH_ARM_CORTEX_M7
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bool
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select ARCH_ARM_CORTEX_M
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select RT_USING_CPU_FFS
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select RT_USING_CACHE
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config ARCH_ARM_CORTEX_M85
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bool
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select ARCH_ARM_CORTEX_M
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select RT_USING_CPU_FFS
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select RT_USING_HW_ATOMIC
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config ARCH_ARM_CORTEX_M23
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bool
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select ARCH_ARM_CORTEX_M
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select RT_USING_HW_ATOMIC
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config ARCH_ARM_CORTEX_M33
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bool
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select ARCH_ARM_CORTEX_M
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select RT_USING_CPU_FFS
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select RT_USING_HW_ATOMIC
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config ARCH_ARM_CORTEX_R
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bool
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select ARCH_ARM
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select RT_USING_HW_ATOMIC
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config ARCH_ARM_CORTEX_R52
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bool
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select ARCH_ARM_CORTEX_R
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config ARCH_ARM_MMU
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bool
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select RT_USING_CACHE
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select ARCH_MM_MMU
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depends on ARCH_ARM
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if RT_USING_SMART
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config KERNEL_VADDR_START
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hex "The virtural address of kernel start"
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default 0xffff000000000000 if ARCH_ARMV8
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default 0xc0000000 if ARCH_ARM
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default 0x80000000 if ARCH_RISCV
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depends on ARCH_MM_MMU
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config RT_IOREMAP_LATE
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bool "Support to create IO mapping in the kernel address space after system initlalization."
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default n
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depends on ARCH_ARM_CORTEX_A
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depends on ARCH_MM_MMU
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endif
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config ARCH_ARM_ARM9
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bool
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select ARCH_ARM
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config ARCH_ARM_ARM11
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bool
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select ARCH_ARM
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config ARCH_ARM_CORTEX_A
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bool
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select ARCH_ARM
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select ARCH_ARM_MMU
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select RT_USING_CPU_FFS
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select RT_USING_HW_ATOMIC
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if ARCH_ARM_CORTEX_A
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config RT_SMP_AUTO_BOOT
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bool
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default n
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config RT_USING_GIC_V2
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bool
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default n
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config RT_USING_GIC_V3
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bool
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default n
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config RT_NO_USING_GIC
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bool
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default y if !RT_USING_GIC_V2 && !RT_USING_GIC_V3
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endif
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config ARCH_ARM_CORTEX_A5
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bool
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select ARCH_ARM_CORTEX_A
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config ARCH_ARM_CORTEX_A7
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bool
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select ARCH_ARM_CORTEX_A
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config ARCH_ARM_CORTEX_A8
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bool
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select ARCH_ARM_CORTEX_A
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config ARCH_ARM_CORTEX_A9
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bool
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select ARCH_ARM_CORTEX_A
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config ARCH_ARM_CORTEX_A55
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bool
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select ARCH_ARM_CORTEX_A
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config ARCH_ARM_SECURE_MODE
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bool "Running in secure mode [ARM Cortex-A]"
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default n
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depends on ARCH_ARM_CORTEX_A
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config RT_BACKTRACE_FUNCTION_NAME
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bool "To show function name when backtrace."
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default n
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depends on ARCH_ARM_CORTEX_A
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config ARCH_ARMV8
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bool
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select ARCH_ARM
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select ARCH_ARM_MMU
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select RT_USING_CPU_FFS
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config ARCH_MIPS
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bool
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config ARCH_MIPS64
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bool
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select ARCH_CPU_64BIT
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config ARCH_MIPS_XBURST
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bool
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select ARCH_MIPS
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config ARCH_ANDES
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bool
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config ARCH_CSKY
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bool
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config ARCH_POWERPC
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bool
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config ARCH_RISCV
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bool
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config ARCH_RISCV_FPU
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bool
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config ARCH_RISCV_FPU_S
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select ARCH_RISCV_FPU
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bool
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config ARCH_RISCV_FPU_D
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select ARCH_RISCV_FPU
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bool
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config ARCH_RISCV32
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select ARCH_RISCV
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bool
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config ARCH_RISCV64
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select ARCH_RISCV
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select ARCH_CPU_64BIT
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bool
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config ARCH_IA32
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bool
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config ARCH_TIDSP
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bool
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config ARCH_TIDSP_C28X
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bool
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select ARCH_TIDSP
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select ARCH_CPU_STACK_GROWS_UPWARD
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config ARCH_HOST_SIMULATOR
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bool
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config ARCH_CPU_STACK_GROWS_UPWARD
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bool
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default n
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config ARCH_USING_HW_THREAD_SELF
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bool
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default n
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