rt-thread-official/bsp/renesas/ra2l1-cpk/ra_gen/hal_data.c

113 lines
3.9 KiB
C

/* generated HAL source file - do not edit */
#include "hal_data.h"
icu_instance_ctrl_t g_external_irq3_ctrl;
const external_irq_cfg_t g_external_irq3_cfg =
{
.channel = 3,
.trigger = EXTERNAL_IRQ_TRIG_RISING,
.filter_enable = false,
.pclk_div = EXTERNAL_IRQ_PCLK_DIV_BY_64,
.p_callback = irq_callback,
/** If NULL then do not add & */
#if defined(NULL)
.p_context = NULL,
#else
.p_context = &NULL,
#endif
.p_extend = NULL,
.ipl = (2),
#if defined(VECTOR_NUMBER_ICU_IRQ3)
.irq = VECTOR_NUMBER_ICU_IRQ3,
#else
.irq = FSP_INVALID_VECTOR,
#endif
};
/* Instance structure to use this module. */
const external_irq_instance_t g_external_irq3 =
{
.p_ctrl = &g_external_irq3_ctrl,
.p_cfg = &g_external_irq3_cfg,
.p_api = &g_external_irq_on_icu
};
sci_uart_instance_ctrl_t g_uart9_ctrl;
baud_setting_t g_uart9_baud_setting =
{
/* Baud rate calculated with 0.160% error. */ .abcse = 0, .abcs = 0, .bgdm = 1, .cks = 0, .brr = 12, .mddr = (uint8_t) 256, .brme = false
};
/** UART extended configuration for UARTonSCI HAL driver */
const sci_uart_extended_cfg_t g_uart9_cfg_extend =
{
.clock = SCI_UART_CLOCK_INT,
.rx_edge_start = SCI_UART_START_BIT_FALLING_EDGE,
.noise_cancel = SCI_UART_NOISE_CANCELLATION_DISABLE,
.rx_fifo_trigger = SCI_UART_RX_FIFO_TRIGGER_MAX,
.p_baud_setting = &g_uart9_baud_setting,
.flow_control = SCI_UART_FLOW_CONTROL_RTS,
#if 0xFF != 0xFF
.flow_control_pin = BSP_IO_PORT_FF_PIN_0xFF,
#else
.flow_control_pin = (bsp_io_port_pin_t) UINT16_MAX,
#endif
};
/** UART interface configuration */
const uart_cfg_t g_uart9_cfg =
{
.channel = 9,
.data_bits = UART_DATA_BITS_8,
.parity = UART_PARITY_OFF,
.stop_bits = UART_STOP_BITS_1,
.p_callback = user_uart9_callback,
.p_context = NULL,
.p_extend = &g_uart9_cfg_extend,
#define RA_NOT_DEFINED (1)
#if (RA_NOT_DEFINED == RA_NOT_DEFINED)
.p_transfer_tx = NULL,
#else
.p_transfer_tx = &RA_NOT_DEFINED,
#endif
#if (RA_NOT_DEFINED == RA_NOT_DEFINED)
.p_transfer_rx = NULL,
#else
.p_transfer_rx = &RA_NOT_DEFINED,
#endif
#undef RA_NOT_DEFINED
.rxi_ipl = (2),
.txi_ipl = (2),
.tei_ipl = (2),
.eri_ipl = (2),
#if defined(VECTOR_NUMBER_SCI9_RXI)
.rxi_irq = VECTOR_NUMBER_SCI9_RXI,
#else
.rxi_irq = FSP_INVALID_VECTOR,
#endif
#if defined(VECTOR_NUMBER_SCI9_TXI)
.txi_irq = VECTOR_NUMBER_SCI9_TXI,
#else
.txi_irq = FSP_INVALID_VECTOR,
#endif
#if defined(VECTOR_NUMBER_SCI9_TEI)
.tei_irq = VECTOR_NUMBER_SCI9_TEI,
#else
.tei_irq = FSP_INVALID_VECTOR,
#endif
#if defined(VECTOR_NUMBER_SCI9_ERI)
.eri_irq = VECTOR_NUMBER_SCI9_ERI,
#else
.eri_irq = FSP_INVALID_VECTOR,
#endif
};
/* Instance structure to use this module. */
const uart_instance_t g_uart9 =
{
.p_ctrl = &g_uart9_ctrl,
.p_cfg = &g_uart9_cfg,
.p_api = &g_uart_on_sci
};
void g_hal_init(void) {
g_common_init();
}