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ea6d73f140
1. Upgrade Cortex driver library (CMSIS -> CMSIS & Device): version 2.3.2 -> 3.0.1 & 3.0.0 - Remove "bsp/efm32/Libraries/CMSIS/Lib/ARM", "bsp/efm32/Libraries/CMSIS/Lib/G++" and "bsp/efm32/Libraries/CMSIS/SVD" to save space 2. Upgrade EFM32 driver libraries (efm32lib -> emlib): version 2.3.2 -> 3.0.0 - Remove "bsp/efm32/Libraries/Device/EnergyMicro/EFM32LG" and "bsp/efm32/Libraries/Device/EnergyMicro/EFM32TG" to save space 3. Upgrade EFM32GG_DK3750 development kit driver library: version 1.2.2 -> 2.0.1 4. Upgrade EFM32_Gxxx_DK development kit driver library: version 1.7.3 -> 2.0.1 5. Add energy management unit driver and test code 6. Modify linker script and related code to compatible with new version of libraries 7. Change EFM32 branch version number to 1.0 8. Add photo frame demo application git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2122 bbd45198-f89e-11dd-88c7-29a3b14d5316
270 lines
9.9 KiB
C
270 lines
9.9 KiB
C
/**************************************************************************//**
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* @file
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* @brief SPI implementation of Board Control interface
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* This implementation use the USART2 SPI interface to control board
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* control registers. It works
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* @author Energy Micro AS
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* @version 2.0.1
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******************************************************************************
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* @section License
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* <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
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*******************************************************************************
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*
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* Permission is granted to anyone to use this software for any purpose,
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* including commercial applications, and to alter it and redistribute it
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* freely, subject to the following restrictions:
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*
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* 1. The origin of this software must not be misrepresented; you must not
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* claim that you wrote the original software.
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* 2. Altered source versions must be plainly marked as such, and must not be
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* misrepresented as being the original software.
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* 3. This notice may not be removed or altered from any source distribution.
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* 4. The source and compiled code may only be used on Energy Micro "EFM32"
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* microcontrollers and "EFR4" radios.
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*
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* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
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* obligation to support this Software. Energy Micro AS is providing the
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* Software "AS IS", with no express or implied warranties of any kind,
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* including, but not limited to, any implied warranties of merchantability
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* or fitness for any particular purpose or warranties against infringement
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* of any proprietary rights of a third party.
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*
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* Energy Micro AS will not be liable for any consequential, incidental, or
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* special damages, or any other relief, or for any claim by any third party,
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* arising from your use of this Software.
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*
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*****************************************************************************/
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/***************************************************************************//**
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* @addtogroup BSP
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* @{
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******************************************************************************/
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#include <stdio.h>
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#include "efm32.h"
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#include "em_usart.h"
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#include "em_gpio.h"
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#include "em_cmu.h"
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#include "dvk.h"
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#include "dvk_bcregisters.h"
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#ifdef _EFM32_TINY_FAMILY
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/* USART used for SPI access */
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#define USART_USED USART0
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#define USART_CLK cmuClock_USART0
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/* GPIO pins used, please refer to DVK user guide. */
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#define PIN_SPIBUS_CONNECT 13
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#define PORT_SPIBUS_CONNECT gpioPortC
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#define PIN_SPI_TX 10
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#define PORT_SPI_TX gpioPortE
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#define PIN_SPI_RX 11
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#define PORT_SPI_RX gpioPortE
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#define PIN_SPI_CLK 12
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#define PORT_SPI_CLK gpioPortE
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#define PIN_SPI_CS 13
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#define PORT_SPI_CS gpioPortE
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#else
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/* USART used for SPI access */
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#define USART_USED USART2
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#define USART_CLK cmuClock_USART2
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/* GPIO pins used, please refer to DVK user guide. */
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#define PIN_SPIBUS_CONNECT 13
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#define PORT_SPIBUS_CONNECT gpioPortC
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#define PIN_EBIBUS_CONNECT 12
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#define PORT_EBIBUS_CONNECT gpioPortC
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#define PIN_SPI_TX 2
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#define PORT_SPI_TX gpioPortC
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#define PIN_SPI_RX 3
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#define PORT_SPI_RX gpioPortC
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#define PIN_SPI_CLK 4
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#define PORT_SPI_CLK gpioPortC
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#define PIN_SPI_CS 5
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#define PORT_SPI_CS gpioPortC
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#endif
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static volatile uint16_t *lastAddr = NULL;
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/**************************************************************************//**
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* @brief Initializes SPI interface for access to FPGA registers
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* for board control
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*****************************************************************************/
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static void spiInit(void)
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{
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USART_InitSync_TypeDef init = USART_INITSYNC_DEFAULT;
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/* Enable module clocks */
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CMU_ClockEnable(cmuClock_GPIO, true);
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CMU_ClockEnable(cmuClock_HFPER, true);
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CMU_ClockEnable(USART_CLK, true);
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/* Configure SPI bus connect pins, DOUT set to 0, disable EBI */
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GPIO_PinModeSet(PORT_SPIBUS_CONNECT, PIN_SPIBUS_CONNECT, gpioModePushPull, 0);
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GPIO_PinModeSet(PORT_EBIBUS_CONNECT, PIN_EBIBUS_CONNECT, gpioModePushPull, 1);
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/* Configure SPI pins */
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GPIO_PinModeSet(PORT_SPI_TX, PIN_SPI_TX, gpioModePushPull, 0);
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GPIO_PinModeSet(PORT_SPI_RX, PIN_SPI_RX, gpioModePushPull, 0);
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GPIO_PinModeSet(PORT_SPI_CLK, PIN_SPI_CLK, gpioModePushPull, 0);
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/* Keep CS high to not activate slave */
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GPIO_PinModeSet(PORT_SPI_CS, PIN_SPI_CS, gpioModePushPull, 1);
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/* Configure to use SPI master with manual CS */
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/* For now, configure SPI for worst case 32MHz clock in order to work for all */
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/* configurations. */
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init.refFreq = 32000000;
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init.baudrate = 7000000;
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USART_InitSync(USART_USED, &init);
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/* Enable pins at default location */
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USART_USED->ROUTE = USART_ROUTE_TXPEN | USART_ROUTE_RXPEN | USART_ROUTE_CLKPEN;
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}
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/**************************************************************************//**
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* @brief Disables GPIO pins and USART from FPGA register access
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*****************************************************************************/
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static void spiDisable(void)
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{
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USART_Reset(USART_USED);
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/* Disable LCD_SELECT */
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GPIO_PinModeSet(gpioPortD, 13, gpioModeDisabled, 0);
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/* Disable SPI pins */
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GPIO_PinModeSet(PORT_SPIBUS_CONNECT, 13, gpioModeDisabled, 0);
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GPIO_PinModeSet(PORT_SPIBUS_CONNECT, 12, gpioModeDisabled, 0);
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GPIO_PinModeSet(PORT_SPI_TX, PIN_SPI_TX, gpioModeDisabled, 0);
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GPIO_PinModeSet(PORT_SPI_RX, PIN_SPI_RX, gpioModeDisabled, 0);
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GPIO_PinModeSet(PORT_SPI_CLK, PIN_SPI_CLK, gpioModeDisabled, 0);
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GPIO_PinModeSet(PORT_SPI_CS, PIN_SPI_CS, gpioModeDisabled, 0);
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/* Disable USART clock - we can't disable GPIO or HFPER as we don't know who else
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* might be using it */
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CMU_ClockEnable(USART_CLK, false);
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}
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/**************************************************************************//**
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* @brief Perform SPI Transfer
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*****************************************************************************/
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static uint16_t spiAccess(uint8_t spiaddr, uint8_t rw, uint16_t spidata)
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{
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uint16_t tmp;
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GPIO_PinOutClear(PORT_SPI_CS, PIN_SPI_CS);
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/* For every byte sent, one is received */
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/* Write SPI address */
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USART_Tx(USART_USED, (spiaddr & 0x3) | rw << 3);
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/* Just ignore data read back */
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USART_Rx(USART_USED);
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/* SPI data LSB */
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USART_Tx(USART_USED, spidata & 0xFF);
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tmp = (uint16_t)USART_Rx(USART_USED);
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/* SPI data MSB */
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USART_Tx(USART_USED, spidata >> 8);
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tmp |= (uint16_t)USART_Rx(USART_USED) << 8;
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GPIO_PinOutSet(PORT_SPI_CS, PIN_SPI_CS);
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return tmp;
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}
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/**************************************************************************//**
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* @brief Performs SPI write to FPGA register
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* @param spiadr Address of register
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* @param spidata Data to write
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*****************************************************************************/
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static void spiWrite(uint8_t spiadr, uint16_t spidata)
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{
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spiAccess(spiadr, 0, spidata);
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}
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/**************************************************************************//**
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* @brief Performs SPI read from FPGA register
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* @param spiadr Address of register
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* @param spidata Dummy data
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*****************************************************************************/
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static uint16_t spiRead(uint8_t spiadr, uint16_t spidata)
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{
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return spiAccess(spiadr, 1, spidata);
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}
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/**************************************************************************//**
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* @brief Initializes DVK register access
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* @return true on success, false on failure
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*****************************************************************************/
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bool DVK_SPI_init(void)
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{
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uint16_t spiMagic;
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spiInit();
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/* Read "board control Magic" register to verify SPI is up and running */
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/* if not FPGA is configured to be in EBI mode */
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spiMagic = DVK_SPI_readRegister(BC_MAGIC);
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if(spiMagic != BC_MAGIC_VALUE)
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{
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return false;
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}
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else
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{
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return true;
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}
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}
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/**************************************************************************//**
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* @brief Disable and free up resources used by SPI board control access
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*****************************************************************************/
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void DVK_SPI_disable(void)
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{
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spiDisable();
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}
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/**************************************************************************//**
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* @brief Perform read from DVK board control register
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* @param addr Address of register to read from
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*****************************************************************************/
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uint16_t DVK_SPI_readRegister(volatile uint16_t *addr)
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{
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uint16_t data;
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if (addr != lastAddr)
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{
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spiWrite(0x00, 0xFFFF & ((uint32_t) addr)); /*LSBs of address*/
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spiWrite(0x01, 0xFF & ((uint32_t) addr >> 16)); /*MSBs of address*/
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spiWrite(0x02, (0x0C000000 & (uint32_t) addr) >> 26); /*Chip select*/
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}
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/* Read twice */
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data = spiRead(0x03, 0);
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data = spiRead(0x03, 0);
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lastAddr = addr;
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return data;
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}
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/**************************************************************************//**
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* @brief Perform write to DVK board control register
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* @param addr Address of register to write to
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* @param data 16-bit to write into register
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*****************************************************************************/
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void DVK_SPI_writeRegister(volatile uint16_t *addr, uint16_t data)
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{
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if (addr != lastAddr)
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{
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spiWrite(0x00, 0xFFFF & ((uint32_t) addr)); /*LSBs of address*/
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spiWrite(0x01, 0xFF & ((uint32_t) addr >> 16)); /*MSBs of address*/
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spiWrite(0x02, (0x0C000000 & (uint32_t) addr) >> 26); /*Chip select*/
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}
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spiWrite(0x03, data); /*Data*/
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lastAddr = addr;
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}
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/** @} (end group BSP) */
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