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GuEe-GUI 2168ed8e7d [DM/Feature] Basic PCI/PCIe (Peripheral Component Interconnect Express) bus
PCI/PCIe have better performance and more devices support, such as
NVMe, GPU, Powerful NIC (Like RDMA). PCI/PCIe can access control by
IOMMU that the virtualiztion and userspace driver will more safety.
PCI/PCIe device could hot plugging, no design modifications SoC required,
PCI/PCIe on Embedded SoC is popular now.
We make a simple framework to support them.

Feature Lists:
1.PCI INTx: the INT[A-D] pin IRQ for legacy PCI, work with platform PIC.
2.MSI/MSI-X: the message write IRQ for PCIe, work with platform's PIC.
3.PME: we only support the D0, D1, D2, D3HOT, D3COLD init by framework.
4.Endpoint: a simple EP framework for PCI FPGA or NTB function.
5.OFW: we only support work on OFW SoC, ACPI support in the future maybe.

Host controller:
1. Common PCI host controller on ECAM.
2. Generic PCI host controller on ECAM.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-09-06 17:45:03 -04:00

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menuconfig RT_USING_PCI
bool "Using Peripheral Component Interconnect Express (PCIe/PCI)"
depends on RT_USING_DM
depends on RT_USING_PIC
select RT_USING_ADT
select RT_USING_ADT_BITMAP
default n
config RT_PCI_MSI
bool "PCI MSI/MSI-X"
depends on RT_USING_PCI
default y
config RT_PCI_ENDPOINT
bool "PCI Endpoint"
depends on RT_USING_PCI
select RT_USING_ADT_REF
default n
config RT_PCI_SYS_64BIT
bool "PCI System 64bit"
depends on RT_USING_PCI
depends on ARCH_CPU_64BIT
default y
config RT_PCI_CACHE_LINE_SIZE
int "PCI Cache line size"
depends on RT_USING_PCI
default 8 if ARCH_CPU_64BIT
default 4
config RT_PCI_LOCKLESS
bool "PCI Lock less in options"
depends on RT_USING_PCI
default n
if RT_USING_PCI
comment "PCI Device Drivers"
config RT_PCI_ECAM
bool "PCIe ECAM"
depends on RT_USING_PCI
default y
help
PCIe Express Enhanced Configuration Access Mechanism
rsource "host/Kconfig"
endif