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fb61c7960b
* 本次提交包括①BSP驱动新增②F103库更新③GCC、IAR适配及MDK更新④README文件及由更新驱动引起的脚本改动。 详情如下： 一、BSP驱动新增 这是本次PR的主要目的，现新增了如下BSP驱动： ADC、DAC、RTC、PWM、HWTIMER、I2C、SPI和WDT等八个驱动文件。 二、F103库更新： 本次提交使用2022年3月初极海官网发布的最新F103库，主要增加了版权声明、USB驱动及其他代码调整。 三、编译器适配： 1、新增GCC编译支持，在ENV工具下编译能成功且输出的bin文件能够使开发板闪灯。 2、新增IAR工程支持。 3、由F103的SDK更新，MDK的工程也进行了相应更新。 四、其他 1、README文件做了修改，加入了scons编译后的jlink下载说明和官网链接。 2、Kconfig、SConscript脚本根据驱动更新做了修改。 * 格式化代码（AStyle + Formatting） * 增加BSP APM版权声明 * 在ci添加当前bsp的路径，以能够验证gcc能否正常编译 * 路径的“\”改为“/”
274 lines
6.7 KiB
C
274 lines
6.7 KiB
C
/*
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* Copyright (c) 2006-2022, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-03-04 stevetong459 first version
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*/
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#include <board.h>
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#if defined(BSP_USING_ADC1) || defined(BSP_USING_ADC2) || defined(BSP_USING_ADC3)
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#define LOG_TAG "drv.adc"
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#define DBG_LVL DBG_INFO
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#include <rtdbg.h>
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#define DRV_ADC_CHANNEL_MAX_NUM 14
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#define DRV_ADC_TIME_OUT 0xFFF
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#define _ADC_GET_PORT(pin_num) ((GPIO_T *)(GPIOA_BASE + (0x400u * (((pin_num) >> 4) & 0xFu))))
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#define _ADC_GET_PIN(pin_num) ((uint16_t)(1u << ((pin_num) & 0xFu)))
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struct apm32_adc
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{
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const char *name;
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ADC_T *adc;
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ADC_Config_T adc_config;
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rt_base_t channel_pin[DRV_ADC_CHANNEL_MAX_NUM];
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struct rt_adc_device adc_dev;
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};
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static struct apm32_adc adc_config[] =
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{
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#ifdef BSP_USING_ADC1
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{
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"adc1",
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ADC1,
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{
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ADC_MODE_INDEPENDENT,
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DISABLE,
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DISABLE,
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ADC_EXT_TRIG_CONV_None,
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ADC_DATA_ALIGN_RIGHT,
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1
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},
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{
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GET_PIN(A, 0), GET_PIN(A, 1), GET_PIN(A, 2), GET_PIN(A, 3), GET_PIN(A, 4),
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GET_PIN(A, 5), GET_PIN(A, 6), GET_PIN(A, 7), GET_PIN(B, 0), GET_PIN(B, 1),
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GET_PIN(C, 0), GET_PIN(C, 1), GET_PIN(C, 2), GET_PIN(C, 3)
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},
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RT_NULL
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},
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#endif
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#ifdef BSP_USING_ADC2
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{
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"adc2",
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ADC2,
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{
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ADC_MODE_INDEPENDENT,
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DISABLE,
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DISABLE,
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ADC_EXT_TRIG_CONV_None,
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ADC_DATA_ALIGN_RIGHT,
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1
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},
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{
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GET_PIN(A, 0), GET_PIN(A, 1), GET_PIN(A, 2), GET_PIN(A, 3), GET_PIN(A, 4),
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GET_PIN(A, 5), GET_PIN(A, 6), GET_PIN(A, 7), GET_PIN(B, 0), GET_PIN(B, 1),
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GET_PIN(C, 0), GET_PIN(C, 1), GET_PIN(C, 2), GET_PIN(C, 3)
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},
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RT_NULL
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},
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#endif
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#ifdef BSP_USING_ADC3
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{
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"adc3",
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ADC3,
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{
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ADC_MODE_INDEPENDENT,
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DISABLE,
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DISABLE,
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ADC_EXT_TRIG_CONV_None,
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ADC_DATA_ALIGN_RIGHT,
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1
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},
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{
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GET_PIN(A, 0), GET_PIN(A, 1), GET_PIN(A, 2), GET_PIN(A, 3), GET_PIN(F, 6),
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GET_PIN(F, 7), GET_PIN(F, 8), GET_PIN(F, 9), GET_PIN(F, 10)
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},
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RT_NULL
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},
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#endif
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};
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static rt_err_t _adc_channel_check(struct rt_adc_device *device, rt_uint32_t channel)
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{
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struct apm32_adc *adc_cfg = ((struct apm32_adc *)device->parent.user_data);
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if (adc_cfg->adc == ADC3)
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{
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if (channel <= 8)
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{
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return RT_EOK;
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}
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}
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else
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{
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if (channel <= 13)
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{
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return RT_EOK;
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}
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}
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LOG_E("channel %d of %s is not supported.", channel, adc_cfg->name);
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return -RT_ERROR;
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}
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static rt_err_t _adc_gpio_init(struct rt_adc_device *device, rt_uint32_t channel)
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{
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struct apm32_adc *adc_cfg = ((struct apm32_adc *)device->parent.user_data);
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GPIO_Config_T hw_gpio_config;
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if (_adc_channel_check(device, channel) != RT_EOK)
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{
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return -RT_ERROR;
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}
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RCM_EnableAPB2PeriphClock(RCM_APB2_PERIPH_GPIOA << ((adc_cfg->channel_pin[channel] >> 4) & 0xFu));
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hw_gpio_config.mode = GPIO_MODE_ANALOG;
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hw_gpio_config.pin = _ADC_GET_PIN(adc_cfg->channel_pin[channel]);
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GPIO_Config(_ADC_GET_PORT(adc_cfg->channel_pin[channel]), &hw_gpio_config);
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return RT_EOK;
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}
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/**
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* @brief This function will control the adc to enable or disable.
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*
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* @param device is a pointer to adc device.
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*
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* @param channel is the adc channel.
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*
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* @param enabled is the status to indicate enable or disable.
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*
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* @return RT_EOK indicates successful enable or disable adc, other value indicates failed.
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*/
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static rt_err_t _adc_enabled(struct rt_adc_device *device, rt_uint32_t channel, rt_bool_t enabled)
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{
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struct apm32_adc *adc_cfg = ((struct apm32_adc *)device->parent.user_data);
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RT_ASSERT(device != RT_NULL);
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if (enabled)
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{
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if (adc_cfg->adc == ADC1)
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{
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RCM_EnableAPB2PeriphClock(RCM_APB2_PERIPH_ADC1);
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}
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else if (adc_cfg->adc == ADC2)
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{
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RCM_EnableAPB2PeriphClock(RCM_APB2_PERIPH_ADC2);
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}
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else
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{
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RCM_EnableAPB2PeriphClock(RCM_APB2_PERIPH_ADC3);
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}
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if (_adc_gpio_init(device, channel) != RT_EOK)
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{
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return -RT_ERROR;
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}
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ADC_Config(adc_cfg->adc, &adc_cfg->adc_config);
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ADC_Enable(adc_cfg->adc);
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}
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else
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{
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ADC_Disable(adc_cfg->adc);
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}
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return RT_EOK;
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}
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/**
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* @brief This function will get the adc conversion value.
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*
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* @param device is a pointer to adc device.
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*
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* @param channel is the adc channel.
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*
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* @param value is a pointer to the adc conversion value.
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*
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* @return RT_EOK indicates successful get adc value, other value indicates failed.
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*/
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static rt_err_t _adc_get_value(struct rt_adc_device *device, rt_uint32_t channel, rt_uint32_t *value)
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{
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struct apm32_adc *adc_cfg = ((struct apm32_adc *)device->parent.user_data);
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volatile rt_uint32_t counter = 0;
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RT_ASSERT(device != RT_NULL);
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RT_ASSERT(value != RT_NULL);
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if (_adc_channel_check(device, channel) != RT_EOK)
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{
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return -RT_ERROR;
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}
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ADC_ConfigRegularChannel(adc_cfg->adc, channel, 1, ADC_SAMPLETIME_13CYCLES5);
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ADC_StartCalibration(adc_cfg->adc);
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/* Check the end of ADC calibration */
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while (ADC_ReadCalibrationStartFlag(adc_cfg->adc))
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{
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if (++counter > DRV_ADC_TIME_OUT)
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{
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return RT_ETIMEOUT;
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}
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}
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ADC_EnableSoftwareStartConv(adc_cfg->adc);
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counter = 0;
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while (!ADC_ReadStatusFlag(adc_cfg->adc, ADC_FLAG_EOC))
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{
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if (++counter > DRV_ADC_TIME_OUT)
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{
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return RT_ETIMEOUT;
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}
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}
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*value = ADC_ReadConversionValue(adc_cfg->adc);
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return RT_EOK;
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}
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static const struct rt_adc_ops _adc_ops =
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{
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.enabled = _adc_enabled,
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.convert = _adc_get_value,
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};
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/**
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* @brief ADC initialization function.
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*
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* @return RT_EOK indicates successful initialization, other value indicates failed;
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*/
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static int rt_hw_adc_init(void)
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{
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rt_err_t result = RT_EOK;
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rt_size_t obj_num = sizeof(adc_config) / sizeof(struct apm32_adc);
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rt_uint32_t i = 0;
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for (i = 0; i < obj_num; i++)
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{
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/* register ADC device */
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if (rt_hw_adc_register(&adc_config[i].adc_dev, adc_config[i].name, &_adc_ops, adc_config))
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{
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LOG_D("%s init success", adc_config[i].name);
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}
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else
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{
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LOG_D("%s init failed", adc_config[i].name);
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result = -RT_ERROR;
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}
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}
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return result;
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}
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INIT_BOARD_EXPORT(rt_hw_adc_init);
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#endif /* BSP_USING_ADCX */
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