71 lines
2.7 KiB
C
71 lines
2.7 KiB
C
/*
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* The Clear BSD License
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* Copyright (c) 2014 - 2016, Freescale Semiconductor, Inc.
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* Copyright 2016 - 2017 NXP
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted (subject to the limitations in the disclaimer below) provided
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* that the following conditions are met:
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*
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* o Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* o Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* o Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#ifndef __FSL_DEVICE_REGISTERS_H__
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#define __FSL_DEVICE_REGISTERS_H__
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/*
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* Include the cpu specific register header files.
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*
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* The CPU macro should be declared in the project or makefile.
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*/
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#if (defined(CPU_LPC54114J256BD64_cm4) || defined(CPU_LPC54114J256UK49_cm4))
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#define LPC54114_cm4_SERIES
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/* CMSIS-style register definitions */
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#include "LPC54114_cm4.h"
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/* CPU specific feature definitions */
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#include "LPC54114_cm4_features.h"
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#elif (defined(CPU_LPC54114J256BD64_cm0plus) || defined(CPU_LPC54114J256UK49_cm0plus))
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#define LPC54114_cm0plus_SERIES
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/* CMSIS-style register definitions */
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#include "LPC54114_cm0plus.h"
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/* CPU specific feature definitions */
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#include "LPC54114_cm0plus_features.h"
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#else
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#error "No valid CPU defined!"
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#endif
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#endif /* __FSL_DEVICE_REGISTERS_H__ */
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/*******************************************************************************
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* EOF
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******************************************************************************/
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