458 lines
14 KiB
C
458 lines
14 KiB
C
/*
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* The Clear BSD License
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* Copyright (c) 2016, Freescale Semiconductor, Inc.
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* Copyright 2016-2017 NXP
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted (subject to the limitations in the disclaimer below) provided
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* that the following conditions are met:
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*
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* o Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* o Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* o Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _FSL_DMIC_H_
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#define _FSL_DMIC_H_
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#include "fsl_common.h"
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/*!
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* @addtogroup dmic_driver
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* @{
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*/
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/*! @file*/
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/*!
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* @name DMIC version
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* @{
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*/
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/*! @brief DMIC driver version 2.0.0. */
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#define FSL_DMIC_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
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/*@}*/
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/*! @brief DMIC different operation modes. */
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typedef enum _operation_mode
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{
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kDMIC_OperationModePoll = 0U, /*!< Polling mode */
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kDMIC_OperationModeInterrupt = 1U, /*!< Interrupt mode */
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kDMIC_OperationModeDma = 2U, /*!< DMA mode */
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} operation_mode_t;
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/*! @brief DMIC left/right values. */
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typedef enum _stereo_side
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{
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kDMIC_Left = 0U, /*!< Left Stereo channel */
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kDMIC_Right = 1U, /*!< Right Stereo channel */
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} stereo_side_t;
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/*! @brief DMIC Clock pre-divider values. */
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typedef enum
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{
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kDMIC_PdmDiv1 = 0U, /*!< DMIC pre-divider set in divide by 1 */
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kDMIC_PdmDiv2 = 1U, /*!< DMIC pre-divider set in divide by 2 */
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kDMIC_PdmDiv3 = 2U, /*!< DMIC pre-divider set in divide by 3 */
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kDMIC_PdmDiv4 = 3U, /*!< DMIC pre-divider set in divide by 4 */
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kDMIC_PdmDiv6 = 4U, /*!< DMIC pre-divider set in divide by 6 */
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kDMIC_PdmDiv8 = 5U, /*!< DMIC pre-divider set in divide by 8 */
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kDMIC_PdmDiv12 = 6U, /*!< DMIC pre-divider set in divide by 12 */
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kDMIC_PdmDiv16 = 7U, /*!< DMIC pre-divider set in divide by 16*/
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kDMIC_PdmDiv24 = 8U, /*!< DMIC pre-divider set in divide by 24*/
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kDMIC_PdmDiv32 = 9U, /*!< DMIC pre-divider set in divide by 32 */
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kDMIC_PdmDiv48 = 10U, /*!< DMIC pre-divider set in divide by 48 */
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kDMIC_PdmDiv64 = 11U, /*!< DMIC pre-divider set in divide by 64*/
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kDMIC_PdmDiv96 = 12U, /*!< DMIC pre-divider set in divide by 96*/
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kDMIC_PdmDiv128 = 13U, /*!< DMIC pre-divider set in divide by 128 */
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} pdm_div_t;
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/*! @brief Pre-emphasis Filter coefficient value for 2FS and 4FS modes. */
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typedef enum _compensation
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{
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kDMIC_CompValueZero = 0U, /*!< Compensation 0 */
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kDMIC_CompValueNegativePoint16 = 1U, /*!< Compensation -0.16 */
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kDMIC_CompValueNegativePoint15 = 2U, /*!< Compensation -0.15 */
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kDMIC_CompValueNegativePoint13 = 3U, /*!< Compensation -0.13 */
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} compensation_t;
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/*! @brief DMIC DC filter control values. */
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typedef enum _dc_removal
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{
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kDMIC_DcNoRemove = 0U, /*!< Flat response no filter */
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kDMIC_DcCut155 = 1U, /*!< Cut off Frequency is 155 Hz */
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kDMIC_DcCut78 = 2U, /*!< Cut off Frequency is 78 Hz */
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kDMIC_DcCut39 = 3U, /*!< Cut off Frequency is 39 Hz */
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} dc_removal_t;
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/*! @brief DMIC IO configiration. */
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typedef enum _dmic_io
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{
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kDMIC_PdmDual = 0U, /*!< Two separate pairs of PDM wires */
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kDMIC_PdmStereo = 4U, /*!< Stereo Mic */
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kDMIC_PdmBypass = 3U, /*!< Clk Bypass clocks both channels */
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kDMIC_PdmBypassClk0 = 1U, /*!< Clk Bypass clocks only channel0 */
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kDMIC_PdmBypassClk1 = 2U, /*!< Clk Bypas clocks only channel1 */
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} dmic_io_t;
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/*! @brief DMIC Channel number. */
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typedef enum _dmic_channel
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{
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kDMIC_Channel0 = 0U, /*!< DMIC channel 0 */
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kDMIC_Channel1 = 1U, /*!< DMIC channel 1 */
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} dmic_channel_t;
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/*! @brief DMIC and decimator sample rates. */
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typedef enum _dmic_phy_sample_rate
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{
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kDMIC_PhyFullSpeed = 0U, /*!< Decimator gets one sample per each chosen clock edge of PDM interface */
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kDMIC_PhyHalfSpeed = 1U, /*!< PDM clock to Microphone is halved, decimator receives each sample twice */
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} dmic_phy_sample_rate_t;
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/*! @brief DMIC transfer status.*/
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enum _dmic_status
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{
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kStatus_DMIC_Busy = MAKE_STATUS(kStatusGroup_DMIC, 0), /*!< DMIC is busy */
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kStatus_DMIC_Idle = MAKE_STATUS(kStatusGroup_DMIC, 1), /*!< DMIC is idle */
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kStatus_DMIC_OverRunError = MAKE_STATUS(kStatusGroup_DMIC, 2), /*!< DMIC over run Error */
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kStatus_DMIC_UnderRunError = MAKE_STATUS(kStatusGroup_DMIC, 3), /*!< DMIC under run Error */
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};
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/*! @brief DMIC Channel configuration structure. */
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typedef struct _dmic_channel_config
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{
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pdm_div_t divhfclk; /*!< DMIC Clock pre-divider values */
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uint32_t osr; /*!< oversampling rate(CIC decimation rate) for PCM */
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int32_t gainshft; /*!< 4FS PCM data gain control */
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compensation_t preac2coef; /*!< Pre-emphasis Filter coefficient value for 2FS */
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compensation_t preac4coef; /*!< Pre-emphasis Filter coefficient value for 4FS */
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dc_removal_t dc_cut_level; /*!< DMIC DC filter control values. */
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uint32_t post_dc_gain_reduce; /*!< Fine gain adjustment in the form of a number of bits to downshift */
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dmic_phy_sample_rate_t sample_rate; /*!< DMIC and decimator sample rates */
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bool saturate16bit; /*!< Selects 16-bit saturation. 0 means results roll over if out range and do not saturate.
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1 means if the result overflows, it saturates at 0xFFFF for positive overflow and
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0x8000 for negative overflow.*/
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} dmic_channel_config_t;
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/*! @brief DMIC Callback function. */
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typedef void (*dmic_callback_t)(void);
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/*! @brief HWVAD Callback function. */
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typedef void (*dmic_hwvad_callback_t)(void);
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/*******************************************************************************
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* API
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******************************************************************************/
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*!
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* @brief Get the DMIC instance from peripheral base address.
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*
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* @param base DMIC peripheral base address.
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* @return DMIC instance.
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*/
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uint32_t DMIC_GetInstance(DMIC_Type *base);
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/*!
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* @brief Turns DMIC Clock on
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* @param base : DMIC base
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* @return Nothing
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*/
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void DMIC_Init(DMIC_Type *base);
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/*!
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* @brief Turns DMIC Clock off
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* @param base : DMIC base
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* @return Nothing
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*/
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void DMIC_DeInit(DMIC_Type *base);
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/*!
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* @brief Configure DMIC io
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* @param base : The base address of DMIC interface
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* @param config : DMIC io configuration
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* @return Nothing
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*/
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void DMIC_ConfigIO(DMIC_Type *base, dmic_io_t config);
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/*!
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* @brief Set DMIC operating mode
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* @param base : The base address of DMIC interface
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* @param mode : DMIC mode
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* @return Nothing
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*/
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void DMIC_SetOperationMode(DMIC_Type *base, operation_mode_t mode);
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/*!
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* @brief Configure DMIC channel
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* @param base : The base address of DMIC interface
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* @param channel : DMIC channel
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* @param side : stereo_side_t, choice of left or right
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* @param channel_config : Channel configuration
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* @return Nothing
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*/
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void DMIC_ConfigChannel(DMIC_Type *base,
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dmic_channel_t channel,
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stereo_side_t side,
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dmic_channel_config_t *channel_config);
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/*!
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* @brief Configure DMIC channel
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* @param base : The base address of DMIC interface
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* @param channel : DMIC channel
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* @param dc_cut_level : dc_removal_t, Cut off Frequency
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* @param post_dc_gain_reduce : Fine gain adjustment in the form of a number of bits to downshift.
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* @param saturate16bit : If selects 16-bit saturation.
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*/
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void DMIC_CfgChannelDc(DMIC_Type *base,
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dmic_channel_t channel,
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dc_removal_t dc_cut_level,
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uint32_t post_dc_gain_reduce,
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bool saturate16bit);
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/*!
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* @brief Configure Clock scaling
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* @param base : The base address of DMIC interface
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* @param use2fs : clock scaling
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* @return Nothing
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*/
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void DMIC_Use2fs(DMIC_Type *base, bool use2fs);
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/*!
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* @brief Enable a particualr channel
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* @param base : The base address of DMIC interface
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* @param channelmask : Channel selection
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* @return Nothing
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*/
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void DMIC_EnableChannnel(DMIC_Type *base, uint32_t channelmask);
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/*!
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* @brief Configure fifo settings for DMIC channel
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* @param base : The base address of DMIC interface
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* @param channel : DMIC channel
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* @param trig_level : FIFO trigger level
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* @param enable : FIFO level
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* @param resetn : FIFO reset
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* @return Nothing
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*/
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void DMIC_FifoChannel(DMIC_Type *base, uint32_t channel, uint32_t trig_level, uint32_t enable, uint32_t resetn);
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/*!
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* @brief Get FIFO status
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* @param base : The base address of DMIC interface
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* @param channel : DMIC channel
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* @return FIFO status
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*/
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static inline uint32_t DMIC_FifoGetStatus(DMIC_Type *base, uint32_t channel)
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{
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return base->CHANNEL[channel].FIFO_STATUS;
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}
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/*!
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* @brief Clear FIFO status
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* @param base : The base address of DMIC interface
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* @param channel : DMIC channel
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* @param mask : Bits to be cleared
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* @return FIFO status
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*/
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static inline void DMIC_FifoClearStatus(DMIC_Type *base, uint32_t channel, uint32_t mask)
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{
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base->CHANNEL[channel].FIFO_STATUS = mask;
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}
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/*!
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* @brief Get FIFO data
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* @param base : The base address of DMIC interface
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* @param channel : DMIC channel
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* @return FIFO data
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*/
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static inline uint32_t DMIC_FifoGetData(DMIC_Type *base, uint32_t channel)
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{
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return base->CHANNEL[channel].FIFO_DATA;
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}
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/*!
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* @brief Enable callback.
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* This function enables the interrupt for the selected DMIC peripheral.
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* The callback function is not enabled until this function is called.
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*
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* @param base Base address of the DMIC peripheral.
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* @param cb callback Pointer to store callback function.
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* @retval None.
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*/
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void DMIC_EnableIntCallback(DMIC_Type *base, dmic_callback_t cb);
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/*!
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* @brief Disable callback.
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* This function disables the interrupt for the selected DMIC peripheral.
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*
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* @param base Base address of the DMIC peripheral.
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* @param cb callback Pointer to store callback function..
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* @retval None.
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*/
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void DMIC_DisableIntCallback(DMIC_Type *base, dmic_callback_t cb);
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/**
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* @}
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*/
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/*!
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* @name hwvad
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* @{
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*/
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/*!
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* @brief Sets the gain value for the noise estimator.
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*
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* @param base DMIC base pointer
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* @param value gain value for the noise estimator.
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* @retval None.
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*/
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static inline void DMIC_SetGainNoiseEstHwvad(DMIC_Type *base, uint32_t value)
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{
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assert(NULL != base);
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base->HWVADTHGN = value & 0xFu;
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}
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/*!
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* @brief Sets the gain value for the signal estimator.
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*
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* @param base DMIC base pointer
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* @param value gain value for the signal estimator.
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* @retval None.
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*/
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static inline void DMIC_SetGainSignalEstHwvad(DMIC_Type *base, uint32_t value)
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{
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assert(NULL != base);
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base->HWVADTHGS = value & 0xFu;
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}
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/*!
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* @brief Sets the hwvad filter cutoff frequency parameter.
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*
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* @param base DMIC base pointer
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* @param value cut off frequency value.
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* @retval None.
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*/
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static inline void DMIC_SetFilterCtrlHwvad(DMIC_Type *base, uint32_t value)
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{
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assert(NULL != base);
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base->HWVADHPFS = value & 0x3u;
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}
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/*!
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* @brief Sets the input gain of hwvad.
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*
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* @param base DMIC base pointer
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* @param value input gain value for hwvad.
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* @retval None.
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*/
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static inline void DMIC_SetInputGainHwvad(DMIC_Type *base, uint32_t value)
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{
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assert(NULL != base);
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base->HWVADGAIN = value & 0xFu;
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}
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/*!
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* @brief Clears hwvad internal interrupt flag.
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*
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* @param base DMIC base pointer
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* @param st10 bit value.
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* @retval None.
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*/
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static inline void DMIC_CtrlClrIntrHwvad(DMIC_Type *base, bool st10)
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{
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assert(NULL != base);
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base->HWVADST10 = (st10) ? 0x1 : 0x0;
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}
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/*!
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* @brief Resets hwvad filters.
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*
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* @param base DMIC base pointer
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* @param rstt Reset bit value.
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* @retval None.
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*/
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static inline void DMIC_FilterResetHwvad(DMIC_Type *base, bool rstt)
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{
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assert(NULL != base);
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base->HWVADRSTT = (rstt) ? 0x1 : 0x0;
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}
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/*!
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* @brief Gets the value from output of the filter z7.
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*
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* @param base DMIC base pointer
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* @retval output of filter z7.
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*/
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static inline uint16_t DMIC_GetNoiseEnvlpEst(DMIC_Type *base)
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{
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assert(NULL != base);
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return (base->HWVADLOWZ & 0xFFFFu);
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}
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/*!
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* @brief Enable hwvad callback.
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* This function enables the hwvad interrupt for the selected DMIC peripheral.
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* The callback function is not enabled until this function is called.
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*
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* @param base Base address of the DMIC peripheral.
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* @param vadcb callback Pointer to store callback function.
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* @retval None.
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*/
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void DMIC_HwvadEnableIntCallback(DMIC_Type *base, dmic_hwvad_callback_t vadcb);
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/*!
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* @brief Disable callback.
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* This function disables the hwvad interrupt for the selected DMIC peripheral.
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*
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* @param base Base address of the DMIC peripheral.
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* @param vadcb callback Pointer to store callback function..
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* @retval None.
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*/
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void DMIC_HwvadDisableIntCallback(DMIC_Type *base, dmic_hwvad_callback_t vadcb);
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/*! @} */
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#ifdef __cplusplus
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}
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#endif
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/*! @}*/
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#endif /* __FSL_DMIC_H */
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