316 lines
9.7 KiB
C
316 lines
9.7 KiB
C
/*
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* File : board.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2009 RT-Thread Develop Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2009-01-05 Bernard first implementation
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include "stm32f10x.h"
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#include "stm32f10x_fsmc.h"
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#include "board.h"
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static void rt_hw_console_init(void);
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/**
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* @addtogroup STM32
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*/
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/*@{*/
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/*******************************************************************************
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* Function Name : NVIC_Configuration
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* Description : Configures Vector Table base location.
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* Input : None
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* Output : None
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* Return : None
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*******************************************************************************/
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void NVIC_Configuration(void)
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{
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#ifdef VECT_TAB_RAM
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/* Set the Vector Table base location at 0x20000000 */
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NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
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#else /* VECT_TAB_FLASH */
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/* Set the Vector Table base location at 0x08000000 */
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NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
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#endif
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}
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/*******************************************************************************
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* Function Name : SysTick_Configuration
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* Description : Configures the SysTick for OS tick.
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* Input : None
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* Output : None
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* Return : None
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*******************************************************************************/
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void SysTick_Configuration(void)
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{
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RCC_ClocksTypeDef rcc_clocks;
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rt_uint32_t cnts;
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RCC_GetClocksFreq(&rcc_clocks);
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cnts = (rt_uint32_t)rcc_clocks.HCLK_Frequency / RT_TICK_PER_SECOND;
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SysTick_Config(cnts);
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SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK);
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}
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#if STM32_EXT_SRAM
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#define Bank1_SRAM3_ADDR ((u32)0x68000000)
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void EXT_SRAM_Configuration(void)
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{
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FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
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FSMC_NORSRAMTimingInitTypeDef p;
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GPIO_InitTypeDef GPIO_InitStructure;
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RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOG | RCC_APB2Periph_GPIOE |
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RCC_APB2Periph_GPIOF, ENABLE);
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/*-- GPIO Configuration ------------------------------------------------------*/
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/* SRAM Data lines configuration */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_8 | GPIO_Pin_9 |
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GPIO_Pin_10 | GPIO_Pin_14 | GPIO_Pin_15;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_Init(GPIOD, &GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 |
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GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 |
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GPIO_Pin_15;
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GPIO_Init(GPIOE, &GPIO_InitStructure);
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/* SRAM Address lines configuration */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 |
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GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_12 | GPIO_Pin_13 |
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GPIO_Pin_14 | GPIO_Pin_15;
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GPIO_Init(GPIOF, &GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 |
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GPIO_Pin_4 | GPIO_Pin_5;
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GPIO_Init(GPIOG, &GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13;
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GPIO_Init(GPIOD, &GPIO_InitStructure);
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/* NOE and NWE configuration */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 |GPIO_Pin_5;
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GPIO_Init(GPIOD, &GPIO_InitStructure);
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/* NE3 NE4 configuration */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10 | GPIO_Pin_12;
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GPIO_Init(GPIOG, &GPIO_InitStructure);
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/* NBL0, NBL1 configuration */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1;
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GPIO_Init(GPIOE, &GPIO_InitStructure);
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/*-- FSMC Configuration ------------------------------------------------------*/
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p.FSMC_AddressSetupTime = 0;
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p.FSMC_AddressHoldTime = 0;
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p.FSMC_DataSetupTime = 2;
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p.FSMC_BusTurnAroundDuration = 0;
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p.FSMC_CLKDivision = 0;
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p.FSMC_DataLatency = 0;
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p.FSMC_AccessMode = FSMC_AccessMode_A;
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FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3;
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FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
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FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
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FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
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FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
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FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
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FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
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FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
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FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
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FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
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FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
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FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
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FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
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FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
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FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
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/* Enable FSMC Bank1_SRAM Bank */
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FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE);
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}
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#endif
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/**
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* This is the timer interrupt service routine.
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*
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*/
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void rt_hw_timer_handler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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rt_tick_increase();
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/* leave interrupt */
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rt_interrupt_leave();
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}
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/**
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* This function will initial STM32 board.
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*/
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void rt_hw_board_init()
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{
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/* NVIC Configuration */
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NVIC_Configuration();
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/* Configure the SysTick */
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SysTick_Configuration();
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#if STM32_EXT_SRAM
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EXT_SRAM_Configuration();
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#endif
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rt_hw_console_init();
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}
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#if STM32_CONSOLE_USART == 1
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#define CONSOLE_TX_PIN GPIO_Pin_9
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#define CONSOLE_RX_PIN GPIO_Pin_10
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#define CONSOLE_GPIO GPIOA
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#define CONSOLE_USART USART1
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#define CONSOLE_RCC RCC_APB2Periph_USART1
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#define CONSOLE_RCC_GPIO RCC_APB2Periph_GPIOA
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#elif STM32_CONSOLE_USART == 2
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#if defined(STM32F10X_LD) || defined(STM32F10X_MD) || defined(STM32F10X_CL)
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#define CONSOLE_TX_PIN GPIO_Pin_5
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#define CONSOLE_RX_PIN GPIO_Pin_6
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#define CONSOLE_GPIO GPIOD
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#define CONSOLE_RCC RCC_APB1Periph_USART2
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#define CONSOLE_RCC_GPIO RCC_APB2Periph_GPIOD
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#elif defined(STM32F10X_HD)
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#define CONSOLE_TX_PIN GPIO_Pin_2
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#define CONSOLE_RX_PIN GPIO_Pin_3
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#define CONSOLE_GPIO GPIOA
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#define CONSOLE_RCC RCC_APB1Periph_USART2
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#define CONSOLE_RCC_GPIO RCC_APB2Periph_GPIOA
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#endif
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#define CONSOLE_USART USART2
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#elif STM32_CONSOLE_USART == 2
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#define CONSOLE_RX_PIN GPIO_Pin_11
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#define CONSOLE_TX_PIN GPIO_Pin_10
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#define CONSOLE_GPIO GPIOB
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#define CONSOLE_USART USART3
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#define CONSOLE_RCC RCC_APB1Periph_USART3
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#define CONSOLE_RCC_GPIO RCC_APB2Periph_GPIOB
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#endif
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/* init console to support rt_kprintf */
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static void rt_hw_console_init()
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{
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#if STM32_CONSOLE_USART == 0
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#else
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/* Enable GPIOx clock */
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RCC_APB2PeriphClockCmd(CONSOLE_RCC_GPIO, ENABLE);
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#if STM32_CONSOLE_USART == 1
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/* Enable USART1 and GPIOA clocks */
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RCC_APB2PeriphClockCmd(CONSOLE_RCC, ENABLE);
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#else
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RCC_APB1PeriphClockCmd(CONSOLE_RCC, ENABLE);
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#endif
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#if (STM32_CONSOLE_USART == 2) && (defined(STM32F10X_LD) || defined(STM32F10X_MD) || defined(STM32F10X_CL))
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/* Enable AFIO clock */
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
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/* Enable the USART2 Pins Software Remapping */
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GPIO_PinRemapConfig(GPIO_Remap_USART2, ENABLE);
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#endif
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/* GPIO configuration */
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{
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GPIO_InitTypeDef GPIO_InitStructure;
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/* Configure USART Tx as alternate function push-pull */
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GPIO_InitStructure.GPIO_Pin = CONSOLE_TX_PIN;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_Init(CONSOLE_GPIO, &GPIO_InitStructure);
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/* Configure USART Rx as input floating */
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GPIO_InitStructure.GPIO_Pin = CONSOLE_RX_PIN;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_Init(CONSOLE_GPIO, &GPIO_InitStructure);
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}
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/* USART configuration */
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{
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USART_InitTypeDef USART_InitStructure;
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/* USART configured as follow:
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- BaudRate = 115200 baud
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- Word Length = 8 Bits
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- One Stop Bit
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- No parity
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- Hardware flow control disabled (RTS and CTS signals)
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- Receive and transmit enabled
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- USART Clock disabled
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- USART CPOL: Clock is active low
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- USART CPHA: Data is captured on the middle
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- USART LastBit: The clock pulse of the last data bit is not output to
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the SCLK pin
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*/
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USART_InitStructure.USART_BaudRate = 115200;
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USART_InitStructure.USART_WordLength = USART_WordLength_8b;
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USART_InitStructure.USART_StopBits = USART_StopBits_1;
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USART_InitStructure.USART_Parity = USART_Parity_No;
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USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
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USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
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USART_Init(CONSOLE_USART, &USART_InitStructure);
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/* Enable USART */
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USART_Cmd(CONSOLE_USART, ENABLE);
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}
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#endif
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}
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/* write one character to serial, must not trigger interrupt */
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static void rt_hw_console_putc(const char c)
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{
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/*
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to be polite with serial console add a line feed
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to the carriage return character
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*/
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if (c=='\n')rt_hw_console_putc('\r');
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while (!(CONSOLE_USART->SR & USART_FLAG_TXE));
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CONSOLE_USART->DR = (c & 0x1FF);
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}
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/**
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* This function is used by rt_kprintf to display a string on console.
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*
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* @param str the displayed string
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*/
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void rt_hw_console_output(const char* str)
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{
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#if STM32_CONSOLE_USART == 0
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/* no console */
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#else
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while (*str)
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{
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rt_hw_console_putc (*str++);
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}
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#endif
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}
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/*@}*/
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