208 lines
9.9 KiB
C
208 lines
9.9 KiB
C
/*
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* The Clear BSD License
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* Copyright (c) 2016, Freescale Semiconductor, Inc.
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* Copyright 2016-2017 NXP
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted (subject to the limitations in the disclaimer below) provided
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* that the following conditions are met:
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*
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* o Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* o Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* o Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _FSL_IOCON_H_
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#define _FSL_IOCON_H_
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#include "fsl_common.h"
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/*!
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* @addtogroup lpc_iocon
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* @{
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*/
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/*! @file */
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/* Component ID definition, used by tools. */
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#ifndef FSL_COMPONENT_ID
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#define FSL_COMPONENT_ID "platform.drivers.lpc_iocon"
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#endif
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/*! @name Driver version */
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/*@{*/
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/*! @brief IOCON driver version 2.0.0. */
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#define FSL_IOCON_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
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/*@}*/
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/**
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* @brief Array of IOCON pin definitions passed to IOCON_SetPinMuxing() must be in this format
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*/
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typedef struct _iocon_group
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{
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uint32_t port : 8; /* Pin port */
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uint32_t pin : 8; /* Pin number */
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uint32_t ionumber : 8; /* IO number */
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uint32_t modefunc : 16; /* Function and mode */
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} iocon_group_t;
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/**
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* @brief IOCON function and mode selection definitions
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* @note See the User Manual for specific modes and functions supported by the various pins.
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*/
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#if defined(FSL_FEATURE_IOCON_FUNC_FIELD_WIDTH) && (FSL_FEATURE_IOCON_FUNC_FIELD_WIDTH == 4)
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#define IOCON_FUNC0 0x0 /*!< Selects pin function 0 */
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#define IOCON_FUNC1 0x1 /*!< Selects pin function 1 */
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#define IOCON_FUNC2 0x2 /*!< Selects pin function 2 */
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#define IOCON_FUNC3 0x3 /*!< Selects pin function 3 */
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#define IOCON_FUNC4 0x4 /*!< Selects pin function 4 */
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#define IOCON_FUNC5 0x5 /*!< Selects pin function 5 */
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#define IOCON_FUNC6 0x6 /*!< Selects pin function 6 */
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#define IOCON_FUNC7 0x7 /*!< Selects pin function 7 */
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#define IOCON_FUNC8 0x8 /*!< Selects pin function 8 */
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#define IOCON_FUNC9 0x9 /*!< Selects pin function 9 */
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#define IOCON_FUNC10 0xA /*!< Selects pin function 10 */
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#define IOCON_FUNC11 0xB /*!< Selects pin function 11 */
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#define IOCON_FUNC12 0xC /*!< Selects pin function 12 */
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#define IOCON_FUNC13 0xD /*!< Selects pin function 13 */
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#define IOCON_FUNC14 0xE /*!< Selects pin function 14 */
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#define IOCON_FUNC15 0xF /*!< Selects pin function 15 */
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#define IOCON_MODE_INACT (0x0 << 4) /*!< No addition pin function */
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#define IOCON_MODE_PULLDOWN (0x1 << 4) /*!< Selects pull-down function */
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#define IOCON_MODE_PULLUP (0x2 << 4) /*!< Selects pull-up function */
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#define IOCON_MODE_REPEATER (0x3 << 4) /*!< Selects pin repeater function */
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#define IOCON_HYS_EN (0x1 << 6) /*!< Enables hysteresis */
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#define IOCON_GPIO_MODE (0x1 << 6) /*!< GPIO Mode */
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#define IOCON_I2C_SLEW (0x0 << 6) /*!< I2C Slew Rate Control */
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#define IOCON_INV_EN (0x1 << 7) /*!< Enables invert function on input */
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#define IOCON_ANALOG_EN (0x0 << 8) /*!< Enables analog function by setting 0 to bit 7 */
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#define IOCON_DIGITAL_EN (0x1 << 8) /*!< Enables digital function by setting 1 to bit 7(default) */
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#define IOCON_STDI2C_EN (0x1 << 9) /*!< I2C standard mode/fast-mode */
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#define IOCON_FASTI2C_EN (0x3 << 9) /*!< I2C Fast-mode Plus and high-speed slave */
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#define IOCON_INPFILT_OFF (0x1 << 9) /*!< Input filter Off for GPIO pins */
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#define IOCON_INPFILT_ON (0x0 << 9) /*!< Input filter On for GPIO pins */
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#define IOCON_OPENDRAIN_EN (0x1 << 11) /*!< Enables open-drain function */
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#define IOCON_S_MODE_0CLK (0x0 << 12) /*!< Bypass input filter */
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#define IOCON_S_MODE_1CLK (0x1 << 12) /*!< Input pulses shorter than 1 filter clock are rejected */
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#define IOCON_S_MODE_2CLK (0x2 << 12) /*!< Input pulses shorter than 2 filter clock2 are rejected */
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#define IOCON_S_MODE_3CLK (0x3 << 12) /*!< Input pulses shorter than 3 filter clock2 are rejected */
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#define IOCON_S_MODE(clks) ((clks) << 12) /*!< Select clocks for digital input filter mode */
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#define IOCON_CLKDIV(div) \
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((div) << 14) /*!< Select peripheral clock divider for input filter sampling clock, 2^n, n=0-6 */
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#else
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#define IOCON_FUNC0 0x0 /*!< Selects pin function 0 */
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#define IOCON_FUNC1 0x1 /*!< Selects pin function 1 */
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#define IOCON_FUNC2 0x2 /*!< Selects pin function 2 */
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#define IOCON_FUNC3 0x3 /*!< Selects pin function 3 */
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#define IOCON_FUNC4 0x4 /*!< Selects pin function 4 */
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#define IOCON_FUNC5 0x5 /*!< Selects pin function 5 */
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#define IOCON_FUNC6 0x6 /*!< Selects pin function 6 */
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#define IOCON_FUNC7 0x7 /*!< Selects pin function 7 */
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#define IOCON_MODE_INACT (0x0 << 3) /*!< No addition pin function */
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#define IOCON_MODE_PULLDOWN (0x1 << 3) /*!< Selects pull-down function */
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#define IOCON_MODE_PULLUP (0x2 << 3) /*!< Selects pull-up function */
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#define IOCON_MODE_REPEATER (0x3 << 3) /*!< Selects pin repeater function */
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#define IOCON_HYS_EN (0x1 << 5) /*!< Enables hysteresis */
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#define IOCON_GPIO_MODE (0x1 << 5) /*!< GPIO Mode */
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#define IOCON_I2C_SLEW (0x0 << 5) /*!< I2C Slew Rate Control */
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#define IOCON_INV_EN (0x1 << 6) /*!< Enables invert function on input */
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#define IOCON_ANALOG_EN (0x0 << 7) /*!< Enables analog function by setting 0 to bit 7 */
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#define IOCON_DIGITAL_EN (0x1 << 7) /*!< Enables digital function by setting 1 to bit 7(default) */
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#define IOCON_STDI2C_EN (0x1 << 8) /*!< I2C standard mode/fast-mode */
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#define IOCON_FASTI2C_EN (0x3 << 8) /*!< I2C Fast-mode Plus and high-speed slave */
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#define IOCON_INPFILT_OFF (0x1 << 8) /*!< Input filter Off for GPIO pins */
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#define IOCON_INPFILT_ON (0x0 << 8) /*!< Input filter On for GPIO pins */
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#define IOCON_OPENDRAIN_EN (0x1 << 10) /*!< Enables open-drain function */
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#define IOCON_S_MODE_0CLK (0x0 << 11) /*!< Bypass input filter */
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#define IOCON_S_MODE_1CLK (0x1 << 11) /*!< Input pulses shorter than 1 filter clock are rejected */
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#define IOCON_S_MODE_2CLK (0x2 << 11) /*!< Input pulses shorter than 2 filter clock2 are rejected */
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#define IOCON_S_MODE_3CLK (0x3 << 11) /*!< Input pulses shorter than 3 filter clock2 are rejected */
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#define IOCON_S_MODE(clks) ((clks) << 11) /*!< Select clocks for digital input filter mode */
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#define IOCON_CLKDIV(div) \
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((div) << 13) /*!< Select peripheral clock divider for input filter sampling clock, 2^n, n=0-6 */
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#endif
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#if defined(__cplusplus)
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extern "C" {
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#endif
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#if (defined(FSL_FEATURE_IOCON_ONE_DIMENSION) && (FSL_FEATURE_IOCON_ONE_DIMENSION == 1))
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/**
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* @brief Sets I/O Control pin mux
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* @param base : The base of IOCON peripheral on the chip
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* @param ionumber : GPIO number to mux
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* @param modefunc : OR'ed values of type IOCON_*
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* @return Nothing
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*/
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__STATIC_INLINE void IOCON_PinMuxSet(IOCON_Type *base, uint8_t ionumber, uint32_t modefunc)
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{
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base->PIO[ionumber] = modefunc;
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}
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#else
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/**
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* @brief Sets I/O Control pin mux
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* @param base : The base of IOCON peripheral on the chip
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* @param port : GPIO port to mux
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* @param pin : GPIO pin to mux
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* @param modefunc : OR'ed values of type IOCON_*
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* @return Nothing
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*/
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__STATIC_INLINE void IOCON_PinMuxSet(IOCON_Type *base, uint8_t port, uint8_t pin, uint32_t modefunc)
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{
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base->PIO[port][pin] = modefunc;
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}
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#endif
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/**
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* @brief Set all I/O Control pin muxing
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* @param base : The base of IOCON peripheral on the chip
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* @param pinArray : Pointer to array of pin mux selections
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* @param arrayLength : Number of entries in pinArray
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* @return Nothing
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*/
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__STATIC_INLINE void IOCON_SetPinMuxing(IOCON_Type *base, const iocon_group_t *pinArray, uint32_t arrayLength)
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{
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uint32_t i;
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for (i = 0; i < arrayLength; i++)
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{
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#if (defined(FSL_FEATURE_IOCON_ONE_DIMENSION) && (FSL_FEATURE_IOCON_ONE_DIMENSION == 1))
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IOCON_PinMuxSet(base, pinArray[i].ionumber, pinArray[i].modefunc);
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#else
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IOCON_PinMuxSet(base, pinArray[i].port, pinArray[i].pin, pinArray[i].modefunc);
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#endif /* FSL_FEATURE_IOCON_ONE_DIMENSION */
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}
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}
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/* @} */
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#if defined(__cplusplus)
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}
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#endif
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#endif /* _FSL_IOCON_H_ */
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