267 lines
6.7 KiB
C
267 lines
6.7 KiB
C
/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2019-03-19 ZYH first version
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#include <fpioa.h>
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#include <gpiohs.h>
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#include "drv_gpio.h"
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#include "drv_io_config.h"
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#include <plic.h>
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#include <rthw.h>
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#include <utils.h>
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#include <string.h>
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#define DBG_ENABLE
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#define DBG_TAG "PIN"
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#define DBG_LVL DBG_WARNING
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#define DBG_COLOR
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#include <rtdbg.h>
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#define FUNC_GPIOHS(n) (FUNC_GPIOHS0 + n)
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static short pin_alloc_table[FPIOA_NUM_IO];
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static uint32_t free_pin = 0;
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static int alloc_pin_channel(rt_base_t pin_index)
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{
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if(free_pin == 32)
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{
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LOG_E("no free gpiohs channel to alloc");
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return -1;
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}
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if(pin_alloc_table[pin_index] != -1)
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{
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LOG_W("already alloc gpiohs channel for pin %d", pin_index);
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return pin_alloc_table[pin_index];
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}
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pin_alloc_table[pin_index] = free_pin;
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free_pin++;
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fpioa_set_function(pin_index, FUNC_GPIOHS(pin_alloc_table[pin_index]));
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return pin_alloc_table[pin_index];
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}
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int get_pin_channel(rt_base_t pin_index)
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{
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return pin_alloc_table[pin_index];
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}
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static void free_pin_channel(rt_base_t pin_index)
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{
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if(pin_alloc_table[pin_index] == -1)
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{
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LOG_W("free error:not alloc gpiohs channel for pin %d", pin_index);
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return;
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}
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pin_alloc_table[pin_index] = -1;
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free_pin--;
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}
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static void drv_pin_mode(struct rt_device *device, rt_base_t pin, rt_uint8_t mode)
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{
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int pin_channel = get_pin_channel(pin);
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if(pin_channel == -1)
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{
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pin_channel = alloc_pin_channel(pin);
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if(pin_channel == -1)
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{
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return;
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}
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}
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switch (mode)
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{
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case PIN_MODE_OUTPUT:
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gpiohs_set_drive_mode(pin_channel, GPIO_DM_OUTPUT);
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break;
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case PIN_MODE_INPUT:
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gpiohs_set_drive_mode(pin_channel, GPIO_DM_INPUT);
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break;
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case PIN_MODE_INPUT_PULLUP:
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gpiohs_set_drive_mode(pin_channel, GPIO_DM_INPUT_PULL_UP);
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break;
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case PIN_MODE_INPUT_PULLDOWN:
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gpiohs_set_drive_mode(pin_channel, GPIO_DM_INPUT_PULL_DOWN);
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break;
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default:
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LOG_E("Not support mode %d", mode);
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break;
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}
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}
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static void drv_pin_write(struct rt_device *device, rt_base_t pin, rt_uint8_t value)
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{
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int pin_channel = get_pin_channel(pin);
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if(pin_channel == -1)
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{
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LOG_E("pin %d not set mode", pin);
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return;
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}
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gpiohs_set_pin(pin_channel, value == PIN_HIGH ? GPIO_PV_HIGH : GPIO_PV_LOW);
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}
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static rt_ssize_t drv_pin_read(struct rt_device *device, rt_base_t pin)
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{
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int pin_channel = get_pin_channel(pin);
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if(pin_channel == -1)
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{
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LOG_E("pin %d not set mode", pin);
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return -RT_EINVAL;
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}
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return gpiohs_get_pin(pin_channel) == GPIO_PV_HIGH ? PIN_HIGH : PIN_LOW;
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}
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static struct
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{
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void (*hdr)(void *args);
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void* args;
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gpio_pin_edge_t edge;
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} irq_table[32];
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static void pin_irq(int vector, void *param)
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{
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int pin_channel = vector - IRQN_GPIOHS0_INTERRUPT;
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if(irq_table[pin_channel].edge & GPIO_PE_FALLING)
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{
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set_gpio_bit(gpiohs->fall_ie.u32, pin_channel, 0);
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set_gpio_bit(gpiohs->fall_ip.u32, pin_channel, 1);
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set_gpio_bit(gpiohs->fall_ie.u32, pin_channel, 1);
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}
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if(irq_table[pin_channel].edge & GPIO_PE_RISING)
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{
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set_gpio_bit(gpiohs->rise_ie.u32, pin_channel, 0);
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set_gpio_bit(gpiohs->rise_ip.u32, pin_channel, 1);
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set_gpio_bit(gpiohs->rise_ie.u32, pin_channel, 1);
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}
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if(irq_table[pin_channel].edge & GPIO_PE_LOW)
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{
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set_gpio_bit(gpiohs->low_ie.u32, pin_channel, 0);
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set_gpio_bit(gpiohs->low_ip.u32, pin_channel, 1);
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set_gpio_bit(gpiohs->low_ie.u32, pin_channel, 1);
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}
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if(irq_table[pin_channel].edge & GPIO_PE_HIGH)
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{
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set_gpio_bit(gpiohs->high_ie.u32, pin_channel, 0);
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set_gpio_bit(gpiohs->high_ip.u32, pin_channel, 1);
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set_gpio_bit(gpiohs->high_ie.u32, pin_channel, 1);
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}
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if(irq_table[pin_channel].hdr)
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{
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irq_table[pin_channel].hdr(irq_table[pin_channel].args);
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}
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}
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static rt_err_t drv_pin_attach_irq(struct rt_device *device, rt_base_t pin,
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rt_uint8_t mode, void (*hdr)(void *args), void *args)
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{
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int pin_channel = get_pin_channel(pin);
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char irq_name[10];
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if(pin_channel == -1)
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{
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LOG_E("pin %d not set mode", pin);
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return -RT_ERROR;
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}
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irq_table[pin_channel].hdr = hdr;
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irq_table[pin_channel].args = args;
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switch (mode)
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{
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case PIN_IRQ_MODE_RISING:
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irq_table[pin_channel].edge = GPIO_PE_RISING;
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break;
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case PIN_IRQ_MODE_FALLING:
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irq_table[pin_channel].edge = GPIO_PE_FALLING;
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break;
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case PIN_IRQ_MODE_RISING_FALLING:
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irq_table[pin_channel].edge = GPIO_PE_BOTH;
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break;
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case PIN_IRQ_MODE_HIGH_LEVEL:
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irq_table[pin_channel].edge = GPIO_PE_LOW;
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break;
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case PIN_IRQ_MODE_LOW_LEVEL:
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irq_table[pin_channel].edge = GPIO_PE_HIGH;
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break;
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default:
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break;
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}
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gpiohs_set_pin_edge(pin_channel, irq_table[pin_channel].edge);
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rt_snprintf(irq_name, sizeof irq_name, "pin%d", pin);
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rt_hw_interrupt_install(IRQN_GPIOHS0_INTERRUPT + pin_channel, pin_irq, RT_NULL, irq_name);
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return RT_EOK;
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}
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static rt_err_t drv_pin_detach_irq(struct rt_device *device, rt_base_t pin)
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{
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rt_err_t ret = RT_EOK;
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int pin_channel = get_pin_channel(pin);
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if(pin_channel == -1)
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{
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LOG_E("pin %d not set mode", pin);
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return -RT_ERROR;
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}
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irq_table[pin_channel].hdr = RT_NULL;
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irq_table[pin_channel].args = RT_NULL;
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return ret;
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}
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static rt_err_t drv_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint8_t enabled)
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{
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int pin_channel = get_pin_channel(pin);
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if(pin_channel == -1)
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{
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LOG_E("pin %d not set mode", pin);
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return -RT_ERROR;
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}
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if(enabled)
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{
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rt_hw_interrupt_umask(IRQN_GPIOHS0_INTERRUPT + pin_channel);
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}
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else
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{
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rt_hw_interrupt_mask(IRQN_GPIOHS0_INTERRUPT + pin_channel);
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}
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return RT_EOK;
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}
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const static struct rt_pin_ops drv_pin_ops =
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{
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drv_pin_mode,
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drv_pin_write,
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drv_pin_read,
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drv_pin_attach_irq,
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drv_pin_detach_irq,
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drv_pin_irq_enable
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};
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int rt_hw_pin_init(void)
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{
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rt_err_t ret = RT_EOK;
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memset(pin_alloc_table, 0xff, sizeof pin_alloc_table);
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free_pin = GPIO_ALLOC_START;
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ret = rt_device_pin_register("pin", &drv_pin_ops, RT_NULL);
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return ret;
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}
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INIT_BOARD_EXPORT(rt_hw_pin_init);
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