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Jiaxun Yang c236e8c5d5 [bsp] Adapt ls{1b,1c}dev to new mips common code
LS1C selfboot feature have been rewiritten, and we changed
bare boot base to 0x80000000 to better utilize memory.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2019-12-17 11:09:59 +08:00

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mainmenu "RT-Thread Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config RTT_DIR
string
option env="RTT_ROOT"
default "../.."
config PKGS_DIR
string
option env="PKGS_ROOT"
default "packages"
source "$RTT_DIR/Kconfig"
source "$RTT_DIR/libcpu/mips/common/Kconfig"
source "$PKGS_DIR/Kconfig"
config SOC_LS1B
bool
select RT_USING_COMPONENTS_INIT
select RT_USING_USER_MAIN
default y
if RT_USING_SERIAL
config RT_USING_UART0
bool "Using RT_USING_UART0"
default y
config RT_USING_UART1
bool "Using RT_USING_UART1"
default n
config RT_USING_UART3
bool "Using RT_USING_UART3"
default n
config RT_UART_RX_BUFFER_SIZE
int "The rx buffer size"
default 64 if RT_USING_SERIAL
default 64
endif