114 lines
4.5 KiB
C
114 lines
4.5 KiB
C
/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2019-03-25 quanzhao the first version
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*/
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#ifndef __MMU_H_
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#define __MMU_H_
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#include <rtthread.h>
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#define DESC_SEC (0x2)
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#define MEMWBWA ((1<<12)|(3<<2)) /* write back, write allocate */
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#define MEMWB (3<<2) /* write back, no write allocate */
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#define MEMWT (2<<2) /* write through, no write allocate */
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#define SHAREDEVICE (1<<2) /* shared device */
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#define STRONGORDER (0<<2) /* strong ordered */
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#define XN (1<<4) /* eXecute Never */
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#ifdef RT_USING_SMART
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#define AP_RW (1<<10) /* supervisor=RW, user=No */
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#define AP_RO ((1<<10) |(1 << 15)) /* supervisor=RW, user=No */
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#else
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#define AP_RW (3<<10) /* supervisor=RW, user=RW */
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#define AP_RO ((2<<10) /* supervisor=RW, user=RO */
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#endif
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#define SHARED (1<<16) /* shareable */
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#define DOMAIN_FAULT (0x0)
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#define DOMAIN_CHK (0x1)
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#define DOMAIN_NOTCHK (0x3)
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#define DOMAIN0 (0x0<<5)
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#define DOMAIN1 (0x1<<5)
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#define DOMAIN0_ATTR (DOMAIN_CHK<<0)
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#define DOMAIN1_ATTR (DOMAIN_FAULT<<2)
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/* device mapping type */
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#define DEVICE_MEM (SHARED|AP_RW|DOMAIN0|SHAREDEVICE|DESC_SEC|XN)
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/* normal memory mapping type */
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#define NORMAL_MEM (SHARED|AP_RW|DOMAIN0|MEMWBWA|DESC_SEC)
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#define STRONG_ORDER_MEM (SHARED|AP_RO|XN|DESC_SEC)
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struct mem_desc
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{
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rt_uint32_t vaddr_start;
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rt_uint32_t vaddr_end;
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rt_uint32_t paddr_start;
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rt_uint32_t attr;
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};
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#define MMU_MAP_MTBL_XN (1<<0)
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#define MMU_MAP_MTBL_A (1<<1)
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#define MMU_MAP_MTBL_B (1<<2)
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#define MMU_MAP_MTBL_C (1<<3)
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#define MMU_MAP_MTBL_AP01(x) (x<<4)
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#define MMU_MAP_MTBL_TEX(x) (x<<6)
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#define MMU_MAP_MTBL_AP2(x) (x<<9)
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#define MMU_MAP_MTBL_SHARE (1<<10)
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#define MMU_MAP_MTBL_NG(x) (x<<11)
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#define MMU_MAP_K_RO (MMU_MAP_MTBL_NG(0))|(MMU_MAP_MTBL_A|MMU_MAP_MTBL_AP2(1)|MMU_MAP_MTBL_AP01(1)|MMU_MAP_MTBL_TEX(0)|MMU_MAP_MTBL_C|MMU_MAP_MTBL_SHARE)
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#define MMU_MAP_K_RWCB (MMU_MAP_MTBL_NG(0))|(MMU_MAP_MTBL_A|MMU_MAP_MTBL_AP2(0)|MMU_MAP_MTBL_AP01(1)|MMU_MAP_MTBL_TEX(0)|MMU_MAP_MTBL_B|MMU_MAP_MTBL_C|MMU_MAP_MTBL_SHARE)
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#define MMU_MAP_K_RW (MMU_MAP_MTBL_NG(0))|(MMU_MAP_MTBL_A|MMU_MAP_MTBL_AP2(0)|MMU_MAP_MTBL_AP01(1)|MMU_MAP_MTBL_TEX(0)|MMU_MAP_MTBL_SHARE)
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#define MMU_MAP_K_DEVICE (MMU_MAP_MTBL_NG(0))|(MMU_MAP_MTBL_A|MMU_MAP_MTBL_AP2(0)|MMU_MAP_MTBL_AP01(1)|MMU_MAP_MTBL_TEX(0)|MMU_MAP_MTBL_B|MMU_MAP_MTBL_SHARE)
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#define MMU_MAP_U_RO (MMU_MAP_MTBL_NG(1))|(MMU_MAP_MTBL_A|MMU_MAP_MTBL_AP2(0)|MMU_MAP_MTBL_AP01(2)|MMU_MAP_MTBL_TEX(0)|MMU_MAP_MTBL_C|MMU_MAP_MTBL_SHARE)
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#define MMU_MAP_U_RWCB (MMU_MAP_MTBL_NG(1))|(MMU_MAP_MTBL_A|MMU_MAP_MTBL_AP2(0)|MMU_MAP_MTBL_AP01(3)|MMU_MAP_MTBL_TEX(0)|MMU_MAP_MTBL_B|MMU_MAP_MTBL_C|MMU_MAP_MTBL_SHARE)
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#define MMU_MAP_U_RW (MMU_MAP_MTBL_NG(1))|(MMU_MAP_MTBL_A|MMU_MAP_MTBL_AP2(0)|MMU_MAP_MTBL_AP01(3)|MMU_MAP_MTBL_TEX(0)|MMU_MAP_MTBL_SHARE)
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#define MMU_MAP_U_DEVICE (MMU_MAP_MTBL_NG(1))|(MMU_MAP_MTBL_A|MMU_MAP_MTBL_AP2(0)|MMU_MAP_MTBL_AP01(3)|MMU_MAP_MTBL_TEX(0)|MMU_MAP_MTBL_B|MMU_MAP_MTBL_SHARE)
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#define ARCH_SECTION_SHIFT 20
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#define ARCH_SECTION_SIZE (1 << ARCH_SECTION_SHIFT)
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#define ARCH_SECTION_MASK (ARCH_SECTION_SIZE - 1)
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#define ARCH_PAGE_SHIFT 12
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#define ARCH_PAGE_SIZE (1 << ARCH_PAGE_SHIFT)
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#define ARCH_PAGE_MASK (ARCH_PAGE_SIZE - 1)
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#define ARCH_PAGE_TBL_SHIFT 10
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#define ARCH_PAGE_TBL_SIZE (1 << ARCH_PAGE_TBL_SHIFT)
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#define ARCH_PAGE_TBL_MASK (ARCH_PAGE_TBL_SIZE - 1)
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#define ARCH_MMU_USED_MASK 3
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#define ARCH_TYPE_SUPERSECTION (1 << 18)
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#define ARCH_ADDRESS_WIDTH_BITS 32
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typedef struct
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{
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size_t *vtable;
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size_t vstart;
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size_t vend;
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size_t pv_off;
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} rt_mmu_info;
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int rt_hw_mmu_map_init(rt_mmu_info *mmu_info, void* v_address, size_t size, size_t *vtable, size_t pv_off);
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int rt_hw_mmu_ioremap_init(rt_mmu_info *mmu_info, void* v_address, size_t size);
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void rt_hw_init_mmu_table(struct mem_desc *mdesc, rt_uint32_t size);
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#ifdef RT_USING_SMART
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void *rt_hw_mmu_map(rt_mmu_info *mmu_info, void *v_addr, void* p_addr, size_t size, size_t attr);
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void *rt_hw_mmu_map_auto(rt_mmu_info *mmu_info, void *v_addr, size_t size, size_t attr);
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#else
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void *rt_hw_mmu_map(rt_mmu_info *mmu_info, void* p_addr, size_t size, size_t attr);
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#endif
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void rt_hw_mmu_unmap(rt_mmu_info *mmu_info, void* v_addr, size_t size);
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void *rt_hw_mmu_v2p(rt_mmu_info *mmu_info, void* v_addr);
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#endif
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