113 lines
2.4 KiB
C
113 lines
2.4 KiB
C
/**************************************************************************//**
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*
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* @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-1-16 Wayne First version
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*
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******************************************************************************/
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#include <rtthread.h>
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#include <NuMicro.h>
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#include "drv_uart.h"
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#include "board.h"
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#include "nutool_pincfg.h"
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#include "nutool_modclkcfg.h"
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#ifdef __CC_ARM
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#elif __ICCARM__
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#pragma section="HEAP"
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#else
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extern int __bss_end;
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extern int __ram_top;
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#endif
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/**
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* This function will initial M487 board.
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*/
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void rt_hw_board_init(void)
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{
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/* Init System/modules clock */
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nutool_modclkcfg_init();
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/* Unlock protected registers */
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SYS_UnlockReg();
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/* Init all pin function setting */
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nutool_pincfg_init();
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/* Configure SysTick */
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SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
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/* Update System Core Clock */
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/* User can use SystemCoreClockUpdate() to calculate SystemCoreClock. */
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SystemCoreClockUpdate();
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#if defined(BSP_USING_EADC)
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/* Vref connect to internal */
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SYS->VREFCTL = (SYS->VREFCTL & ~SYS_VREFCTL_VREFCTL_Msk) | SYS_VREFCTL_VREF_3_0V;
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#endif
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/* Lock protected registers */
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SYS_LockReg();
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#ifdef RT_USING_HEAP
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#ifdef __CC_ARM
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rt_system_heap_init((void *)&Image$$RW_IRAM1$$ZI$$Limit, (void *)SRAM_END);
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#elif __ICCARM__
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rt_system_heap_init(__segment_end("HEAP"), (void *)SRAM_END);
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#else
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/* init memory system */
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rt_system_heap_init((void *)&__bss_end, (void *)&__ram_top);
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#endif
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#endif /* RT_USING_HEAP */
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#if defined(BSP_USING_UART)
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rt_hw_uart_init();
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#endif
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#ifdef RT_USING_CONSOLE
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rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
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#endif
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NVIC_SetPriorityGrouping(7);
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#ifdef RT_USING_COMPONENTS_INIT
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rt_components_board_init();
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#endif
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}
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/**
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* This is the timer interrupt service routine.
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*
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*/
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void SysTick_Handler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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rt_tick_increase();
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/* leave interrupt */
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rt_interrupt_leave();
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}
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void rt_hw_cpu_reset(void)
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{
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SYS_UnlockReg();
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SYS->IPRST0 |= SYS_IPRST0_CHIPRST_Msk;
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}
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int reboot(int argc, char** argv)
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{
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rt_hw_cpu_reset();
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return 0;
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}
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MSH_CMD_EXPORT(reboot, Reboot System);
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