rt-thread-official/bsp/tm4c129x-dk/libraries/inc/hw_sysexc.h

133 lines
7.3 KiB
C

//*****************************************************************************
//
// hw_sysexc.h - Macros used when accessing the system exception module.
//
// Copyright (c) 2011-2017 Texas Instruments Incorporated. All rights reserved.
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//
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//
// This is part of revision 2.1.4.178 of the Tiva Firmware Development Package.
//
//*****************************************************************************
#ifndef __HW_SYSEXC_H__
#define __HW_SYSEXC_H__
//*****************************************************************************
//
// The following are defines for the System Exception Module register
// addresses.
//
//*****************************************************************************
#define SYSEXC_RIS 0x400F9000 // System Exception Raw Interrupt
// Status
#define SYSEXC_IM 0x400F9004 // System Exception Interrupt Mask
#define SYSEXC_MIS 0x400F9008 // System Exception Masked
// Interrupt Status
#define SYSEXC_IC 0x400F900C // System Exception Interrupt Clear
//*****************************************************************************
//
// The following are defines for the bit fields in the SYSEXC_RIS register.
//
//*****************************************************************************
#define SYSEXC_RIS_FPIXCRIS 0x00000020 // Floating-Point Inexact Exception
// Raw Interrupt Status
#define SYSEXC_RIS_FPOFCRIS 0x00000010 // Floating-Point Overflow
// Exception Raw Interrupt Status
#define SYSEXC_RIS_FPUFCRIS 0x00000008 // Floating-Point Underflow
// Exception Raw Interrupt Status
#define SYSEXC_RIS_FPIOCRIS 0x00000004 // Floating-Point Invalid Operation
// Raw Interrupt Status
#define SYSEXC_RIS_FPDZCRIS 0x00000002 // Floating-Point Divide By 0
// Exception Raw Interrupt Status
#define SYSEXC_RIS_FPIDCRIS 0x00000001 // Floating-Point Input Denormal
// Exception Raw Interrupt Status
//*****************************************************************************
//
// The following are defines for the bit fields in the SYSEXC_IM register.
//
//*****************************************************************************
#define SYSEXC_IM_FPIXCIM 0x00000020 // Floating-Point Inexact Exception
// Interrupt Mask
#define SYSEXC_IM_FPOFCIM 0x00000010 // Floating-Point Overflow
// Exception Interrupt Mask
#define SYSEXC_IM_FPUFCIM 0x00000008 // Floating-Point Underflow
// Exception Interrupt Mask
#define SYSEXC_IM_FPIOCIM 0x00000004 // Floating-Point Invalid Operation
// Interrupt Mask
#define SYSEXC_IM_FPDZCIM 0x00000002 // Floating-Point Divide By 0
// Exception Interrupt Mask
#define SYSEXC_IM_FPIDCIM 0x00000001 // Floating-Point Input Denormal
// Exception Interrupt Mask
//*****************************************************************************
//
// The following are defines for the bit fields in the SYSEXC_MIS register.
//
//*****************************************************************************
#define SYSEXC_MIS_FPIXCMIS 0x00000020 // Floating-Point Inexact Exception
// Masked Interrupt Status
#define SYSEXC_MIS_FPOFCMIS 0x00000010 // Floating-Point Overflow
// Exception Masked Interrupt
// Status
#define SYSEXC_MIS_FPUFCMIS 0x00000008 // Floating-Point Underflow
// Exception Masked Interrupt
// Status
#define SYSEXC_MIS_FPIOCMIS 0x00000004 // Floating-Point Invalid Operation
// Masked Interrupt Status
#define SYSEXC_MIS_FPDZCMIS 0x00000002 // Floating-Point Divide By 0
// Exception Masked Interrupt
// Status
#define SYSEXC_MIS_FPIDCMIS 0x00000001 // Floating-Point Input Denormal
// Exception Masked Interrupt
// Status
//*****************************************************************************
//
// The following are defines for the bit fields in the SYSEXC_IC register.
//
//*****************************************************************************
#define SYSEXC_IC_FPIXCIC 0x00000020 // Floating-Point Inexact Exception
// Interrupt Clear
#define SYSEXC_IC_FPOFCIC 0x00000010 // Floating-Point Overflow
// Exception Interrupt Clear
#define SYSEXC_IC_FPUFCIC 0x00000008 // Floating-Point Underflow
// Exception Interrupt Clear
#define SYSEXC_IC_FPIOCIC 0x00000004 // Floating-Point Invalid Operation
// Interrupt Clear
#define SYSEXC_IC_FPDZCIC 0x00000002 // Floating-Point Divide By 0
// Exception Interrupt Clear
#define SYSEXC_IC_FPIDCIC 0x00000001 // Floating-Point Input Denormal
// Exception Interrupt Clear
#endif // __HW_SYSEXC_H__