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https://github.com/RT-Thread/rt-thread.git
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c1b22ede30
* Add CANFD support and correct typos - Added CANFD required fields to can.h - Fixed typos in can.h and can.c - Corrected all the projects affected by the typo - Fixed wrong line-ending in some affected can driver files Signed-off-by: Fan YANG <fan.yang@hpmicro.com> * update * bsp: support boards from hpmicro - Supported HPM6750EVKMINI - Supported HPM6750EVK Signed-off-by: Fan YANG <fan.yang@hpmicro.com> Signed-off-by: Fan YANG <fan.yang@hpmicro.com> Co-authored-by: Meco Man <920369182@qq.com>
76 lines
1.3 KiB
ArmAsm
76 lines
1.3 KiB
ArmAsm
/*
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* Copyright (c) 2021 hpmicro
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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*/
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#include <rtconfig.h>
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#include "hpm_csr_regs.h"
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.section .start, "ax"
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.global _start
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.type _start,@function
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_start:
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/* Initialize global pointer */
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.option push
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.option norelax
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la gp, __global_pointer$
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.option pop
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#ifdef INIT_EXT_RAM_FOR_DATA
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la t0, _stack_in_dlm
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mv sp, t0
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call _init_ext_ram
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#endif
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/* Initialize stack pointer */
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la t0, _stack
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mv sp, t0
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#ifdef __nds_execit
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/* Initialize EXEC.IT table */
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la t0, _ITB_BASE_
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csrw uitb, t0
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#endif
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#ifdef __riscv_flen
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/* Enable FPU */
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li t0, CSR_MSTATUS_FS_MASK
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csrrs t0, mstatus, t0
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/* Initialize FCSR */
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fscsr zero
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#endif
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/* Disable Vector mode */
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csrci CSR_MMISC_CTL, 2
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/* Initialize trap_entry base */
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la t0, irq_handler_trap
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csrw mtvec, t0
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/* System reset handler */
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call reset_handler
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/* Infinite loop, if returned accidently */
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1: j 1b
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.weak nmi_handler
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nmi_handler:
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1: j 1b
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.global default_irq_handler
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.weak default_irq_handler
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.align 2
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default_irq_handler:
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1: j 1b
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.macro IRQ_HANDLER irq
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.weak default_isr_\irq
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.set default_isr_\irq, default_irq_handler
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.long default_isr_\irq
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.endm
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#include "vectors.S"
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