188 lines
5.0 KiB
C
188 lines
5.0 KiB
C
/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2019-07-15 Magicoe The first version for LPC55S6x
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* 2023-02-17 Vandoul Add status to lpc_i2c_bus.
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "board.h"
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#include "fsl_iocon.h"
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#include "fsl_gpio.h"
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#include "fsl_i2c.h"
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#include "fsl_i2c_dma.h"
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#ifdef RT_USING_I2C
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enum
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{
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#ifdef BSP_USING_I2C1
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I2C1_INDEX,
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#endif
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#ifdef BSP_USING_I2C4
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I2C4_INDEX,
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#endif
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};
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#define i2c_dbg rt_kprintf
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struct lpc_i2c_bus
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{
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struct rt_i2c_bus_device parent;
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I2C_Type *I2C;
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DMA_Type *DMA;
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i2c_master_dma_handle_t i2c_mst_dma_handle;
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dma_handle_t dmaHandle;
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rt_sem_t sem;
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clock_attach_id_t i2c_clock_id;
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uint32_t dma_chl;
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uint32_t instance;
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uint32_t baud;
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char *device_name;
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uint32_t status;
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};
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struct lpc_i2c_bus lpc_obj[] =
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{
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#ifdef BSP_USING_I2C1
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{
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.I2C = I2C1,
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.DMA = DMA0,
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.dma_chl = 12,
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.device_name = "i2c1",
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.baud = 100000U,
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.instance = 1U,
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.i2c_clock_id = kFRO12M_to_FLEXCOMM1,
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},
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#endif
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#ifdef BSP_USING_I2C4
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{
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.I2C = I2C4,
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.DMA = DMA0,
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.dma_chl = 13,
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.device_name = "i2c4",
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.baud = 400000U,
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.instance = 4U,
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.i2c_clock_id = kFRO12M_to_FLEXCOMM4,
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},
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#endif
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};
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static void i2c_mst_dma_callback(I2C_Type *base, i2c_master_dma_handle_t *handle, status_t status, void *userData)
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{
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struct lpc_i2c_bus *lpc_i2c = (struct lpc_i2c_bus*)userData;
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lpc_i2c->status = status;
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rt_sem_release(lpc_i2c->sem);
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}
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static rt_ssize_t lpc_i2c_xfer(struct rt_i2c_bus_device *bus,
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struct rt_i2c_msg msgs[], rt_uint32_t num)
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{
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struct rt_i2c_msg *msg;
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i2c_master_transfer_t xfer = {0};
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rt_uint32_t i;
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rt_err_t ret = -RT_ERROR;
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struct lpc_i2c_bus *lpc_i2c = (struct lpc_i2c_bus *)bus;
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for (i = 0; i < num; i++)
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{
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msg = &msgs[i];
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if (msg->flags & RT_I2C_RD)
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{
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xfer.slaveAddress = msg->addr;
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xfer.direction = kI2C_Read;
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xfer.subaddress = 0;
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xfer.subaddressSize = 0;
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xfer.data = msg->buf;
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xfer.dataSize = msg->len;
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if(i != 0)
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xfer.flags = kI2C_TransferRepeatedStartFlag;
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else
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xfer.flags = kI2C_TransferDefaultFlag;
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// if (I2C_MasterTransferBlocking(lpc_i2c->I2C, &xfer) != kStatus_Success)
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if(I2C_MasterTransferDMA(lpc_i2c->I2C, &lpc_i2c->i2c_mst_dma_handle, &xfer) != kStatus_Success)
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{
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i2c_dbg("i2c bus read failed!\n");
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return i;
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}
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rt_sem_take(lpc_i2c->sem, RT_WAITING_FOREVER);
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}
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else
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{
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xfer.slaveAddress = msg->addr;
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xfer.direction = kI2C_Write;
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xfer.subaddress = 0;
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xfer.subaddressSize = 0;
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xfer.data = msg->buf;
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xfer.dataSize = msg->len;
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if(i == 0)
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xfer.flags = kI2C_TransferNoStopFlag;
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else
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xfer.flags = kI2C_TransferDefaultFlag;
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//if (I2C_MasterTransferBlocking(lpc_i2c->I2C, &xfer) != kStatus_Success)
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if(I2C_MasterTransferDMA(lpc_i2c->I2C, &lpc_i2c->i2c_mst_dma_handle, &xfer) != kStatus_Success)
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{
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i2c_dbg("i2c bus write failed!\n");
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return i;
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}
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rt_sem_take(lpc_i2c->sem, RT_WAITING_FOREVER);
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if(lpc_i2c->status != kStatus_Success)
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{
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break;
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}
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}
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}
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ret = i;
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return ret;
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}
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static const struct rt_i2c_bus_device_ops i2c_ops =
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{
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lpc_i2c_xfer,
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RT_NULL,
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RT_NULL
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};
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int rt_hw_i2c_init(void)
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{
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int i;
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i2c_master_config_t masterConfig;
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for(i=0; i<ARRAY_SIZE(lpc_obj); i++)
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{
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CLOCK_AttachClk(lpc_obj[i].i2c_clock_id);
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I2C_MasterGetDefaultConfig(&masterConfig);
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masterConfig.baudRate_Bps = lpc_obj[i].baud;
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/* Initialize the I2C master peripheral */
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I2C_MasterInit(lpc_obj[i].I2C, &masterConfig, CLOCK_GetFlexCommClkFreq(lpc_obj[i].instance));
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lpc_obj[i].parent.ops = &i2c_ops;
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lpc_obj[i].sem = rt_sem_create("sem_i2c", 0, RT_IPC_FLAG_FIFO);
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DMA_CreateHandle(&lpc_obj[i].dmaHandle, lpc_obj[i].DMA, lpc_obj[i].dma_chl);
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I2C_MasterTransferCreateHandleDMA(lpc_obj[i].I2C, &lpc_obj[i].i2c_mst_dma_handle, i2c_mst_dma_callback, &lpc_obj[i], &lpc_obj[i].dmaHandle);
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rt_i2c_bus_device_register(&lpc_obj[i].parent, lpc_obj[i].device_name);
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}
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return 0;
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}
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INIT_DEVICE_EXPORT(rt_hw_i2c_init);
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#endif /* RT_USING_I2C */
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