782 lines
21 KiB
C
782 lines
21 KiB
C
/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2017-10-10 Tanek the first version
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* 2019-5-10 misonyo add DMA TX and RX function
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*/
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#include <rtthread.h>
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#ifdef BSP_USING_LPUART
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#include "rthw.h"
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#include <rtdevice.h>
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#include "drv_uart.h"
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#include "board.h"
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#include "fsl_lpuart.h"
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#include "fsl_lpuart_edma.h"
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#include "fsl_dmamux.h"
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#define LOG_TAG "drv.usart"
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#include <drv_log.h>
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#if defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL
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#error "Please don't define 'FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL'!"
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#endif
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enum
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{
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#ifdef BSP_USING_LPUART1
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LPUART1_INDEX,
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#endif
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#ifdef BSP_USING_LPUART2
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LPUART2_INDEX,
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#endif
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#ifdef BSP_USING_LPUART3
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LPUART3_INDEX,
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#endif
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#ifdef BSP_USING_LPUART4
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LPUART4_INDEX,
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#endif
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#ifdef BSP_USING_LPUART5
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LPUART5_INDEX,
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#endif
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#ifdef BSP_USING_LPUART6
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LPUART6_INDEX,
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#endif
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#ifdef BSP_USING_LPUART7
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LPUART7_INDEX,
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#endif
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#ifdef BSP_USING_LPUART8
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LPUART8_INDEX,
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#endif
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};
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#if defined(RT_SERIAL_USING_DMA) && defined(BSP_USING_DMA)
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struct dma_rx_config
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{
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edma_handle_t edma;
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dma_request_source_t request;
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rt_uint8_t channel;
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rt_uint32_t last_index;
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};
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struct dma_tx_config
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{
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edma_handle_t edma;
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lpuart_edma_handle_t uart_edma;
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dma_request_source_t request;
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rt_uint8_t channel;
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};
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#endif
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struct imxrt_uart
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{
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char *name;
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LPUART_Type *uart_base;
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IRQn_Type irqn;
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#if defined(RT_SERIAL_USING_DMA) && defined(BSP_USING_DMA)
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struct dma_rx_config *dma_rx;
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struct dma_tx_config *dma_tx;
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#endif
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rt_uint16_t dma_flag;
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struct rt_serial_device serial;
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};
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static struct imxrt_uart uarts[] =
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{
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#ifdef BSP_USING_LPUART1
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{
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.name = "uart1",
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.uart_base = LPUART1,
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.irqn = LPUART1_IRQn,
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#if defined(RT_SERIAL_USING_DMA) && defined(BSP_USING_DMA)
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.dma_rx = RT_NULL,
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.dma_tx = RT_NULL,
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#endif
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.dma_flag = 0,
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},
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#endif
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#ifdef BSP_USING_LPUART2
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{
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.name = "uart2",
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.uart_base = LPUART2,
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.irqn = LPUART2_IRQn,
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#if defined(RT_SERIAL_USING_DMA) && defined(BSP_USING_DMA)
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.dma_rx = RT_NULL,
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.dma_tx = RT_NULL,
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#endif
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.dma_flag = 0,
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},
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#endif
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#ifdef BSP_USING_LPUART3
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{
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.name = "uart3",
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.uart_base = LPUART3,
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.irqn = LPUART3_IRQn,
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#if defined(RT_SERIAL_USING_DMA) && defined(BSP_USING_DMA)
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.dma_rx = RT_NULL,
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.dma_tx = RT_NULL,
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#endif
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.dma_flag = 0,
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},
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#endif
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#ifdef BSP_USING_LPUART4
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{
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.name = "uart4",
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.uart_base = LPUART4,
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.irqn = LPUART4_IRQn,
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#if defined(RT_SERIAL_USING_DMA) && defined(BSP_USING_DMA)
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.dma_rx = RT_NULL,
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.dma_tx = RT_NULL,
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#endif
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.dma_flag = 0,
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},
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#endif
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#ifdef BSP_USING_LPUART5
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{
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.name = "uart5",
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.uart_base = LPUART5,
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.irqn = LPUART5_IRQn,
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#if defined(RT_SERIAL_USING_DMA) && defined(BSP_USING_DMA)
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.dma_rx = RT_NULL,
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.dma_tx = RT_NULL,
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#endif
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.dma_flag = 0,
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},
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#endif
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#ifdef BSP_USING_LPUART6
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{
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.name = "uart6",
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.uart_base = LPUART6,
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.irqn = LPUART6_IRQn,
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#if defined(RT_SERIAL_USING_DMA) && defined(BSP_USING_DMA)
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.dma_rx = RT_NULL,
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.dma_tx = RT_NULL,
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#endif
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.dma_flag = 0,
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},
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#endif
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#ifdef BSP_USING_LPUART7
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{
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.name = "uart7",
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.uart_base = LPUART7,
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.irqn = LPUART7_IRQn,
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#if defined(RT_SERIAL_USING_DMA) && defined(BSP_USING_DMA)
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.dma_rx = RT_NULL,
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.dma_tx = RT_NULL,
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#endif
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.dma_flag = 0,
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},
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#endif
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#ifdef BSP_USING_LPUART8
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{
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.name = "uart8",
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.uart_base = LPUART8,
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.irqn = LPUART8_IRQn,
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#if defined(RT_SERIAL_USING_DMA) && defined(BSP_USING_DMA)
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.dma_rx = RT_NULL,
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.dma_tx = RT_NULL,
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#endif
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.dma_flag = 0,
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},
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#endif
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};
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static void uart_get_dma_config(void)
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{
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#ifdef BSP_LPUART1_RX_USING_DMA
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static struct dma_rx_config uart1_dma_rx = {.request = kDmaRequestMuxLPUART1Rx, .channel = BSP_LPUART1_RX_DMA_CHANNEL, .last_index = 0};
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uarts[LPUART1_INDEX].dma_rx = &uart1_dma_rx;
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uarts[LPUART1_INDEX].dma_flag |= RT_DEVICE_FLAG_DMA_RX;
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#endif
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#ifdef BSP_LPUART1_TX_USING_DMA
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static struct dma_tx_config uart1_dma_tx = {.request = kDmaRequestMuxLPUART1Tx, .channel = BSP_LPUART1_TX_DMA_CHANNEL};
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uarts[LPUART1_INDEX].dma_tx = &uart1_dma_tx;
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uarts[LPUART1_INDEX].dma_flag |= RT_DEVICE_FLAG_DMA_TX;
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#endif
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#ifdef BSP_LPUART2_RX_USING_DMA
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static struct dma_rx_config uart2_dma_rx = {.request = kDmaRequestMuxLPUART2Rx, .channel = BSP_LPUART2_RX_DMA_CHANNEL, .last_index = 0};
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uarts[LPUART2_INDEX].dma_rx = &uart2_dma_rx;
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uarts[LPUART2_INDEX].dma_flag |= RT_DEVICE_FLAG_DMA_RX;
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#endif
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#ifdef BSP_LPUART2_TX_USING_DMA
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static struct dma_tx_config uart2_dma_tx = {.request = kDmaRequestMuxLPUART2Tx, .channel = BSP_LPUART2_TX_DMA_CHANNEL};
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uarts[LPUART2_INDEX].dma_tx = &uart2_dma_tx;
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uarts[LPUART2_INDEX].dma_flag |= RT_DEVICE_FLAG_DMA_TX;
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#endif
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#ifdef BSP_LPUART3_RX_USING_DMA
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static struct dma_rx_config uart3_dma_rx = {.request = kDmaRequestMuxLPUART3Rx, .channel = BSP_LPUART3_RX_DMA_CHANNEL, .last_index = 0};
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uarts[LPUART3_INDEX].dma_rx = &uart3_dma_rx;
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uarts[LPUART3_INDEX].dma_flag |= RT_DEVICE_FLAG_DMA_RX;
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#endif
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#ifdef BSP_LPUART3_TX_USING_DMA
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static struct dma_tx_config uart3_dma_tx = {.request = kDmaRequestMuxLPUART3Tx, .channel = BSP_LPUART3_TX_DMA_CHANNEL};
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uarts[LPUART3_INDEX].dma_tx = &uart3_dma_tx;
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uarts[LPUART3_INDEX].dma_flag |= RT_DEVICE_FLAG_DMA_TX;
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#endif
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#ifdef BSP_LPUART4_RX_USING_DMA
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static struct dma_rx_config uart4_dma_rx = {.request = kDmaRequestMuxLPUART4Rx, .channel = BSP_LPUART4_RX_DMA_CHANNEL, .last_index = 0};
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uarts[LPUART4_INDEX].dma_rx = &uart4_dma_rx;
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uarts[LPUART4_INDEX].dma_flag |= RT_DEVICE_FLAG_DMA_RX;
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#endif
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#ifdef BSP_LPUART4_TX_USING_DMA
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static struct dma_tx_config uart4_dma_tx = {.request = kDmaRequestMuxLPUART4Tx, .channel = BSP_LPUART4_TX_DMA_CHANNEL};
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uarts[LPUART4_INDEX].dma_tx = &uart4_dma_tx;
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uarts[LPUART4_INDEX].dma_flag |= RT_DEVICE_FLAG_DMA_TX;
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#endif
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#ifdef BSP_LPUART5_RX_USING_DMA
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static struct dma_rx_config uart5_dma_rx = {.request = kDmaRequestMuxLPUART5Rx, .channel = BSP_LPUART5_RX_DMA_CHANNEL, .last_index = 0};
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uarts[LPUART5_INDEX].dma_rx = &uart5_dma_rx;
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uarts[LPUART5_INDEX].dma_flag |= RT_DEVICE_FLAG_DMA_RX;
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#endif
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#ifdef BSP_LPUART5_TX_USING_DMA
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static struct dma_tx_config uart5_dma_tx = {.request = kDmaRequestMuxLPUART5Tx, .channel = BSP_LPUART5_TX_DMA_CHANNEL};
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uarts[LPUART5_INDEX].dma_tx = &uart5_dma_tx;
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uarts[LPUART5_INDEX].dma_flag |= RT_DEVICE_FLAG_DMA_TX;
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#endif
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#ifdef BSP_LPUART6_RX_USING_DMA
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static struct dma_rx_config uart6_dma_rx = {.request = kDmaRequestMuxLPUART6Rx, .channel = BSP_LPUART6_RX_DMA_CHANNEL, .last_index = 0};
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uarts[LPUART6_INDEX].dma_rx = &uart6_dma_rx;
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uarts[LPUART6_INDEX].dma_flag |= RT_DEVICE_FLAG_DMA_RX;
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#endif
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#ifdef BSP_LPUART6_TX_USING_DMA
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static struct dma_tx_config uart6_dma_tx = {.request = kDmaRequestMuxLPUART6Tx, .channel = BSP_LPUART6_TX_DMA_CHANNEL};
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uarts[LPUART6_INDEX].dma_tx = &uart6_dma_tx;
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uarts[LPUART6_INDEX].dma_flag |= RT_DEVICE_FLAG_DMA_TX;
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#endif
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#ifdef BSP_LPUART7_RX_USING_DMA
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static struct dma_rx_config uart7_dma_rx = {.request = kDmaRequestMuxLPUART7Rx, .channel = BSP_LPUART7_RX_DMA_CHANNEL, .last_index = 0};
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uarts[LPUART7_INDEX].dma_rx = &uart7_dma_rx;
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uarts[LPUART7_INDEX].dma_flag |= RT_DEVICE_FLAG_DMA_RX;
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#endif
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#ifdef BSP_LPUART7_TX_USING_DMA
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static struct dma_tx_config uart7_dma_tx = {.request = kDmaRequestMuxLPUART7Tx, .channel = BSP_LPUART7_TX_DMA_CHANNEL};
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uarts[LPUART7_INDEX].dma_tx = &uart7_dma_tx;
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uarts[LPUART7_INDEX].dma_flag |= RT_DEVICE_FLAG_DMA_TX;
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#endif
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#ifdef BSP_LPUART8_RX_USING_DMA
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static struct dma_rx_config uart8_dma_rx = {.request = kDmaRequestMuxLPUART8Rx, .channel = BSP_LPUART8_RX_DMA_CHANNEL, .last_index = 0};
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uarts[LPUART8_INDEX].dma_rx = &uart8_dma_rx;
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uarts[LPUART8_INDEX].dma_flag |= RT_DEVICE_FLAG_DMA_RX;
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#endif
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#ifdef BSP_LPUART8_TX_USING_DMA
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static struct dma_tx_config uart8_dma_tx = {.request = kDmaRequestMuxLPUART8Tx, .channel = BSP_LPUART8_TX_DMA_CHANNEL};
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uarts[LPUART8_INDEX].dma_tx = &uart8_dma_tx;
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uarts[LPUART8_INDEX].dma_flag |= RT_DEVICE_FLAG_DMA_TX;
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#endif
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}
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static void uart_isr(struct imxrt_uart *uart);
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#if defined(BSP_USING_LPUART1)
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void LPUART1_IRQHandler(void)
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{
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rt_interrupt_enter();
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uart_isr(&uarts[LPUART1_INDEX]);
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_LPUART1 */
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#if defined(BSP_USING_LPUART2)
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struct rt_serial_device serial2;
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void LPUART2_IRQHandler(void)
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{
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rt_interrupt_enter();
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uart_isr(&uarts[LPUART2_INDEX]);
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_LPUART2 */
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#if defined(BSP_USING_LPUART3)
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struct rt_serial_device serial3;
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void LPUART3_IRQHandler(void)
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{
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rt_interrupt_enter();
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uart_isr(&uarts[LPUART3_INDEX]);
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_LPUART3 */
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#if defined(BSP_USING_LPUART4)
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void LPUART4_IRQHandler(void)
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{
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rt_interrupt_enter();
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uart_isr(&uarts[LPUART4_INDEX]);
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_LPUART4 */
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#if defined(BSP_USING_LPUART5)
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struct rt_serial_device serial5;
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void LPUART5_IRQHandler(void)
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{
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rt_interrupt_enter();
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uart_isr(&uarts[LPUART5_INDEX]);
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_LPUART5 */
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#if defined(BSP_USING_LPUART6)
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struct rt_serial_device serial6;
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void LPUART6_IRQHandler(void)
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{
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rt_interrupt_enter();
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uart_isr(&uarts[LPUART6_INDEX]);
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_LPUART6 */
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#if defined(BSP_USING_LPUART7)
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struct rt_serial_device serial7;
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void LPUART7_IRQHandler(void)
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{
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rt_interrupt_enter();
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uart_isr(&uarts[LPUART7_INDEX]);
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_LPUART7 */
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#if defined(BSP_USING_LPUART8)
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struct rt_serial_device serial8;
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void LPUART8_IRQHandler(void)
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{
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rt_interrupt_enter();
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uart_isr(&uarts[LPUART8_INDEX]);
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_LPUART8 */
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static void uart_isr(struct imxrt_uart *uart)
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{
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RT_ASSERT(uart != RT_NULL);
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#if defined(RT_SERIAL_USING_DMA) && defined(BSP_USING_DMA)
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rt_size_t total_index, recv_len;
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rt_base_t level;
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#endif
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/* kLPUART_RxDataRegFullFlag can only cleared or set by hardware */
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if (LPUART_GetStatusFlags(uart->uart_base) & kLPUART_RxDataRegFullFlag)
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{
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rt_hw_serial_isr(&uart->serial, RT_SERIAL_EVENT_RX_IND);
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}
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if (LPUART_GetStatusFlags(uart->uart_base) & kLPUART_RxOverrunFlag)
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{
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/* Clear overrun flag, otherwise the RX does not work. */
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LPUART_ClearStatusFlags(uart->uart_base, kLPUART_RxOverrunFlag);
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}
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#if defined(RT_SERIAL_USING_DMA) && defined(BSP_USING_DMA)
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if ((LPUART_GetStatusFlags(uart->uart_base) & kLPUART_IdleLineFlag) && (uart->dma_rx != RT_NULL))
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{
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LPUART_ClearStatusFlags(uart->uart_base, kLPUART_IdleLineFlag);
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level = rt_hw_interrupt_disable();
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total_index = uart->serial.config.bufsz - EDMA_GetRemainingMajorLoopCount(DMA0, uart->dma_rx->channel);
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if (total_index > uart->dma_rx->last_index)
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{
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recv_len = total_index - uart->dma_rx->last_index;
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}
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else
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{
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recv_len = total_index + (uart->serial.config.bufsz - uart->dma_rx->last_index);
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}
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if ((recv_len > 0) && (recv_len < uart->serial.config.bufsz))
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{
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uart->dma_rx->last_index = total_index;
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rt_hw_interrupt_enable(level);
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rt_hw_serial_isr(&uart->serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
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}
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else
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{
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rt_hw_interrupt_enable(level);
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}
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}
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#endif
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}
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#if defined(RT_SERIAL_USING_DMA) && defined(BSP_USING_DMA)
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void edma_rx_callback(struct _edma_handle *handle, void *userData, bool transferDone, uint32_t tcds)
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{
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rt_size_t total_index, recv_len;
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rt_base_t level;
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struct imxrt_uart *uart = (struct imxrt_uart *)userData;
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RT_ASSERT(uart != RT_NULL);
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if (transferDone)
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{
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level = rt_hw_interrupt_disable();
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if ((EDMA_GetChannelStatusFlags(DMA0, uart->dma_rx->channel) & kEDMA_DoneFlag) != 0U)
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{
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/* clear full interrupt */
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EDMA_ClearChannelStatusFlags(DMA0, uart->dma_rx->channel,kEDMA_DoneFlag);
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|
|
recv_len = uart->serial.config.bufsz - uart->dma_rx->last_index;
|
|
uart->dma_rx->last_index = 0;
|
|
}
|
|
else
|
|
{
|
|
/* clear half interrupt */
|
|
EDMA_ClearChannelStatusFlags(DMA0, uart->dma_rx->channel,kEDMA_InterruptFlag);
|
|
|
|
total_index = uart->serial.config.bufsz - EDMA_GetRemainingMajorLoopCount(DMA0, uart->dma_rx->channel);
|
|
if (total_index > uart->dma_rx->last_index)
|
|
{
|
|
recv_len = total_index - uart->dma_rx->last_index;
|
|
}
|
|
else
|
|
{
|
|
recv_len = total_index + (uart->serial.config.bufsz - uart->dma_rx->last_index);
|
|
}
|
|
uart->dma_rx->last_index = total_index;
|
|
}
|
|
|
|
rt_hw_interrupt_enable(level);
|
|
|
|
if (recv_len)
|
|
{
|
|
rt_hw_serial_isr(&uart->serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
|
|
}
|
|
}
|
|
}
|
|
|
|
void edma_tx_callback(LPUART_Type *base, lpuart_edma_handle_t *handle, status_t status, void *userData)
|
|
{
|
|
struct imxrt_uart *uart = (struct imxrt_uart *)userData;
|
|
RT_ASSERT(uart != RT_NULL);
|
|
|
|
if (kStatus_LPUART_TxIdle == status)
|
|
{
|
|
rt_hw_serial_isr(&uart->serial, RT_SERIAL_EVENT_TX_DMADONE);
|
|
}
|
|
}
|
|
|
|
static void imxrt_dma_rx_config(struct imxrt_uart *uart)
|
|
{
|
|
RT_ASSERT(uart != RT_NULL);
|
|
|
|
edma_transfer_config_t xferConfig;
|
|
struct rt_serial_rx_fifo *rx_fifo;
|
|
|
|
DMAMUX_SetSource(DMAMUX, uart->dma_rx->channel, uart->dma_rx->request);
|
|
DMAMUX_EnableChannel(DMAMUX, uart->dma_rx->channel);
|
|
EDMA_CreateHandle(&uart->dma_rx->edma, DMA0, uart->dma_rx->channel);
|
|
EDMA_SetCallback(&uart->dma_rx->edma, edma_rx_callback, uart);
|
|
|
|
rx_fifo = (struct rt_serial_rx_fifo *)uart->serial.serial_rx;
|
|
|
|
EDMA_PrepareTransfer(&xferConfig,
|
|
(void *)LPUART_GetDataRegisterAddress(uart->uart_base),
|
|
sizeof(uint8_t),
|
|
rx_fifo->buffer,
|
|
sizeof(uint8_t),
|
|
sizeof(uint8_t),
|
|
uart->serial.config.bufsz,
|
|
kEDMA_PeripheralToMemory);
|
|
|
|
EDMA_SubmitTransfer(&uart->dma_rx->edma, &xferConfig);
|
|
EDMA_EnableChannelInterrupts(DMA0, uart->dma_rx->channel, kEDMA_MajorInterruptEnable | kEDMA_HalfInterruptEnable);
|
|
EDMA_EnableAutoStopRequest(DMA0, uart->dma_rx->channel, false);
|
|
/* complement to adjust final destination address */
|
|
uart->dma_rx->edma.base->TCD[uart->dma_rx->channel].DLAST_SGA = -(uart->serial.config.bufsz);
|
|
EDMA_StartTransfer(&uart->dma_rx->edma);
|
|
LPUART_EnableRxDMA(uart->uart_base, true);
|
|
|
|
LPUART_EnableInterrupts(uart->uart_base, kLPUART_IdleLineInterruptEnable);
|
|
NVIC_SetPriority(uart->irqn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 4, 0));
|
|
EnableIRQ(uart->irqn);
|
|
|
|
LOG_D("%s dma rx config done\n", uart->name);
|
|
}
|
|
|
|
static void imxrt_dma_tx_config(struct imxrt_uart *uart)
|
|
{
|
|
RT_ASSERT(uart != RT_NULL);
|
|
|
|
DMAMUX_SetSource(DMAMUX, uart->dma_tx->channel, uart->dma_tx->request);
|
|
DMAMUX_EnableChannel(DMAMUX, uart->dma_tx->channel);
|
|
EDMA_CreateHandle(&uart->dma_tx->edma, DMA0, uart->dma_tx->channel);
|
|
|
|
LPUART_TransferCreateHandleEDMA(uart->uart_base,
|
|
&uart->dma_tx->uart_edma,
|
|
edma_tx_callback,
|
|
uart,
|
|
&uart->dma_tx->edma,
|
|
RT_NULL);
|
|
|
|
LOG_D("%s dma tx config done\n", uart->name);
|
|
}
|
|
|
|
#endif
|
|
|
|
uint32_t GetUartSrcFreq(LPUART_Type *uart_base)
|
|
{
|
|
uint32_t freq;
|
|
#ifdef SOC_IMXRT1170_SERIES
|
|
uint32_t base = (uint32_t) uart_base;
|
|
switch (base)
|
|
{
|
|
case LPUART1_BASE:
|
|
freq = CLOCK_GetRootClockFreq(kCLOCK_Root_Lpuart1);
|
|
break;
|
|
case LPUART12_BASE:
|
|
freq = CLOCK_GetRootClockFreq(kCLOCK_Root_Lpuart12);
|
|
break;
|
|
default:
|
|
freq = CLOCK_GetRootClockFreq(kCLOCK_Root_Lpuart2);
|
|
break;
|
|
}
|
|
#else
|
|
/* To make it simple, we assume default PLL and divider settings, and the only variable
|
|
from application is use PLL3 source or OSC source */
|
|
if (CLOCK_GetMux(kCLOCK_UartMux) == 0) /* PLL3 div6 80M */
|
|
{
|
|
freq = (CLOCK_GetPllFreq(kCLOCK_PllUsb1) / 6U) / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U);
|
|
}
|
|
else
|
|
{
|
|
freq = CLOCK_GetOscFreq() / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U);
|
|
}
|
|
#endif
|
|
return freq;
|
|
|
|
}
|
|
|
|
static rt_err_t imxrt_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
|
|
{
|
|
struct imxrt_uart *uart;
|
|
lpuart_config_t config;
|
|
|
|
RT_ASSERT(serial != RT_NULL);
|
|
RT_ASSERT(cfg != RT_NULL);
|
|
|
|
uart = rt_container_of(serial, struct imxrt_uart, serial);
|
|
|
|
LPUART_GetDefaultConfig(&config);
|
|
config.baudRate_Bps = cfg->baud_rate;
|
|
|
|
switch (cfg->data_bits)
|
|
{
|
|
case DATA_BITS_7:
|
|
config.dataBitsCount = kLPUART_SevenDataBits;
|
|
break;
|
|
|
|
default:
|
|
config.dataBitsCount = kLPUART_EightDataBits;
|
|
break;
|
|
}
|
|
|
|
switch (cfg->stop_bits)
|
|
{
|
|
case STOP_BITS_2:
|
|
config.stopBitCount = kLPUART_TwoStopBit;
|
|
break;
|
|
default:
|
|
config.stopBitCount = kLPUART_OneStopBit;
|
|
break;
|
|
}
|
|
|
|
switch (cfg->parity)
|
|
{
|
|
case PARITY_ODD:
|
|
config.parityMode = kLPUART_ParityOdd;
|
|
break;
|
|
case PARITY_EVEN:
|
|
config.parityMode = kLPUART_ParityEven;
|
|
break;
|
|
default:
|
|
config.parityMode = kLPUART_ParityDisabled;
|
|
break;
|
|
}
|
|
|
|
config.enableTx = true;
|
|
config.enableRx = true;
|
|
|
|
LPUART_Init(uart->uart_base, &config, GetUartSrcFreq(uart->uart_base));
|
|
|
|
return RT_EOK;
|
|
}
|
|
|
|
static rt_err_t imxrt_control(struct rt_serial_device *serial, int cmd, void *arg)
|
|
{
|
|
struct imxrt_uart *uart;
|
|
|
|
RT_ASSERT(serial != RT_NULL);
|
|
uart = rt_container_of(serial, struct imxrt_uart, serial);
|
|
|
|
#if defined(RT_SERIAL_USING_DMA) && defined(BSP_USING_DMA)
|
|
rt_ubase_t ctrl_arg = (rt_ubase_t)arg;
|
|
#endif
|
|
|
|
switch (cmd)
|
|
{
|
|
case RT_DEVICE_CTRL_CLR_INT:
|
|
DisableIRQ(uart->irqn);
|
|
break;
|
|
|
|
case RT_DEVICE_CTRL_SET_INT:
|
|
LPUART_EnableInterrupts(uart->uart_base, kLPUART_RxDataRegFullInterruptEnable);
|
|
NVIC_SetPriority(uart->irqn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 4, 0));
|
|
EnableIRQ(uart->irqn);
|
|
break;
|
|
|
|
#if defined(RT_SERIAL_USING_DMA) && defined(BSP_USING_DMA)
|
|
case RT_DEVICE_CTRL_CONFIG:
|
|
|
|
if (RT_DEVICE_FLAG_DMA_RX == ctrl_arg)
|
|
{
|
|
imxrt_dma_rx_config(uart);
|
|
}
|
|
else if (RT_DEVICE_FLAG_DMA_TX == ctrl_arg)
|
|
{
|
|
imxrt_dma_tx_config(uart);
|
|
}
|
|
break;
|
|
#endif
|
|
}
|
|
|
|
return RT_EOK;
|
|
}
|
|
|
|
static int imxrt_putc(struct rt_serial_device *serial, char ch)
|
|
{
|
|
struct imxrt_uart *uart;
|
|
|
|
RT_ASSERT(serial != RT_NULL);
|
|
uart = rt_container_of(serial, struct imxrt_uart, serial);
|
|
|
|
LPUART_WriteByte(uart->uart_base, ch);
|
|
while (!(LPUART_GetStatusFlags(uart->uart_base) & kLPUART_TxDataRegEmptyFlag));
|
|
|
|
return 1;
|
|
}
|
|
|
|
static int imxrt_getc(struct rt_serial_device *serial)
|
|
{
|
|
int ch;
|
|
struct imxrt_uart *uart;
|
|
|
|
RT_ASSERT(serial != RT_NULL);
|
|
uart = rt_container_of(serial, struct imxrt_uart, serial);
|
|
|
|
ch = -1;
|
|
if (LPUART_GetStatusFlags(uart->uart_base) & kLPUART_RxDataRegFullFlag)
|
|
{
|
|
ch = LPUART_ReadByte(uart->uart_base);
|
|
}
|
|
|
|
return ch;
|
|
}
|
|
|
|
#if defined(RT_SERIAL_USING_DMA) && defined(BSP_USING_DMA)
|
|
rt_size_t dma_tx_xfer(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction)
|
|
{
|
|
struct imxrt_uart *uart;
|
|
lpuart_transfer_t xfer;
|
|
rt_size_t xfer_size = 0;
|
|
|
|
RT_ASSERT(serial != RT_NULL);
|
|
uart = rt_container_of(serial, struct imxrt_uart, serial);
|
|
|
|
if (0 != size)
|
|
{
|
|
if (RT_SERIAL_DMA_TX == direction)
|
|
{
|
|
xfer.data = buf;
|
|
xfer.dataSize = size;
|
|
if (LPUART_SendEDMA(uart->uart_base, &uart->dma_tx->uart_edma, &xfer) == kStatus_Success)
|
|
{
|
|
xfer_size = size;
|
|
}
|
|
}
|
|
}
|
|
|
|
return xfer_size;
|
|
}
|
|
#endif
|
|
|
|
static const struct rt_uart_ops imxrt_uart_ops =
|
|
{
|
|
imxrt_configure,
|
|
imxrt_control,
|
|
imxrt_putc,
|
|
imxrt_getc,
|
|
#if defined(RT_SERIAL_USING_DMA) && defined(BSP_USING_DMA)
|
|
dma_tx_xfer
|
|
#else
|
|
RT_NULL
|
|
#endif
|
|
};
|
|
|
|
int rt_hw_uart_init(void)
|
|
{
|
|
int i;
|
|
rt_uint32_t flag;
|
|
rt_err_t ret = RT_EOK;
|
|
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
|
|
|
|
flag = RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX;
|
|
|
|
uart_get_dma_config();
|
|
|
|
for (i = 0; i < sizeof(uarts) / sizeof(uarts[0]); i++)
|
|
{
|
|
uarts[i].serial.ops = &imxrt_uart_ops;
|
|
uarts[i].serial.config = config;
|
|
|
|
ret = rt_hw_serial_register(&uarts[i].serial, uarts[i].name, flag | uarts[i].dma_flag, NULL);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
INIT_BOARD_EXPORT(rt_hw_uart_init);
|
|
|
|
#endif /* BSP_USING_LPUART */
|