158 lines
3.5 KiB
C
158 lines
3.5 KiB
C
/*
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* File : drv_hwtimer.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2015, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2015-09-02 heyuanjie87 the first version
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#include <board.h>
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#include "drv_hwtimer.h"
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#ifdef RT_USING_HWTIMER
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static void NVIC_Configuration(void)
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{
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NVIC_InitTypeDef NVIC_InitStructure;
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/* Enable the TIM5 global Interrupt */
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NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x00;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x00;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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}
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static void timer_init(rt_hwtimer_t *timer, rt_uint32_t state)
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{
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TIM_TypeDef *tim;
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tim = (TIM_TypeDef *)timer->parent.user_data;
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TIM_DeInit(tim);
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if (state == 1)
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{
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NVIC_Configuration();
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
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TIM_CounterModeConfig(tim, TIM_CounterMode_Up);
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}
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}
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static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_t opmode)
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{
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TIM_TypeDef *tim;
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uint16_t m;
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tim = (TIM_TypeDef *)timer->parent.user_data;
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TIM_SetAutoreload(tim, t);
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m = (opmode == HWTIMER_MODE_ONESHOT)? TIM_OPMode_Single : TIM_OPMode_Repetitive;
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TIM_SelectOnePulseMode(tim, m);
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TIM_Cmd(tim, ENABLE);
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return RT_EOK;
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}
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static void timer_stop(rt_hwtimer_t *timer)
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{
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TIM_TypeDef *tim;
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tim = (TIM_TypeDef *)timer->parent.user_data;
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TIM_Cmd(tim, DISABLE);
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}
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static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg)
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{
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TIM_TypeDef *tim;
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rt_err_t err = RT_EOK;
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tim = (TIM_TypeDef *)timer->parent.user_data;
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switch (cmd)
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{
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case HWTIMER_CTRL_FREQ_SET:
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{
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RCC_ClocksTypeDef clk;
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uint16_t val;
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rt_uint32_t freq;
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RCC_GetClocksFreq(&clk);
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freq = *((rt_uint32_t*)arg);
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clk.PCLK1_Frequency *= 2;
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val = clk.PCLK1_Frequency/freq;
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TIM_ITConfig(tim, TIM_IT_Update, DISABLE);
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TIM_PrescalerConfig(tim, val - 1, TIM_PSCReloadMode_Immediate);
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TIM_ClearITPendingBit(TIM2, TIM_IT_Update);
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TIM_ITConfig(tim, TIM_IT_Update, ENABLE);
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}
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break;
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default:
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{
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err = -RT_ENOSYS;
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}
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break;
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}
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return err;
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}
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static rt_uint32_t timer_counter_get(rt_hwtimer_t *timer)
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{
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TIM_TypeDef *tim;
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tim = (TIM_TypeDef *)timer->parent.user_data;
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return TIM_GetCounter(tim);
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}
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static const struct rt_hwtimer_info _info =
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{
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1000000, /* the maximum count frequency can be set */
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2000, /* the minimum count frequency can be set */
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0xFFFF, /* the maximum counter value */
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HWTIMER_CNTMODE_UP,/* Increment or Decreasing count mode */
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};
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static const struct rt_hwtimer_ops _ops =
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{
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timer_init,
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timer_start,
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timer_stop,
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timer_counter_get,
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timer_ctrl,
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};
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static rt_hwtimer_t _timer0;
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int stm32_hwtimer_init(void)
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{
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_timer0.info = &_info;
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_timer0.ops = &_ops;
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rt_device_hwtimer_register(&_timer0, "timer0", TIM2);
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return 0;
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}
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void TIM2_IRQHandler(void)
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{
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if (TIM_GetITStatus(TIM2, TIM_IT_Update) != RESET)
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{
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TIM_ClearITPendingBit(TIM2, TIM_IT_Update);
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rt_device_hwtimer_isr(&_timer0);
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}
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}
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INIT_BOARD_EXPORT(stm32_hwtimer_init);
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#endif
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