169 lines
4.2 KiB
C
169 lines
4.2 KiB
C
/*
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* File : interrupt.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Change Logs:
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* Date Author Notes
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* 2015/9/15 Bernard Update to new interrupt framework.
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*/
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#include <rtthread.h>
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#include <rthw.h>
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#include <bsp.h>
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extern rt_uint32_t rt_interrupt_nest;
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extern void rt_hw_idt_init(void);
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rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
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rt_uint32_t rt_thread_switch_interrupt_flag;
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/* exception and interrupt handler table */
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struct rt_irq_desc irq_desc[MAX_HANDLERS];
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rt_uint16_t irq_mask_8259A = 0xFFFF;
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void rt_hw_interrupt_handle(int vector, void* param);
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/**
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* @addtogroup I386
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*/
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/*@{*/
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/**
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* This function initializes 8259 interrupt controller
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*/
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void rt_hw_pic_init()
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{
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outb(IO_PIC1, 0x11);
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outb(IO_PIC1+1, IRQ_OFFSET);
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outb(IO_PIC1+1, 1<<IRQ_SLAVE);
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outb(IO_PIC1+1, 0x3);
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outb(IO_PIC1+1, 0xff);
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outb(IO_PIC1, 0x68);
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outb(IO_PIC1, 0x0a);
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outb(IO_PIC2, 0x11);
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outb(IO_PIC2+1, IRQ_OFFSET + 8);
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outb(IO_PIC2+1, IRQ_SLAVE);
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outb(IO_PIC2+1, 0x3);
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outb(IO_PIC2+1, 0xff);
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outb(IO_PIC2, 0x68);
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outb(IO_PIC2, 0x0a);
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if (irq_mask_8259A != 0xFFFF)
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{
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outb(IO_PIC1+1, (char)irq_mask_8259A);
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outb(IO_PIC2+1, (char)(irq_mask_8259A >> 8));
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}
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/* init interrupt nest, and context */
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rt_interrupt_nest = 0;
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rt_interrupt_from_thread = 0;
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rt_interrupt_to_thread = 0;
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rt_thread_switch_interrupt_flag = 0;
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}
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void rt_hw_interrupt_handle(int vector, void* param)
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{
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rt_kprintf("Unhandled interrupt %d occured!!!\n", vector);
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}
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void rt_hw_isr(int vector)
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{
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if (vector < MAX_HANDLERS)
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{
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irq_desc[vector].handler(vector, irq_desc[vector].param);
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}
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}
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/**
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* This function initializes interrupt descript table and 8259 interrupt controller
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*
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*/
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void rt_hw_interrupt_init(void)
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{
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int idx;
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rt_hw_idt_init();
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rt_hw_pic_init();
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/* init exceptions table */
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for(idx=0; idx < MAX_HANDLERS; idx++)
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{
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irq_desc[idx].handler = (rt_isr_handler_t)rt_hw_interrupt_handle;
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irq_desc[idx].param = RT_NULL;
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#ifdef RT_USING_INTERRUPT_INFO
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rt_snprintf(irq_desc[idx].name, RT_NAME_MAX - 1, "default");
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irq_desc[idx].counter = 0;
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#endif
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}
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}
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void rt_hw_interrupt_umask(int vector)
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{
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irq_mask_8259A = irq_mask_8259A&~(1<<vector);
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outb(IO_PIC1+1, (char)irq_mask_8259A);
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outb(IO_PIC2+1, (char)(irq_mask_8259A >> 8));
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}
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void rt_hw_interrupt_mask(int vector)
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{
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irq_mask_8259A = irq_mask_8259A | (1<<vector);
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outb(IO_PIC1+1, (char)irq_mask_8259A);
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outb(IO_PIC2+1, (char)(irq_mask_8259A >> 8));
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}
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rt_isr_handler_t rt_hw_interrupt_install(int vector,
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rt_isr_handler_t handler,
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void *param,
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char *name)
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{
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rt_isr_handler_t old_handler = RT_NULL;
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if(vector < MAX_HANDLERS)
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{
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old_handler = irq_desc[vector].handler;
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if (handler != RT_NULL)
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{
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irq_desc[vector].handler = (rt_isr_handler_t)handler;
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irq_desc[vector].param = param;
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#ifdef RT_USING_INTERRUPT_INFO
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rt_snprintf(irq_desc[vector].name, RT_NAME_MAX - 1, "%s", name);
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irq_desc[vector].counter = 0;
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#endif
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}
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}
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return old_handler;
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}
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rt_base_t rt_hw_interrupt_disable(void)
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{
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rt_base_t level;
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__asm__ __volatile__("pushfl ; popl %0 ; cli":"=g" (level): :"memory");
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return level;
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}
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void rt_hw_interrupt_enable(rt_base_t level)
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{
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__asm__ __volatile__("pushl %0 ; popfl": :"g" (level):"memory", "cc");
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}
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/*@}*/
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