335 lines
9.2 KiB
C
335 lines
9.2 KiB
C
/*
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* Copyright (c) 2015, Freescale Semiconductor, Inc.
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* Copyright 2016-2020 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef _FSL_PIT_H_
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#define _FSL_PIT_H_
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#include "fsl_common.h"
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/*!
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* @addtogroup pit
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* @{
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*/
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/*! @name Driver version */
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/*@{*/
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/*! @brief PIT Driver Version 2.0.4 */
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#define FSL_PIT_DRIVER_VERSION (MAKE_VERSION(2, 0, 4))
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/*@}*/
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/*!
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* @brief List of PIT channels
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* @note Actual number of available channels is SoC dependent
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*/
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typedef enum _pit_chnl
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{
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kPIT_Chnl_0 = 0U, /*!< PIT channel number 0*/
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kPIT_Chnl_1, /*!< PIT channel number 1 */
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kPIT_Chnl_2, /*!< PIT channel number 2 */
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kPIT_Chnl_3, /*!< PIT channel number 3 */
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} pit_chnl_t;
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/*! @brief List of PIT interrupts */
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typedef enum _pit_interrupt_enable
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{
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kPIT_TimerInterruptEnable = PIT_TCTRL_TIE_MASK, /*!< Timer interrupt enable*/
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} pit_interrupt_enable_t;
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/*! @brief List of PIT status flags */
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typedef enum _pit_status_flags
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{
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kPIT_TimerFlag = PIT_TFLG_TIF_MASK, /*!< Timer flag */
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} pit_status_flags_t;
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/*!
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* @brief PIT configuration structure
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*
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* This structure holds the configuration settings for the PIT peripheral. To initialize this
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* structure to reasonable defaults, call the PIT_GetDefaultConfig() function and pass a
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* pointer to your config structure instance.
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*
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* The configuration structure can be made constant so it resides in flash.
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*/
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typedef struct _pit_config
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{
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bool enableRunInDebug; /*!< true: Timers run in debug mode; false: Timers stop in debug mode */
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} pit_config_t;
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/*******************************************************************************
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* API
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******************************************************************************/
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#if defined(__cplusplus)
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extern "C" {
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#endif
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/*!
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* @name Initialization and deinitialization
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* @{
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*/
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/*!
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* @brief Ungates the PIT clock, enables the PIT module, and configures the peripheral for basic operations.
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*
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* @note This API should be called at the beginning of the application using the PIT driver.
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*
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* @param base PIT peripheral base address
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* @param config Pointer to the user's PIT config structure
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*/
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void PIT_Init(PIT_Type *base, const pit_config_t *config);
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/*!
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* @brief Gates the PIT clock and disables the PIT module.
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*
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* @param base PIT peripheral base address
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*/
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void PIT_Deinit(PIT_Type *base);
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/*!
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* @brief Fills in the PIT configuration structure with the default settings.
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*
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* The default values are as follows.
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* @code
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* config->enableRunInDebug = false;
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* @endcode
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* @param config Pointer to the configuration structure.
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*/
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static inline void PIT_GetDefaultConfig(pit_config_t *config)
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{
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assert(NULL != config);
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/* Timers are stopped in Debug mode */
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config->enableRunInDebug = false;
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}
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#if defined(FSL_FEATURE_PIT_HAS_CHAIN_MODE) && FSL_FEATURE_PIT_HAS_CHAIN_MODE
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/*!
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* @brief Enables or disables chaining a timer with the previous timer.
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*
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* When a timer has a chain mode enabled, it only counts after the previous
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* timer has expired. If the timer n-1 has counted down to 0, counter n
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* decrements the value by one. Each timer is 32-bits, which allows the developers
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* to chain timers together and form a longer timer (64-bits and larger). The first timer
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* (timer 0) can't be chained to any other timer.
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*
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* @param base PIT peripheral base address
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* @param channel Timer channel number which is chained with the previous timer
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* @param enable Enable or disable chain.
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* true: Current timer is chained with the previous timer.
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* false: Timer doesn't chain with other timers.
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*/
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static inline void PIT_SetTimerChainMode(PIT_Type *base, pit_chnl_t channel, bool enable)
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{
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if (enable)
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{
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base->CHANNEL[channel].TCTRL |= PIT_TCTRL_CHN_MASK;
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}
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else
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{
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base->CHANNEL[channel].TCTRL &= ~PIT_TCTRL_CHN_MASK;
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}
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}
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#endif /* FSL_FEATURE_PIT_HAS_CHAIN_MODE */
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/*! @}*/
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/*!
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* @name Interrupt Interface
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* @{
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*/
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/*!
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* @brief Enables the selected PIT interrupts.
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*
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* @param base PIT peripheral base address
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* @param channel Timer channel number
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* @param mask The interrupts to enable. This is a logical OR of members of the
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* enumeration ::pit_interrupt_enable_t
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*/
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static inline void PIT_EnableInterrupts(PIT_Type *base, pit_chnl_t channel, uint32_t mask)
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{
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base->CHANNEL[channel].TCTRL |= mask;
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}
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/*!
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* @brief Disables the selected PIT interrupts.
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*
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* @param base PIT peripheral base address
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* @param channel Timer channel number
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* @param mask The interrupts to disable. This is a logical OR of members of the
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* enumeration ::pit_interrupt_enable_t
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*/
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static inline void PIT_DisableInterrupts(PIT_Type *base, pit_chnl_t channel, uint32_t mask)
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{
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base->CHANNEL[channel].TCTRL &= ~mask;
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}
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/*!
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* @brief Gets the enabled PIT interrupts.
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*
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* @param base PIT peripheral base address
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* @param channel Timer channel number
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*
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* @return The enabled interrupts. This is the logical OR of members of the
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* enumeration ::pit_interrupt_enable_t
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*/
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static inline uint32_t PIT_GetEnabledInterrupts(PIT_Type *base, pit_chnl_t channel)
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{
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return (base->CHANNEL[channel].TCTRL & PIT_TCTRL_TIE_MASK);
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}
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/*! @}*/
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/*!
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* @name Status Interface
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* @{
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*/
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/*!
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* @brief Gets the PIT status flags.
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*
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* @param base PIT peripheral base address
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* @param channel Timer channel number
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*
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* @return The status flags. This is the logical OR of members of the
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* enumeration ::pit_status_flags_t
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*/
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static inline uint32_t PIT_GetStatusFlags(PIT_Type *base, pit_chnl_t channel)
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{
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return (base->CHANNEL[channel].TFLG & PIT_TFLG_TIF_MASK);
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}
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/*!
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* @brief Clears the PIT status flags.
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*
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* @param base PIT peripheral base address
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* @param channel Timer channel number
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* @param mask The status flags to clear. This is a logical OR of members of the
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* enumeration ::pit_status_flags_t
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*/
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static inline void PIT_ClearStatusFlags(PIT_Type *base, pit_chnl_t channel, uint32_t mask)
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{
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base->CHANNEL[channel].TFLG = mask;
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}
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/*! @}*/
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/*!
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* @name Read and Write the timer period
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* @{
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*/
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/*!
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* @brief Sets the timer period in units of count.
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*
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* Timers begin counting from the value set by this function until it reaches 0,
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* then it generates an interrupt and load this register value again.
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* Writing a new value to this register does not restart the timer. Instead, the value
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* is loaded after the timer expires.
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*
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* @note Users can call the utility macros provided in fsl_common.h to convert to ticks.
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*
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* @param base PIT peripheral base address
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* @param channel Timer channel number
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* @param count Timer period in units of ticks
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*/
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static inline void PIT_SetTimerPeriod(PIT_Type *base, pit_chnl_t channel, uint32_t count)
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{
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assert(count != 0U);
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/* According to RM, the LDVAL trigger = clock ticks -1 */
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base->CHANNEL[channel].LDVAL = count - 1U;
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}
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/*!
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* @brief Reads the current timer counting value.
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*
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* This function returns the real-time timer counting value, in a range from 0 to a
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* timer period.
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*
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* @note Users can call the utility macros provided in fsl_common.h to convert ticks to usec or msec.
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*
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* @param base PIT peripheral base address
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* @param channel Timer channel number
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*
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* @return Current timer counting value in ticks
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*/
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static inline uint32_t PIT_GetCurrentTimerCount(PIT_Type *base, pit_chnl_t channel)
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{
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return base->CHANNEL[channel].CVAL;
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}
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/*! @}*/
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/*!
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* @name Timer Start and Stop
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* @{
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*/
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/*!
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* @brief Starts the timer counting.
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*
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* After calling this function, timers load period value, count down to 0 and
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* then load the respective start value again. Each time a timer reaches 0,
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* it generates a trigger pulse and sets the timeout interrupt flag.
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*
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* @param base PIT peripheral base address
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* @param channel Timer channel number.
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*/
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static inline void PIT_StartTimer(PIT_Type *base, pit_chnl_t channel)
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{
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base->CHANNEL[channel].TCTRL |= PIT_TCTRL_TEN_MASK;
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}
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/*!
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* @brief Stops the timer counting.
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*
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* This function stops every timer counting. Timers reload their periods
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* respectively after the next time they call the PIT_DRV_StartTimer.
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*
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* @param base PIT peripheral base address
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* @param channel Timer channel number.
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*/
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static inline void PIT_StopTimer(PIT_Type *base, pit_chnl_t channel)
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{
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base->CHANNEL[channel].TCTRL &= ~PIT_TCTRL_TEN_MASK;
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}
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/*! @}*/
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#if defined(FSL_FEATURE_PIT_HAS_LIFETIME_TIMER) && FSL_FEATURE_PIT_HAS_LIFETIME_TIMER
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/*!
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* @brief Reads the current lifetime counter value.
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*
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* The lifetime timer is a 64-bit timer which chains timer 0 and timer 1 together.
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* Timer 0 and 1 are chained by calling the PIT_SetTimerChainMode before using this timer.
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* The period of lifetime timer is equal to the "period of timer 0 * period of timer 1".
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* For the 64-bit value, the higher 32-bit has the value of timer 1, and the lower 32-bit
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* has the value of timer 0.
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*
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* @param base PIT peripheral base address
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*
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* @return Current lifetime timer value
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*/
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uint64_t PIT_GetLifetimeTimerCount(PIT_Type *base);
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#endif /* FSL_FEATURE_PIT_HAS_LIFETIME_TIMER */
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#if defined(__cplusplus)
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}
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#endif
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/*! @}*/
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#endif /* _FSL_PIT_H_ */
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