rt-thread-official/bsp/apollo2/board/pdm.c

/*
 * File      :_pdm.c
 * This file is part of RT-Thread RTOS
 * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License along
 *  with this program; if not, write to the Free Software Foundation, Inc.,
 *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
 *
 * Change Logs:
 * Date           Author       Notes
 * 2017-12-04     Haley        the first version
 */

#include <rtthread.h>
#include <rtdevice.h>
#include "am_mcu_apollo.h"
#include "board.h"

#ifdef RT_USING_PDM

/* sem define */
rt_sem_t pdmsem = RT_NULL;

#define NWA_FRAME_MS 10
#define NWA_FRAME_SAMPLES (16*NWA_FRAME_MS)    /* 16k, 16bit, mono audio data */
#define PDM_FIFO_THRESHOLD  NWA_FRAME_SAMPLES

#define PDM_GPIO_CLK        22
#define PDM_GPIO_CFG_CLK    AM_HAL_PIN_22_PDM_CLK
#define PDM_GPIO_DATA       23
#define PDM_GPIO_CFG_DATA   AM_HAL_PIN_23_PDM_DATA

#define PING_PONG_BUF_SIZE	8000*NWA_FRAME_MS
static rt_uint16_t am_pdm_buffer_pool[PING_PONG_BUF_SIZE];
static rt_uint8_t pdm_flag = 0;
static rt_uint16_t pdm_cnt = 0;


static am_hal_pdm_config_t g_sPDMConfig =
{
    AM_HAL_PDM_PCFG_LRSWAP_DISABLE | AM_HAL_PDM_PCFG_RIGHT_PGA_P105DB | AM_HAL_PDM_PCFG_LEFT_PGA_P105DB
           | AM_HAL_PDM_PCFG_MCLKDIV_DIV1 | AM_HAL_PDM_PCFG_SINC_RATE(48) | AM_HAL_PDM_PCFG_ADCHPD_ENABLE
           | AM_HAL_PDM_PCFG_HPCUTOFF(0xB) | AM_HAL_PDM_PCFG_CYCLES(0x1) | AM_HAL_PDM_PCFG_SOFTMUTE_DISABLE
           | AM_HAL_PDM_PCFG_PDMCORE_ENABLE, /* Set the PDM configuration */
    AM_REG_PDM_VCFG_IOCLKEN_EN | AM_HAL_PDM_VCFG_RSTB_NORMAL | AM_REG_PDM_VCFG_PDMCLKSEL_750KHz
           | AM_HAL_PDM_VCFG_PDMCLK_ENABLE | AM_HAL_PDM_VCFG_I2SMODE_DISABLE | AM_HAL_PDM_VCFG_BCLKINV_DISABLE
           | AM_HAL_PDM_VCFG_DMICDEL_DISABLE | AM_HAL_PDM_VCFG_SELAP_INTERNAL | AM_HAL_PDM_VCFG_PACK_DISABLE
           | AM_HAL_PDM_VCFG_CHANNEL_RIGHT, /* Set the Voice Configuration */
    PDM_FIFO_THRESHOLD, /* Select the FIFO PCM sample threshold */
};

/**
 * @brief Get the pdm data.
 *
 * @param None.
 *
 * This function Get the pdm data.
 *
 * @return None.
 */
rt_uint8_t am_pdm_data_get(rt_uint8_t *buff, rt_uint16_t size)
{
    uint8_t temp;
    int i;

    /* wait adc interrupt release sem forever */
    rt_sem_take(pdmsem, RT_WAITING_FOREVER);

    for(i = 0; i < PING_PONG_BUF_SIZE; i++)
    {
        temp = (uint8_t)(am_pdm_buffer_pool[i] & 0xFF);
        /* lower byte */
        while ( AM_BFRn(UART, 0, FR, TXFF) );
        AM_REGn(UART, 0, DR) = temp;

        temp = (uint8_t)((am_pdm_buffer_pool[i] & 0xFF00)>>8);
        /* higher byte */
        while ( AM_BFRn(UART, 0, FR, TXFF) );
        AM_REGn(UART, 0, DR) = temp;
    }
    /* copy the data */
    //rt_memcpy(buff, am_pdm_buffer_pool, size*sizeof(rt_uint16_t));

    pdm_flag = 0;

    return 0;
}

/**
 * @brief Start the pdm.
 *
 * @param None.
 *
 * This function Start the pdm.
 *
 * @return None.
 */
void am_pdm_start(void)
{
    /* adcsem create */
    pdmsem = rt_sem_create("pdmsem", 0, RT_IPC_FLAG_FIFO);

    /* Enable PDM */
    am_hal_pdm_enable();
    am_hal_interrupt_enable(AM_HAL_INTERRUPT_PDM);
}

/**
 * @brief Stop the pdm.
 *
 * @param None.
 *
 * This function Stop the pdm.
 *
 * @return None.
 */
void am_pdm_stop(void)
{
    /* Disable PDM */
    am_hal_pdm_disable();
    am_hal_interrupt_disable(AM_HAL_INTERRUPT_PDM);

    /* adcsem delete */
    rt_sem_delete(pdmsem);
}

/**
 * @brief Get the pdm left gain.
 *
 * @param None.
 *
 * This function Get the pdm left gain.
 *
 * @return gain_val.
 */
uint8_t am_pdm_left_gain_get(void)
{
    /* get the left gain */
    return am_hal_pdm_left_gain_get();
}

/**
 * @brief Set the pdm left gain.
 *
 * @param None.
 *
 * This function Set the pdm left gain.
 *
 * @return None.
 */
void am_pdm_left_gain_set(uint8_t gain_val)
{
    /* set the left gain */
    am_hal_pdm_left_gain_set(gain_val);
}

/**
 * @brief Get the pdm right gain.
 *
 * @param None.
 *
 * This function Get the pdm right gain.
 *
 * @return gain_val.
 */
uint8_t am_pdm_right_gain_get(void)
{
    /* get the right gain */
    return am_hal_pdm_right_gain_get();
}

/**
 * @brief Set the pdm right gain.
 *
 * @param None.
 *
 * This function Set the pdm right gain.
 *
 * @return None.
 */
void am_pdm_right_gain_set(uint8_t gain_val)
{
    /* set the right gain */
    am_hal_pdm_right_gain_set(gain_val);
}

/**
 * @brief Interrupt handler for the PDM
 *
 * This function is Interrupt handler for the PDM
 *
 * @return None.
 */
void am_pdm_isr (void)
{
    uint32_t ui32FifoData;
    int i;

    /* Clear the PDM interrupt */
    am_hal_pdm_int_clear(AM_HAL_PDM_INT_UNDFL | AM_HAL_PDM_INT_OVF | AM_HAL_PDM_INT_FIFO);

    for (i = 0; i < PDM_FIFO_THRESHOLD; i++)  /* adjust as needed */
    {
        ui32FifoData = am_hal_pdm_fifo_data_read();

        if(pdm_flag == 0)
        {
            am_pdm_buffer_pool[pdm_cnt * PDM_FIFO_THRESHOLD + i] = (uint16_t)ui32FifoData;
        }
    }

    if(pdm_flag == 0)
        pdm_cnt ++;

    if(pdm_cnt == PING_PONG_BUF_SIZE/PDM_FIFO_THRESHOLD)	/* 500 means 10 second logging under 8k sampling rate */
    {
        pdm_cnt = 0;
        pdm_flag = 1;

        /* release pdmsem */
        rt_sem_release(pdmsem);
    }
}

/**
 * @brief Initialize the PDM
 *
 * This function initialize the PDM
 *
 * @return None.
 */
int rt_hw_pdm_init(void)
{
    /* Enable power to modules used */
    am_hal_pwrctrl_periph_enable(AM_HAL_PWRCTRL_PDM);

    /* Enable the PDM clock and data */
    am_hal_gpio_pin_config(PDM_GPIO_CLK, PDM_GPIO_CFG_CLK | AM_HAL_GPIO_HIGH_DRIVE);
    am_hal_gpio_pin_config(PDM_GPIO_DATA, PDM_GPIO_CFG_DATA );

    /* PDM setting */
    am_hal_pdm_config(&g_sPDMConfig);

    /* Enable PDM interrupts */
    am_hal_pdm_int_enable(AM_HAL_PDM_INT_FIFO);

    /* Clear PDM interrupts */
    am_hal_pdm_int_clear(AM_HAL_PDM_INT_UNDFL | AM_HAL_PDM_INT_OVF | AM_HAL_PDM_INT_FIFO);

    rt_kprintf("pdm_init!\n");

    return 0;
}
#ifdef RT_USING_COMPONENTS_INIT
INIT_BOARD_EXPORT(rt_hw_pdm_init);
#endif

#endif

/*@}*/