156 lines
3.3 KiB
C
156 lines
3.3 KiB
C
/**
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******************************************************************************
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* @brief WWDG functions of the firmware library.
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "gd32f10x_wwdg.h"
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#include "gd32f10x_rcc.h"
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/** @addtogroup GD32F10x_Firmware
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* @{
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*/
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/** @defgroup WWDG
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* @brief WWDG driver modules
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* @{
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*/
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/** @defgroup WWDG_Private_Variables
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* @{
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*/
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/* CFR register bit mask */
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#define CFR_PS_MASK ((uint32_t)0xFFFFFE7F)
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#define CFR_WIN_MASK ((uint32_t)0xFFFFFF80)
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#define BIT_MASK ((uint8_t)0x7F)
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/**
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* @}
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*/
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/** @defgroup WWDG_Private_Functions
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* @{
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*/
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/**
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* @brief Reset the WWDG configuration.
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* @param None
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* @retval None
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*/
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void WWDG_DeInit(void)
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{
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RCC_APB1PeriphReset_Enable(RCC_APB1PERIPH_WWDG, ENABLE);
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RCC_APB1PeriphReset_Enable(RCC_APB1PERIPH_WWDG, DISABLE);
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}
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/**
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* @brief Set WWDG prescaler value.
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* @param PrescalerValue: WWDG Prescaler value.
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* This parameter can be one of the following values:
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* @arg WWDG_PRESCALER_1: the time base of watchdog counter = (PCLK1/4096)/1
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* @arg WWDG_PRESCALER_2: the time base of watchdog counter = (PCLK1/4096)/2
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* @arg WWDG_PRESCALER_4: the time base of watchdog counter = (PCLK1/4096)/4
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* @arg WWDG_PRESCALER_8: the time base of watchdog counter = (PCLK1/4096)/8
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* @retval None
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*/
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void WWDG_SetPrescalerValue(uint32_t PrescalerValue)
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{
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uint32_t temp = 0;
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/* Clear PS[1:0] bits */
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temp = WWDG->CFR & CFR_PS_MASK;
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/* Set PS[1:0] bits */
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temp |= PrescalerValue;
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WWDG->CFR = temp;
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}
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/**
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* @brief Set watchdog window value.
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* @param WindowValue: the window value to be compared to the downcounter.
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* @retval None
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*/
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void WWDG_SetWindowValue(uint8_t WindowValue)
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{
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__IO uint32_t temp = 0;
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/* Clear WIN[6:0] bits */
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temp = WWDG->CFR & CFR_WIN_MASK;
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/* Set WIN[6:0] bits */
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temp |= WindowValue & (uint32_t) BIT_MASK;
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WWDG->CFR = temp;
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}
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/**
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* @brief Enable the WWDG Early wakeup interrupt(EWI).
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* @note An interrupt occurs when the counter reaches 0x40 if the bit is set.
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* It's cleared by a hardware reset. A write of 0 has no effect.
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* @param None
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* @retval None
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*/
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void WWDG_EnableInt(void)
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{
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WWDG->CFR |= WWDG_CFR_EWI;
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}
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/**
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* @brief Set the value of the watchdog counter.
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* @param CounterValue: the watchdog counter value.
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* @retval None
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*/
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void WWDG_SetCounterValue(uint8_t CounterValue)
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{
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/* Write to CNT[6:0] bits */
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WWDG->CTLR = CounterValue & BIT_MASK;
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}
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/**
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* @brief Start the window watchdog counter.
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* @param CounterValue: The value of the watchdog counter.
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* @retval None
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*/
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void WWDG_Enable(uint8_t CounterValue)
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{
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WWDG->CTLR = WWDG_CTLR_WDGEN | CounterValue;
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}
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/**
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* @brief Check the Early Wakeup interrupt bit state.
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* @param None
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* @retval The new state of the Early Wakeup interrupt (SET or RESET).
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*/
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TypeState WWDG_GetBitState(void)
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{
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if ((WWDG->STR) != (uint32_t)RESET) {
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return SET;
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} else {
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return RESET;
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}
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}
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/**
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* @brief Clear Early Wakeup interrupt flag.
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* @param None
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* @retval None
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*/
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void WWDG_ClearBitState(void)
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{
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WWDG->STR = (uint32_t)RESET;
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}
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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