247 lines
6.9 KiB
C
247 lines
6.9 KiB
C
/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2019-07-23 tyustli first version
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*/
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#include <drv_usart.h>
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#ifdef RT_USING_SERIAL
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#if !defined(BSP_USING_UART0) && !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2) \
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&& !defined(BSP_USING_UART3) && !defined(BSP_USING_UART4) && !defined(BSP_USING_UART5)
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#error "Please define at least one BSP_USING_UARTx"
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/* this driver can be disabled at menuconfig → RT-Thread Components → Device Drivers */
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#endif
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struct gd32_usart {
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char *name;
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rt_uint32_t usart_base;
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rt_uint32_t usart_clk;
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rt_uint32_t gpio_clk;
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rt_uint32_t gpio_port;
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rt_uint32_t tx_pin;
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rt_uint32_t rx_pin;
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IRQn_Type irqn;
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struct rt_serial_device serial;
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};
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enum {
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#ifdef BSP_USING_UART0
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GDUSART0_INDEX,
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#endif
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};
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static struct gd32_usart usart_config[] = {
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#ifdef BSP_USING_UART0
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{ "uart0",
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USART0,
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RCU_USART0,
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RCU_GPIOA,
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GPIOA,
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GPIO_PIN_9,
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GPIO_PIN_10,
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USART0_IRQn, },
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#endif
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};
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static rt_err_t gd32_configure(struct rt_serial_device *serial,
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struct serial_configure *cfg) {
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struct gd32_usart *usart;
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RT_ASSERT(serial != RT_NULL);
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RT_ASSERT(cfg != RT_NULL);
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usart = (struct gd32_usart *) serial->parent.user_data;
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RT_ASSERT(usart != RT_NULL);
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/* enable GPIO clock */
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rcu_periph_clock_enable(usart->gpio_clk);
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/* enable USART clock */
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rcu_periph_clock_enable(usart->usart_clk);
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/* connect port to USARTx_Tx */
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gpio_init(usart->gpio_port, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ,
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usart->tx_pin);
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/* connect port to USARTx_Rx */
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gpio_init(usart->gpio_port, GPIO_MODE_IN_FLOATING, GPIO_OSPEED_50MHZ,
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usart->rx_pin);
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usart_deinit(usart->usart_base);
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usart_baudrate_set(usart->usart_base, cfg->baud_rate);
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switch (cfg->data_bits) {
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case DATA_BITS_8:
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usart_word_length_set(usart->usart_base, USART_WL_8BIT);
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break;
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case DATA_BITS_9:
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usart_word_length_set(usart->usart_base, USART_WL_9BIT);
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break;
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default:
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usart_word_length_set(usart->usart_base, USART_WL_8BIT);
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break;
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}
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switch (cfg->stop_bits) {
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case STOP_BITS_1:
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usart_stop_bit_set(usart->usart_base, USART_STB_1BIT);
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break;
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case STOP_BITS_2:
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usart_stop_bit_set(usart->usart_base, USART_STB_2BIT);
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break;
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default:
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usart_stop_bit_set(usart->usart_base, USART_STB_1BIT);
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break;
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}
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switch (cfg->parity) {
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case PARITY_NONE:
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usart_parity_config(usart->usart_base, USART_PM_NONE);
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break;
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case PARITY_ODD:
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usart_parity_config(usart->usart_base, USART_PM_ODD);
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break;
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case PARITY_EVEN:
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usart_parity_config(usart->usart_base, USART_PM_EVEN);
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break;
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default:
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usart_parity_config(usart->usart_base, USART_PM_NONE);
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break;
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}
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usart_hardware_flow_rts_config(usart->usart_base, USART_RTS_DISABLE);
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usart_hardware_flow_cts_config(usart->usart_base, USART_RTS_DISABLE);
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usart_receive_config(usart->usart_base, USART_RECEIVE_ENABLE);
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usart_transmit_config(usart->usart_base, USART_TRANSMIT_ENABLE);
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usart_enable(usart->usart_base);
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return RT_EOK;
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}
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static rt_err_t gd32_control(struct rt_serial_device *serial, int cmd,
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void *arg) {
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struct gd32_usart *usart;
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RT_ASSERT(serial != RT_NULL);
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usart = (struct gd32_usart *) serial->parent.user_data;
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RT_ASSERT(usart != RT_NULL);
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switch (cmd) {
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case RT_DEVICE_CTRL_CLR_INT:
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eclic_irq_disable(usart->usart_base);
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usart_interrupt_disable(usart->usart_base, USART_INT_RBNE);
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break;
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case RT_DEVICE_CTRL_SET_INT:
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eclic_set_nlbits(ECLIC_GROUP_LEVEL3_PRIO1);
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eclic_irq_enable(usart->irqn, 1, 0);
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/* enable USART0 receive interrupt */
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usart_interrupt_enable(usart->usart_base, USART_INT_RBNE);
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break;
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}
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return RT_EOK;
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}
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static int gd32_putc(struct rt_serial_device *serial, char ch) {
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struct gd32_usart *usart;
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RT_ASSERT(serial != RT_NULL);
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usart = (struct gd32_usart *) serial->parent.user_data;
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RT_ASSERT(usart != RT_NULL);
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usart_data_transmit(usart->usart_base, (uint8_t) ch);
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while (usart_flag_get(usart->usart_base, USART_FLAG_TBE) == RESET)
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;
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return 1;
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}
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static int gd32_getc(struct rt_serial_device *serial) {
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int ch;
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struct gd32_usart *usart;
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RT_ASSERT(serial != RT_NULL);
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usart = (struct gd32_usart *) serial->parent.user_data;
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RT_ASSERT(usart != RT_NULL);
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ch = -1;
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if (RESET != usart_flag_get(usart->usart_base, USART_FLAG_RBNE)) {
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ch = usart_data_receive(usart->usart_base) & 0xff;
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}
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return ch;
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}
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static const struct rt_uart_ops gd32_usart_ops = { gd32_configure, gd32_control,
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gd32_putc, gd32_getc,
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RT_NULL };
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static void usart_isr(struct rt_serial_device *serial) {
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struct gd32_usart *usart;
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RT_ASSERT(serial != RT_NULL);
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usart = (struct gd32_usart *) serial->parent.user_data;
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RT_ASSERT(usart != RT_NULL);
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if ((usart_interrupt_flag_get(usart->usart_base, USART_INT_FLAG_RBNE)
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!= RESET)
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&& (RESET != usart_flag_get(usart->usart_base, USART_FLAG_RBNE))) {
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rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
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usart_interrupt_flag_clear(usart->usart_base, USART_INT_FLAG_RBNE);
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usart_flag_clear(usart->usart_base, USART_FLAG_RBNE);
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} else {
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if (usart_flag_get(usart->usart_base, USART_FLAG_CTSF) != RESET) {
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usart_flag_clear(usart->usart_base, USART_FLAG_CTSF);
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}
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if (usart_flag_get(usart->usart_base, USART_FLAG_LBDF) != RESET) {
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usart_flag_clear(usart->usart_base, USART_FLAG_LBDF);
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}
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if (usart_flag_get(usart->usart_base, USART_FLAG_TC) != RESET) {
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usart_flag_clear(usart->usart_base, USART_FLAG_TC);
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}
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}
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}
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#ifdef BSP_USING_UART0
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void USART0_IRQHandler(void) {
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rt_interrupt_enter();
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usart_isr(&usart_config[GDUSART0_INDEX].serial);
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rt_interrupt_leave();
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}
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#endif
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int rt_hw_usart_init(void) {
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rt_size_t obj_num;
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int index;
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obj_num = sizeof(usart_config) / sizeof(struct gd32_usart);
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struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
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rt_err_t result = 0;
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for (index = 0; index < obj_num; index++) {
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usart_config[index].serial.ops = &gd32_usart_ops;
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usart_config[index].serial.config = config;
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/* register UART device */
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result = rt_hw_serial_register(&usart_config[index].serial,
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usart_config[index].name,
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX
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| RT_DEVICE_FLAG_INT_TX, &usart_config[index]);
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RT_ASSERT(result == RT_EOK);
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}
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return result;
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}
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#endif /* RT_USING_SERIAL */
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/******************** end of file *******************/
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