44 lines
1.2 KiB
C
44 lines
1.2 KiB
C
/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-05-20 bigmagic first version
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*/
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#ifndef __DRV_UART_H__
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#define __DRV_UART_H__
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#define UART0_IRQ (10)
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#define UART_DEFAULT_BAUDRATE 115200
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#define UART_BASE (0x10000000L)
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#define RHR 0 // Receive Holding Register (read mode)
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#define THR 0 // Transmit Holding Register (write mode)
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#define DLL 0 // LSB of Divisor Latch (write mode)
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#define IER 1 // Interrupt Enable Register (write mode)
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#define DLM 1 // MSB of Divisor Latch (write mode)
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#define FCR 2 // FIFO Control Register (write mode)
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#define ISR 2 // Interrupt Status Register (read mode)
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#define LCR 3 // Line Control Register
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#define MCR 4 // Modem Control Register
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#define LSR 5 // Line Status Register
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#define MSR 6 // Modem Status Register
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#define SPR 7 // ScratchPad Register
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#define UART_REG(reg) ((volatile uint8_t *)(UART_BASE + reg))
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#define LSR_RX_READY (1 << 0)
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#define LSR_TX_IDLE (1 << 5)
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#define uart_read_reg(reg) (*(UART_REG(reg)))
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#define uart_write_reg(reg, v) (*(UART_REG(reg)) = (v))
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int rt_hw_uart_init(void);
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#endif /* __DRV_UART_H__ */
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