156 lines
6.6 KiB
C
156 lines
6.6 KiB
C
/*
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* Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-10-10 RT-Thread the first version,
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* compatible to riscv-v-spec-1.0
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*/
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#ifndef __EXT_CONTEXT_H__
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#define __EXT_CONTEXT_H__
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#ifdef __ASSEMBLY__
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/**
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* extension context maintenance
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*/
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#include "cpuport.h"
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#include "encoding.h"
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#include "vector_encoding.h"
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/**
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* ==================================
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* FPU EXTENSION
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* ==================================
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*/
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#ifdef ENABLE_FPU
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#define FPU_CTX_F0_OFF (REGBYTES * 0) /* offsetof(fpu_context_t, fpustatus.f[0]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F1_OFF (REGBYTES * 1) /* offsetof(fpu_context_t, fpustatus.f[1]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F2_OFF (REGBYTES * 2) /* offsetof(fpu_context_t, fpustatus.f[2]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F3_OFF (REGBYTES * 3) /* offsetof(fpu_context_t, fpustatus.f[3]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F4_OFF (REGBYTES * 4) /* offsetof(fpu_context_t, fpustatus.f[4]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F5_OFF (REGBYTES * 5) /* offsetof(fpu_context_t, fpustatus.f[5]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F6_OFF (REGBYTES * 6) /* offsetof(fpu_context_t, fpustatus.f[6]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F7_OFF (REGBYTES * 7) /* offsetof(fpu_context_t, fpustatus.f[7]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F8_OFF (REGBYTES * 8) /* offsetof(fpu_context_t, fpustatus.f[8]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F9_OFF (REGBYTES * 9) /* offsetof(fpu_context_t, fpustatus.f[9]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F10_OFF (REGBYTES * 10) /* offsetof(fpu_context_t, fpustatus.f[10]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F11_OFF (REGBYTES * 11) /* offsetof(fpu_context_t, fpustatus.f[11]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F12_OFF (REGBYTES * 12) /* offsetof(fpu_context_t, fpustatus.f[12]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F13_OFF (REGBYTES * 13) /* offsetof(fpu_context_t, fpustatus.f[13]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F14_OFF (REGBYTES * 14) /* offsetof(fpu_context_t, fpustatus.f[14]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F15_OFF (REGBYTES * 15) /* offsetof(fpu_context_t, fpustatus.f[15]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F16_OFF (REGBYTES * 16) /* offsetof(fpu_context_t, fpustatus.f[16]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F17_OFF (REGBYTES * 17) /* offsetof(fpu_context_t, fpustatus.f[17]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F18_OFF (REGBYTES * 18) /* offsetof(fpu_context_t, fpustatus.f[18]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F19_OFF (REGBYTES * 19) /* offsetof(fpu_context_t, fpustatus.f[19]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F20_OFF (REGBYTES * 20) /* offsetof(fpu_context_t, fpustatus.f[20]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F21_OFF (REGBYTES * 21) /* offsetof(fpu_context_t, fpustatus.f[21]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F22_OFF (REGBYTES * 22) /* offsetof(fpu_context_t, fpustatus.f[22]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F23_OFF (REGBYTES * 23) /* offsetof(fpu_context_t, fpustatus.f[23]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F24_OFF (REGBYTES * 24) /* offsetof(fpu_context_t, fpustatus.f[24]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F25_OFF (REGBYTES * 25) /* offsetof(fpu_context_t, fpustatus.f[25]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F26_OFF (REGBYTES * 26) /* offsetof(fpu_context_t, fpustatus.f[26]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F27_OFF (REGBYTES * 27) /* offsetof(fpu_context_t, fpustatus.f[27]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F28_OFF (REGBYTES * 28) /* offsetof(fpu_context_t, fpustatus.f[28]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F29_OFF (REGBYTES * 29) /* offsetof(fpu_context_t, fpustatus.f[29]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F30_OFF (REGBYTES * 30) /* offsetof(fpu_context_t, fpustatus.f[30]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#define FPU_CTX_F31_OFF (REGBYTES * 31) /* offsetof(fpu_context_t, fpustatus.f[31]) - offsetof(fpu_context_t, fpustatus.f[0]) */
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#endif /* ENABLE_FPU */
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/**
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* ==================================
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* VECTOR EXTENSION
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* ==================================
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*/
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#ifdef ENABLE_VECTOR
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#define VEC_FRAME_VSTART (0 * REGBYTES)
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#define VEC_FRAME_VTYPE (1 * REGBYTES)
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#define VEC_FRAME_VL (2 * REGBYTES)
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#define VEC_FRAME_VCSR (3 * REGBYTES)
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#define VEC_FRAME_V0 (4 * REGBYTES)
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.macro GET_VEC_FRAME_LEN, xreg
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csrr \xreg, vlenb
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slli \xreg, \xreg, 5
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addi \xreg, \xreg, 4 * REGBYTES
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.endm
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/**
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* @brief save vector extension hardware state
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*
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* @param dst register storing bottom of storage block
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*
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*/
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.macro SAVE_VECTOR, dst
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mv t1, \dst
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csrr t0, vstart
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STORE t0, VEC_FRAME_VSTART(t1)
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csrr t0, vtype
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STORE t0, VEC_FRAME_VTYPE(t1)
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csrr t0, vl
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STORE t0, VEC_FRAME_VL(t1)
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csrr t0, vcsr
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STORE t0, VEC_FRAME_VCSR(t1)
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addi t1, t1, VEC_FRAME_V0
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// config vector setting,
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// t2 is updated to length of a vector group in bytes
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VEC_CONFIG_SETVLI(t2, x0, VEC_IMM_SEW_8, VEC_IMM_LMUL_8)
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vse8.v v0, (t1)
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add t1, t1, t2
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vse8.v v8, (t1)
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add t1, t1, t2
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vse8.v v16, (t1)
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add t1, t1, t2
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vse8.v v24, (t1)
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.endm
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/**
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* @brief restore vector extension hardware states
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*
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* @param dst register storing bottom of storage block
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*
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*/
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.macro RESTORE_VECTOR, dst
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// restore vector registers first since it will modify vector states
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mv t0, \dst
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addi t1, t0, VEC_FRAME_V0
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VEC_CONFIG_SETVLI(t2, x0, VEC_IMM_SEW_8, VEC_IMM_LMUL_8)
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vle8.v v0, (t1)
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add t1, t1, t2
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vle8.v v8, (t1)
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add t1, t1, t2
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vle8.v v16, (t1)
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add t1, t1, t2
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vle8.v v24, (t1)
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mv t1, t0
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LOAD t0, VEC_FRAME_VSTART(t1)
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csrw vstart, t0
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LOAD t0, VEC_FRAME_VCSR(t1)
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csrw vcsr, t0
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LOAD t0, VEC_FRAME_VTYPE(t1)
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LOAD t3, VEC_FRAME_VL(t1)
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VEC_CONFIG_SET_VL_VTYPE(t3, t0)
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.endm
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#endif /* ENABLE_VECTOR */
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#endif /* __ASSEMBLY__ */
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#endif /* __EXT_CONTEXT_H__ */
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