149 lines
3.9 KiB
C
149 lines
3.9 KiB
C
/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2019-04-25 tyx the first version
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*/
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#ifndef __HW_CRC_H__
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#define __HW_CRC_H__
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#include <hwcrypto.h>
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#define CRC_FLAG_REFIN (0x1 << 0)
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#define CRC_FLAG_REFOUT (0x1 << 1)
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#define HWCRYPTO_CRC8_CFG \
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{ \
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.last_val = 0x00, \
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.poly = 0x07, \
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.width = 8, \
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.xorout = 0x00, \
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.flags = 0, \
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}
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#define HWCRYPTO_CRC16_CFG \
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{ \
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.last_val = 0x0000, \
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.poly = 0x8005, \
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.width = 16, \
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.xorout = 0x0000, \
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.flags = 0, \
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}
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#define HWCRYPTO_CRC32_CFG \
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{ \
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.last_val = 0x00000000, \
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.poly = 0x04C11DB7, \
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.width = 32, \
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.xorout = 0x00000000, \
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.flags = 0, \
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}
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#define HWCRYPTO_CRC_CCITT_CFG \
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{ \
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.last_val = 0x0000, \
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.poly = 0x1021, \
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.width = 16, \
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.xorout = 0x0000, \
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.flags = CRC_FLAG_REFIN | CRC_FLAG_REFOUT, \
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}
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#define HWCRYPTO_CRC_DNP_CFG \
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{ \
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.last_val = 0x0000, \
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.poly = 0x3D65, \
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.width = 16, \
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.xorout = 0xffff, \
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.flags = CRC_FLAG_REFIN | CRC_FLAG_REFOUT, \
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}
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#ifdef __cplusplus
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extern "C" {
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#endif
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struct hwcrypto_crc;
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typedef enum
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{
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HWCRYPTO_CRC_CUSTOM, /**< Custom CRC mode */
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HWCRYPTO_CRC_CRC8, /**< poly : 0x07 */
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HWCRYPTO_CRC_CRC16, /**< poly : 0x8005 */
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HWCRYPTO_CRC_CRC32, /**< poly : 0x04C11DB7 */
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HWCRYPTO_CRC_CCITT, /**< poly : 0x1021 */
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HWCRYPTO_CRC_DNP, /**< poly : 0x3D65 */
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} hwcrypto_crc_mode;
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struct hwcrypto_crc_cfg
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{
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rt_uint32_t last_val; /**< Last CRC value cache */
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rt_uint32_t poly; /**< CRC polynomial */
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rt_uint16_t width; /**< CRC value width */
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rt_uint32_t xorout; /**< Result XOR Value */
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rt_uint16_t flags; /**< Input or output data reverse. CRC_FLAG_REFIN or CRC_FLAG_REFOUT */
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};
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struct hwcrypto_crc_ops
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{
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rt_uint32_t (*update)(struct hwcrypto_crc *ctx,
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const rt_uint8_t *in, rt_size_t length); /**< Perform a CRC calculation. return CRC value */
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};
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/**
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* @brief CRC context. Hardware driver usage
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*/
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struct hwcrypto_crc
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{
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struct rt_hwcrypto_ctx parent; /**< Inherited from the standard device */
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struct hwcrypto_crc_cfg crc_cfg; /**< CRC configure */
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const struct hwcrypto_crc_ops *ops; /**< !! Hardware initializes this value when creating context !! */
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};
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/**
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* @brief Creating CRC Context
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*
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* @param device Hardware crypto device
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* @param mode Setting default mode or custom mode
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*
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* @return CRC context
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*/
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struct rt_hwcrypto_ctx *rt_hwcrypto_crc_create(struct rt_hwcrypto_device *device,
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hwcrypto_crc_mode mode);
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/**
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* @brief Destroy CRC Context
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*
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* @param ctx CRC context
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*/
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void rt_hwcrypto_crc_destroy(struct rt_hwcrypto_ctx *ctx);
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/**
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* @brief Processing a packet of data
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*
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* @param ctx CRC context
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* @param input Data buffer to be Processed
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* @param length Data Buffer length
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*
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* @return CRC value
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*/
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rt_uint32_t rt_hwcrypto_crc_update(struct rt_hwcrypto_ctx *ctx,
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const rt_uint8_t *input, rt_size_t length);
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/**
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* @brief CRC context configuration
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*
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* @param ctx CRC context
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* @param cfg CRC config
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*/
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void rt_hwcrypto_crc_cfg(struct rt_hwcrypto_ctx *ctx,
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struct hwcrypto_crc_cfg *cfg);
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#ifdef __cplusplus
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}
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#endif
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#endif
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