804 lines
27 KiB
C
804 lines
27 KiB
C
/*!
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\file gd32f4xx_sdio.c
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\brief SDIO driver
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\version 2016-08-15, V1.0.0, firmware for GD32F4xx
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\version 2018-12-12, V2.0.1, firmware for GD32F4xx
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\version 2020-09-30, V2.1.0, firmware for GD32F4xx
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*/
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/*
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Copyright (c) 2020, GigaDevice Semiconductor Inc.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice, this
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list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3. Neither the name of the copyright holder nor the names of its contributors
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may be used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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OF SUCH DAMAGE.
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*/
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#include "gd32f4xx_sdio.h"
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/*!
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\brief deinitialize the SDIO
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\param[in] none
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\param[out] none
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\retval none
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*/
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void sdio_deinit(void)
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{
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rcu_periph_reset_enable(RCU_SDIORST);
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rcu_periph_reset_disable(RCU_SDIORST);
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}
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/*!
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\brief configure the SDIO clock
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\param[in] clock_edge: SDIO_CLK clock edge
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only one parameter can be selected which is shown as below:
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\arg SDIO_SDIOCLKEDGE_RISING: select the rising edge of the SDIOCLK to generate SDIO_CLK
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\arg SDIO_SDIOCLKEDGE_FALLING: select the falling edge of the SDIOCLK to generate SDIO_CLK
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\param[in] clock_bypass: clock bypass
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only one parameter can be selected which is shown as below:
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\arg SDIO_CLOCKBYPASS_ENABLE: clock bypass
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\arg SDIO_CLOCKBYPASS_DISABLE: no bypass
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\param[in] clock_powersave: SDIO_CLK clock dynamic switch on/off for power saving
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only one parameter can be selected which is shown as below:
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\arg SDIO_CLOCKPWRSAVE_ENABLE: SDIO_CLK closed when bus is idle
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\arg SDIO_CLOCKPWRSAVE_DISABLE: SDIO_CLK clock is always on
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\param[in] clock_division: clock division, less than 512
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\param[out] none
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\retval none
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*/
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void sdio_clock_config(uint32_t clock_edge, uint32_t clock_bypass, uint32_t clock_powersave, uint16_t clock_division)
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{
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uint32_t clock_config = 0U;
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clock_config = SDIO_CLKCTL;
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/* reset the CLKEDGE, CLKBYP, CLKPWRSAV, DIV */
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clock_config &= ~(SDIO_CLKCTL_CLKEDGE | SDIO_CLKCTL_CLKBYP | SDIO_CLKCTL_CLKPWRSAV | SDIO_CLKCTL_DIV8 | SDIO_CLKCTL_DIV);
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/* if the clock division is greater or equal to 256, set the DIV[8] */
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if(clock_division >= 256U){
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clock_config |= SDIO_CLKCTL_DIV8;
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clock_division -= 256U;
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}
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/* configure the SDIO_CLKCTL according to the parameters */
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clock_config |= (clock_edge | clock_bypass | clock_powersave | clock_division);
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SDIO_CLKCTL = clock_config;
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}
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/*!
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\brief enable hardware clock control
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\param[in] none
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\param[out] none
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\retval none
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*/
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void sdio_hardware_clock_enable(void)
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{
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SDIO_CLKCTL |= SDIO_CLKCTL_HWCLKEN;
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}
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/*!
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\brief disable hardware clock control
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\param[in] none
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\param[out] none
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\retval none
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*/
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void sdio_hardware_clock_disable(void)
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{
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SDIO_CLKCTL &= ~SDIO_CLKCTL_HWCLKEN;
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}
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/*!
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\brief set different SDIO card bus mode
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\param[in] bus_mode: SDIO card bus mode
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only one parameter can be selected which is shown as below:
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\arg SDIO_BUSMODE_1BIT: 1-bit SDIO card bus mode
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\arg SDIO_BUSMODE_4BIT: 4-bit SDIO card bus mode
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\arg SDIO_BUSMODE_8BIT: 8-bit SDIO card bus mode
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\param[out] none
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\retval none
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*/
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void sdio_bus_mode_set(uint32_t bus_mode)
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{
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/* reset the SDIO card bus mode bits and set according to bus_mode */
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SDIO_CLKCTL &= ~SDIO_CLKCTL_BUSMODE;
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SDIO_CLKCTL |= bus_mode;
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}
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/*!
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\brief set the SDIO power state
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\param[in] power_state: SDIO power state
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only one parameter can be selected which is shown as below:
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\arg SDIO_POWER_ON: SDIO power on
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\arg SDIO_POWER_OFF: SDIO power off
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\param[out] none
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\retval none
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*/
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void sdio_power_state_set(uint32_t power_state)
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{
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SDIO_PWRCTL = power_state;
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}
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/*!
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\brief get the SDIO power state
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\param[in] none
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\param[out] none
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\retval SDIO power state
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\arg SDIO_POWER_ON: SDIO power on
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\arg SDIO_POWER_OFF: SDIO power off
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*/
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uint32_t sdio_power_state_get(void)
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{
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return SDIO_PWRCTL;
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}
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/*!
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\brief enable SDIO_CLK clock output
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\param[in] none
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\param[out] none
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\retval none
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*/
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void sdio_clock_enable(void)
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{
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SDIO_CLKCTL |= SDIO_CLKCTL_CLKEN;
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}
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/*!
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\brief disable SDIO_CLK clock output
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\param[in] none
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\param[out] none
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\retval none
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*/
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void sdio_clock_disable(void)
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{
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SDIO_CLKCTL &= ~SDIO_CLKCTL_CLKEN;
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}
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/*!
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\brief configure the command and response
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\param[in] cmd_index: command index, refer to the related specifications
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\param[in] cmd_argument: command argument, refer to the related specifications
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\param[in] response_type: response type
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only one parameter can be selected which is shown as below:
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\arg SDIO_RESPONSETYPE_NO: no response
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\arg SDIO_RESPONSETYPE_SHORT: short response
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\arg SDIO_RESPONSETYPE_LONG: long response
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\param[out] none
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\retval none
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*/
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void sdio_command_response_config(uint32_t cmd_index, uint32_t cmd_argument, uint32_t response_type)
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{
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uint32_t cmd_config = 0U;
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/* disable the CSM */
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SDIO_CMDCTL &= ~SDIO_CMDCTL_CSMEN;
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/* reset the command index, command argument and response type */
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SDIO_CMDAGMT &= ~SDIO_CMDAGMT_CMDAGMT;
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SDIO_CMDAGMT = cmd_argument;
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cmd_config = SDIO_CMDCTL;
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cmd_config &= ~(SDIO_CMDCTL_CMDIDX | SDIO_CMDCTL_CMDRESP);
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/* configure SDIO_CMDCTL and SDIO_CMDAGMT according to the parameters */
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cmd_config |= (cmd_index | response_type);
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SDIO_CMDCTL = cmd_config;
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}
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/*!
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\brief set the command state machine wait type
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\param[in] wait_type: wait type
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only one parameter can be selected which is shown as below:
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\arg SDIO_WAITTYPE_NO: not wait interrupt
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\arg SDIO_WAITTYPE_INTERRUPT: wait interrupt
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\arg SDIO_WAITTYPE_DATAEND: wait the end of data transfer
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\param[out] none
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\retval none
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*/
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void sdio_wait_type_set(uint32_t wait_type)
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{
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/* reset INTWAIT and WAITDEND */
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SDIO_CMDCTL &= ~(SDIO_CMDCTL_INTWAIT | SDIO_CMDCTL_WAITDEND);
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/* set the wait type according to wait_type */
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SDIO_CMDCTL |= wait_type;
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}
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/*!
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\brief enable the CSM(command state machine)
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\param[in] none
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\param[out] none
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\retval none
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*/
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void sdio_csm_enable(void)
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{
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SDIO_CMDCTL |= SDIO_CMDCTL_CSMEN;
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}
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/*!
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\brief disable the CSM(command state machine)
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\param[in] none
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\param[out] none
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\retval none
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*/
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void sdio_csm_disable(void)
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{
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SDIO_CMDCTL &= ~SDIO_CMDCTL_CSMEN;
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}
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/*!
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\brief get the last response command index
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\param[in] none
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\param[out] none
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\retval last response command index
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*/
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uint8_t sdio_command_index_get(void)
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{
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return (uint8_t)SDIO_RSPCMDIDX;
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}
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/*!
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\brief get the response for the last received command
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\param[in] sdio_responsex: SDIO response
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only one parameter can be selected which is shown as below:
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\arg SDIO_RESPONSE0: card response[31:0]/card response[127:96]
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\arg SDIO_RESPONSE1: card response[95:64]
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\arg SDIO_RESPONSE2: card response[63:32]
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\arg SDIO_RESPONSE3: card response[31:1], plus bit 0
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\param[out] none
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\retval response for the last received command
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*/
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uint32_t sdio_response_get(uint32_t sdio_responsex)
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{
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uint32_t resp_content = 0U;
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switch(sdio_responsex){
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case SDIO_RESPONSE0:
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resp_content = SDIO_RESP0;
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break;
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case SDIO_RESPONSE1:
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resp_content = SDIO_RESP1;
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break;
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case SDIO_RESPONSE2:
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resp_content = SDIO_RESP2;
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break;
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case SDIO_RESPONSE3:
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resp_content = SDIO_RESP3;
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break;
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default:
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break;
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}
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return resp_content;
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}
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/*!
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\brief configure the data timeout, data length and data block size
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\param[in] data_timeout: data timeout period in card bus clock periods
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\param[in] data_length: number of data bytes to be transferred
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\param[in] data_blocksize: size of data block for block transfer
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only one parameter can be selected which is shown as below:
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\arg SDIO_DATABLOCKSIZE_1BYTE: block size = 1 byte
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\arg SDIO_DATABLOCKSIZE_2BYTES: block size = 2 bytes
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\arg SDIO_DATABLOCKSIZE_4BYTES: block size = 4 bytes
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\arg SDIO_DATABLOCKSIZE_8BYTES: block size = 8 bytes
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\arg SDIO_DATABLOCKSIZE_16BYTES: block size = 16 bytes
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\arg SDIO_DATABLOCKSIZE_32BYTES: block size = 32 bytes
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\arg SDIO_DATABLOCKSIZE_64BYTES: block size = 64 bytes
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\arg SDIO_DATABLOCKSIZE_128BYTES: block size = 128 bytes
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\arg SDIO_DATABLOCKSIZE_256BYTES: block size = 256 bytes
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\arg SDIO_DATABLOCKSIZE_512BYTES: block size = 512 bytes
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\arg SDIO_DATABLOCKSIZE_1024BYTES: block size = 1024 bytes
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\arg SDIO_DATABLOCKSIZE_2048BYTES: block size = 2048 bytes
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\arg SDIO_DATABLOCKSIZE_4096BYTES: block size = 4096 bytes
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\arg SDIO_DATABLOCKSIZE_8192BYTES: block size = 8192 bytes
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\arg SDIO_DATABLOCKSIZE_16384BYTES: block size = 16384 bytes
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\param[out] none
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\retval none
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*/
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void sdio_data_config(uint32_t data_timeout, uint32_t data_length, uint32_t data_blocksize)
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{
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/* reset data timeout, data length and data block size */
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SDIO_DATATO &= ~SDIO_DATATO_DATATO;
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SDIO_DATALEN &= ~SDIO_DATALEN_DATALEN;
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SDIO_DATACTL &= ~SDIO_DATACTL_BLKSZ;
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/* configure the related parameters of data */
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SDIO_DATATO = data_timeout;
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SDIO_DATALEN = data_length;
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SDIO_DATACTL |= data_blocksize;
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}
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/*!
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\brief configure the data transfer mode and direction
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\param[in] transfer_mode: mode of data transfer
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only one parameter can be selected which is shown as below:
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\arg SDIO_TRANSMODE_BLOCK: block transfer
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\arg SDIO_TRANSMODE_STREAM: stream transfer or SDIO multibyte transfer
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\param[in] transfer_direction: data transfer direction, read or write
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only one parameter can be selected which is shown as below:
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\arg SDIO_TRANSDIRECTION_TOCARD: write data to card
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\arg SDIO_TRANSDIRECTION_TOSDIO: read data from card
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\param[out] none
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\retval none
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*/
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void sdio_data_transfer_config(uint32_t transfer_mode, uint32_t transfer_direction)
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{
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uint32_t data_trans = 0U;
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/* reset the data transfer mode, transfer direction and set according to the parameters */
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data_trans = SDIO_DATACTL;
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data_trans &= ~(SDIO_DATACTL_TRANSMOD | SDIO_DATACTL_DATADIR);
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data_trans |= (transfer_mode | transfer_direction);
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SDIO_DATACTL = data_trans;
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}
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/*!
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\brief enable the DSM(data state machine) for data transfer
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\param[in] none
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\param[out] none
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\retval none
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*/
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void sdio_dsm_enable(void)
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{
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SDIO_DATACTL |= SDIO_DATACTL_DATAEN;
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}
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/*!
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\brief disable the DSM(data state machine)
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\param[in] none
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\param[out] none
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\retval none
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*/
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void sdio_dsm_disable(void)
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{
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SDIO_DATACTL &= ~SDIO_DATACTL_DATAEN;
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}
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/*!
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\brief write data(one word) to the transmit FIFO
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\param[in] data: 32-bit data write to card
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\param[out] none
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\retval none
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*/
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void sdio_data_write(uint32_t data)
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{
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SDIO_FIFO = data;
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}
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/*!
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\brief read data(one word) from the receive FIFO
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\param[in] none
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\param[out] none
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\retval received data
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*/
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uint32_t sdio_data_read(void)
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{
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return SDIO_FIFO;
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}
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/*!
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\brief get the number of remaining data bytes to be transferred to card
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\param[in] none
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\param[out] none
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\retval number of remaining data bytes to be transferred
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*/
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uint32_t sdio_data_counter_get(void)
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{
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return SDIO_DATACNT;
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}
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/*!
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\brief get the number of words remaining to be written or read from FIFO
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\param[in] none
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\param[out] none
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\retval remaining number of words
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*/
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uint32_t sdio_fifo_counter_get(void)
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{
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return SDIO_FIFOCNT;
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}
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/*!
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\brief enable the DMA request for SDIO
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\param[in] none
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\param[out] none
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\retval none
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*/
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void sdio_dma_enable(void)
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{
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SDIO_DATACTL |= SDIO_DATACTL_DMAEN;
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}
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/*!
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\brief disable the DMA request for SDIO
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\param[in] none
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\param[out] none
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\retval none
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*/
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void sdio_dma_disable(void)
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{
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SDIO_DATACTL &= ~SDIO_DATACTL_DMAEN;
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}
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/*!
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\brief get the flags state of SDIO
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\param[in] flag: flags state of SDIO
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one or more parameters can be selected which are shown as below:
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\arg SDIO_FLAG_CCRCERR: command response received (CRC check failed) flag
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\arg SDIO_FLAG_DTCRCERR: data block sent/received (CRC check failed) flag
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\arg SDIO_FLAG_CMDTMOUT: command response timeout flag
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\arg SDIO_FLAG_DTTMOUT: data timeout flag
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\arg SDIO_FLAG_TXURE: transmit FIFO underrun error occurs flag
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\arg SDIO_FLAG_RXORE: received FIFO overrun error occurs flag
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\arg SDIO_FLAG_CMDRECV: command response received (CRC check passed) flag
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\arg SDIO_FLAG_CMDSEND: command sent (no response required) flag
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\arg SDIO_FLAG_DTEND: data end (data counter, SDIO_DATACNT, is zero) flag
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\arg SDIO_FLAG_STBITE: start bit error in the bus flag
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\arg SDIO_FLAG_DTBLKEND: data block sent/received (CRC check passed) flag
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\arg SDIO_FLAG_CMDRUN: command transmission in progress flag
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\arg SDIO_FLAG_TXRUN: data transmission in progress flag
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\arg SDIO_FLAG_RXRUN: data reception in progress flag
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\arg SDIO_FLAG_TFH: transmit FIFO is half empty flag: at least 8 words can be written into the FIFO
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\arg SDIO_FLAG_RFH: receive FIFO is half full flag: at least 8 words can be read in the FIFO
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\arg SDIO_FLAG_TFF: transmit FIFO is full flag
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\arg SDIO_FLAG_RFF: receive FIFO is full flag
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\arg SDIO_FLAG_TFE: transmit FIFO is empty flag
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\arg SDIO_FLAG_RFE: receive FIFO is empty flag
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\arg SDIO_FLAG_TXDTVAL: data is valid in transmit FIFO flag
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\arg SDIO_FLAG_RXDTVAL: data is valid in receive FIFO flag
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\arg SDIO_FLAG_SDIOINT: SD I/O interrupt received flag
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\arg SDIO_FLAG_ATAEND: CE-ATA command completion signal received (only for CMD61) flag
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\param[out] none
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\retval FlagStatus: SET or RESET
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*/
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FlagStatus sdio_flag_get(uint32_t flag)
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{
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FlagStatus temp_flag = RESET;
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if(RESET != (SDIO_STAT & flag)){
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temp_flag = SET;
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}
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return temp_flag;
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}
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/*!
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\brief clear the pending flags of SDIO
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\param[in] flag: flags state of SDIO
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one or more parameters can be selected which are shown as below:
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\arg SDIO_FLAG_CCRCERR: command response received (CRC check failed) flag
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\arg SDIO_FLAG_DTCRCERR: data block sent/received (CRC check failed) flag
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\arg SDIO_FLAG_CMDTMOUT: command response timeout flag
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\arg SDIO_FLAG_DTTMOUT: data timeout flag
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\arg SDIO_FLAG_TXURE: transmit FIFO underrun error occurs flag
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\arg SDIO_FLAG_RXORE: received FIFO overrun error occurs flag
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\arg SDIO_FLAG_CMDRECV: command response received (CRC check passed) flag
|
|
\arg SDIO_FLAG_CMDSEND: command sent (no response required) flag
|
|
\arg SDIO_FLAG_DTEND: data end (data counter, SDIO_DATACNT, is zero) flag
|
|
\arg SDIO_FLAG_STBITE: start bit error in the bus flag
|
|
\arg SDIO_FLAG_DTBLKEND: data block sent/received (CRC check passed) flag
|
|
\arg SDIO_FLAG_SDIOINT: SD I/O interrupt received flag
|
|
\arg SDIO_FLAG_ATAEND: CE-ATA command completion signal received (only for CMD61) flag
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void sdio_flag_clear(uint32_t flag)
|
|
{
|
|
SDIO_INTC = flag;
|
|
}
|
|
|
|
/*!
|
|
\brief enable the SDIO interrupt
|
|
\param[in] int_flag: interrupt flags state of SDIO
|
|
one or more parameters can be selected which are shown as below:
|
|
\arg SDIO_INT_CCRCERR: SDIO CCRCERR interrupt
|
|
\arg SDIO_INT_DTCRCERR: SDIO DTCRCERR interrupt
|
|
\arg SDIO_INT_CMDTMOUT: SDIO CMDTMOUT interrupt
|
|
\arg SDIO_INT_DTTMOUT: SDIO DTTMOUT interrupt
|
|
\arg SDIO_INT_TXURE: SDIO TXURE interrupt
|
|
\arg SDIO_INT_RXORE: SDIO RXORE interrupt
|
|
\arg SDIO_INT_CMDRECV: SDIO CMDRECV interrupt
|
|
\arg SDIO_INT_CMDSEND: SDIO CMDSEND interrupt
|
|
\arg SDIO_INT_DTEND: SDIO DTEND interrupt
|
|
\arg SDIO_INT_STBITE: SDIO STBITE interrupt
|
|
\arg SDIO_INT_DTBLKEND: SDIO DTBLKEND interrupt
|
|
\arg SDIO_INT_CMDRUN: SDIO CMDRUN interrupt
|
|
\arg SDIO_INT_TXRUN: SDIO TXRUN interrupt
|
|
\arg SDIO_INT_RXRUN: SDIO RXRUN interrupt
|
|
\arg SDIO_INT_TFH: SDIO TFH interrupt
|
|
\arg SDIO_INT_RFH: SDIO RFH interrupt
|
|
\arg SDIO_INT_TFF: SDIO TFF interrupt
|
|
\arg SDIO_INT_RFF: SDIO RFF interrupt
|
|
\arg SDIO_INT_TFE: SDIO TFE interrupt
|
|
\arg SDIO_INT_RFE: SDIO RFE interrupt
|
|
\arg SDIO_INT_TXDTVAL: SDIO TXDTVAL interrupt
|
|
\arg SDIO_INT_RXDTVAL: SDIO RXDTVAL interrupt
|
|
\arg SDIO_INT_SDIOINT: SDIO SDIOINT interrupt
|
|
\arg SDIO_INT_ATAEND: SDIO ATAEND interrupt
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void sdio_interrupt_enable(uint32_t int_flag)
|
|
{
|
|
SDIO_INTEN |= int_flag;
|
|
}
|
|
|
|
/*!
|
|
\brief disable the SDIO interrupt
|
|
\param[in] int_flag: interrupt flags state of SDIO
|
|
one or more parameters can be selected which are shown as below:
|
|
\arg SDIO_INT_CCRCERR: SDIO CCRCERR interrupt
|
|
\arg SDIO_INT_DTCRCERR: SDIO DTCRCERR interrupt
|
|
\arg SDIO_INT_CMDTMOUT: SDIO CMDTMOUT interrupt
|
|
\arg SDIO_INT_DTTMOUT: SDIO DTTMOUT interrupt
|
|
\arg SDIO_INT_TXURE: SDIO TXURE interrupt
|
|
\arg SDIO_INT_RXORE: SDIO RXORE interrupt
|
|
\arg SDIO_INT_CMDRECV: SDIO CMDRECV interrupt
|
|
\arg SDIO_INT_CMDSEND: SDIO CMDSEND interrupt
|
|
\arg SDIO_INT_DTEND: SDIO DTEND interrupt
|
|
\arg SDIO_INT_STBITE: SDIO STBITE interrupt
|
|
\arg SDIO_INT_DTBLKEND: SDIO DTBLKEND interrupt
|
|
\arg SDIO_INT_CMDRUN: SDIO CMDRUN interrupt
|
|
\arg SDIO_INT_TXRUN: SDIO TXRUN interrupt
|
|
\arg SDIO_INT_RXRUN: SDIO RXRUN interrupt
|
|
\arg SDIO_INT_TFH: SDIO TFH interrupt
|
|
\arg SDIO_INT_RFH: SDIO RFH interrupt
|
|
\arg SDIO_INT_TFF: SDIO TFF interrupt
|
|
\arg SDIO_INT_RFF: SDIO RFF interrupt
|
|
\arg SDIO_INT_TFE: SDIO TFE interrupt
|
|
\arg SDIO_INT_RFE: SDIO RFE interrupt
|
|
\arg SDIO_INT_TXDTVAL: SDIO TXDTVAL interrupt
|
|
\arg SDIO_INT_RXDTVAL: SDIO RXDTVAL interrupt
|
|
\arg SDIO_INT_SDIOINT: SDIO SDIOINT interrupt
|
|
\arg SDIO_INT_ATAEND: SDIO ATAEND interrupt
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void sdio_interrupt_disable(uint32_t int_flag)
|
|
{
|
|
SDIO_INTEN &= ~int_flag;
|
|
}
|
|
|
|
/*!
|
|
\brief get the interrupt flags state of SDIO
|
|
\param[in] int_flag: interrupt flags state of SDIO
|
|
one or more parameters can be selected which are shown as below:
|
|
\arg SDIO_INT_FLAG_CCRCERR: SDIO CCRCERR interrupt flag
|
|
\arg SDIO_INT_FLAG_DTCRCERR: SDIO DTCRCERR interrupt flag
|
|
\arg SDIO_INT_FLAG_CMDTMOUT: SDIO CMDTMOUT interrupt flag
|
|
\arg SDIO_INT_FLAG_DTTMOUT: SDIO DTTMOUT interrupt flag
|
|
\arg SDIO_INT_FLAG_TXURE: SDIO TXURE interrupt flag
|
|
\arg SDIO_INT_FLAG_RXORE: SDIO RXORE interrupt flag
|
|
\arg SDIO_INT_FLAG_CMDRECV: SDIO CMDRECV interrupt flag
|
|
\arg SDIO_INT_FLAG_CMDSEND: SDIO CMDSEND interrupt flag
|
|
\arg SDIO_INT_FLAG_DTEND: SDIO DTEND interrupt flag
|
|
\arg SDIO_INT_FLAG_STBITE: SDIO STBITE interrupt flag
|
|
\arg SDIO_INT_FLAG_DTBLKEND: SDIO DTBLKEND interrupt flag
|
|
\arg SDIO_INT_FLAG_CMDRUN: SDIO CMDRUN interrupt flag
|
|
\arg SDIO_INT_FLAG_TXRUN: SDIO TXRUN interrupt flag
|
|
\arg SDIO_INT_FLAG_RXRUN: SDIO RXRUN interrupt flag
|
|
\arg SDIO_INT_FLAG_TFH: SDIO TFH interrupt flag
|
|
\arg SDIO_INT_FLAG_RFH: SDIO RFH interrupt flag
|
|
\arg SDIO_INT_FLAG_TFF: SDIO TFF interrupt flag
|
|
\arg SDIO_INT_FLAG_RFF: SDIO RFF interrupt flag
|
|
\arg SDIO_INT_FLAG_TFE: SDIO TFE interrupt flag
|
|
\arg SDIO_INT_FLAG_RFE: SDIO RFE interrupt flag
|
|
\arg SDIO_INT_FLAG_TXDTVAL: SDIO TXDTVAL interrupt flag
|
|
\arg SDIO_INT_FLAG_RXDTVAL: SDIO RXDTVAL interrupt flag
|
|
\arg SDIO_INT_FLAG_SDIOINT: SDIO SDIOINT interrupt flag
|
|
\arg SDIO_INT_FLAG_ATAEND: SDIO ATAEND interrupt flag
|
|
\param[out] none
|
|
\retval FlagStatus: SET or RESET
|
|
*/
|
|
FlagStatus sdio_interrupt_flag_get(uint32_t int_flag)
|
|
{
|
|
FlagStatus temp_flag = RESET;
|
|
if(RESET != (SDIO_STAT & int_flag)){
|
|
temp_flag = SET;
|
|
}
|
|
return temp_flag;
|
|
}
|
|
|
|
/*!
|
|
\brief clear the interrupt pending flags of SDIO
|
|
\param[in] int_flag: interrupt flags state of SDIO
|
|
one or more parameters can be selected which are shown as below:
|
|
\arg SDIO_INT_FLAG_CCRCERR: command response received (CRC check failed) flag
|
|
\arg SDIO_INT_FLAG_DTCRCERR: data block sent/received (CRC check failed) flag
|
|
\arg SDIO_INT_FLAG_CMDTMOUT: command response timeout flag
|
|
\arg SDIO_INT_FLAG_DTTMOUT: data timeout flag
|
|
\arg SDIO_INT_FLAG_TXURE: transmit FIFO underrun error occurs flag
|
|
\arg SDIO_INT_FLAG_RXORE: received FIFO overrun error occurs flag
|
|
\arg SDIO_INT_FLAG_CMDRECV: command response received (CRC check passed) flag
|
|
\arg SDIO_INT_FLAG_CMDSEND: command sent (no response required) flag
|
|
\arg SDIO_INT_FLAG_DTEND: data end (data counter, SDIO_DATACNT, is zero) flag
|
|
\arg SDIO_INT_FLAG_STBITE: start bit error in the bus flag
|
|
\arg SDIO_INT_FLAG_DTBLKEND: data block sent/received (CRC check passed) flag
|
|
\arg SDIO_INT_FLAG_SDIOINT: SD I/O interrupt received flag
|
|
\arg SDIO_INT_FLAG_ATAEND: CE-ATA command completion signal received (only for CMD61) flag
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void sdio_interrupt_flag_clear(uint32_t int_flag)
|
|
{
|
|
SDIO_INTC = int_flag;
|
|
}
|
|
|
|
/*!
|
|
\brief enable the read wait mode(SD I/O only)
|
|
\param[in] none
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void sdio_readwait_enable(void)
|
|
{
|
|
SDIO_DATACTL |= SDIO_DATACTL_RWEN;
|
|
}
|
|
|
|
/*!
|
|
\brief disable the read wait mode(SD I/O only)
|
|
\param[in] none
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void sdio_readwait_disable(void)
|
|
{
|
|
SDIO_DATACTL &= ~SDIO_DATACTL_RWEN;
|
|
}
|
|
|
|
/*!
|
|
\brief enable the function that stop the read wait process(SD I/O only)
|
|
\param[in] none
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void sdio_stop_readwait_enable(void)
|
|
{
|
|
SDIO_DATACTL |= SDIO_DATACTL_RWSTOP;
|
|
}
|
|
|
|
/*!
|
|
\brief disable the function that stop the read wait process(SD I/O only)
|
|
\param[in] none
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void sdio_stop_readwait_disable(void)
|
|
{
|
|
SDIO_DATACTL &= ~SDIO_DATACTL_RWSTOP;
|
|
}
|
|
|
|
/*!
|
|
\brief set the read wait type(SD I/O only)
|
|
\param[in] readwait_type: SD I/O read wait type
|
|
only one parameter can be selected which is shown as below:
|
|
\arg SDIO_READWAITTYPE_CLK: read wait control by stopping SDIO_CLK
|
|
\arg SDIO_READWAITTYPE_DAT2: read wait control using SDIO_DAT[2]
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void sdio_readwait_type_set(uint32_t readwait_type)
|
|
{
|
|
if(SDIO_READWAITTYPE_CLK == readwait_type){
|
|
SDIO_DATACTL |= SDIO_DATACTL_RWTYPE;
|
|
}else{
|
|
SDIO_DATACTL &= ~SDIO_DATACTL_RWTYPE;
|
|
}
|
|
}
|
|
|
|
/*!
|
|
\brief enable the SD I/O mode specific operation(SD I/O only)
|
|
\param[in] none
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void sdio_operation_enable(void)
|
|
{
|
|
SDIO_DATACTL |= SDIO_DATACTL_IOEN;
|
|
}
|
|
|
|
/*!
|
|
\brief disable the SD I/O mode specific operation(SD I/O only)
|
|
\param[in] none
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void sdio_operation_disable(void)
|
|
{
|
|
SDIO_DATACTL &= ~SDIO_DATACTL_IOEN;
|
|
}
|
|
|
|
/*!
|
|
\brief enable the SD I/O suspend operation(SD I/O only)
|
|
\param[in] none
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void sdio_suspend_enable(void)
|
|
{
|
|
SDIO_CMDCTL |= SDIO_CMDCTL_SUSPEND;
|
|
}
|
|
|
|
/*!
|
|
\brief disable the SD I/O suspend operation(SD I/O only)
|
|
\param[in] none
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void sdio_suspend_disable(void)
|
|
{
|
|
SDIO_CMDCTL &= ~SDIO_CMDCTL_SUSPEND;
|
|
}
|
|
|
|
/*!
|
|
\brief enable the CE-ATA command(CE-ATA only)
|
|
\param[in] none
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void sdio_ceata_command_enable(void)
|
|
{
|
|
SDIO_CMDCTL |= SDIO_CMDCTL_ATAEN;
|
|
}
|
|
|
|
/*!
|
|
\brief disable the CE-ATA command(CE-ATA only)
|
|
\param[in] none
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void sdio_ceata_command_disable(void)
|
|
{
|
|
SDIO_CMDCTL &= ~SDIO_CMDCTL_ATAEN;
|
|
}
|
|
|
|
/*!
|
|
\brief enable the CE-ATA interrupt(CE-ATA only)
|
|
\param[in] none
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void sdio_ceata_interrupt_enable(void)
|
|
{
|
|
SDIO_CMDCTL &= ~SDIO_CMDCTL_NINTEN;
|
|
}
|
|
|
|
/*!
|
|
\brief disable the CE-ATA interrupt(CE-ATA only)
|
|
\param[in] none
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void sdio_ceata_interrupt_disable(void)
|
|
{
|
|
SDIO_CMDCTL |= SDIO_CMDCTL_NINTEN;
|
|
}
|
|
|
|
/*!
|
|
\brief enable the CE-ATA command completion signal(CE-ATA only)
|
|
\param[in] none
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void sdio_ceata_command_completion_enable(void)
|
|
{
|
|
SDIO_CMDCTL |= SDIO_CMDCTL_ENCMDC;
|
|
}
|
|
|
|
/*!
|
|
\brief disable the CE-ATA command completion signal(CE-ATA only)
|
|
\param[in] none
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void sdio_ceata_command_completion_disable(void)
|
|
{
|
|
SDIO_CMDCTL &= ~SDIO_CMDCTL_ENCMDC;
|
|
}
|