245 lines
6.2 KiB
ArmAsm
245 lines
6.2 KiB
ArmAsm
/*
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* File : startup.S
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Change Logs:
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* Date Author Notes
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* 2017-01-01 Urey first version
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*/
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#undef VIC_TSPR
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#define VIC_TSPR 0xE000EC10
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#ifndef CONFIG_SEPARATE_IRQ_SP
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#define CONFIG_SEPARATE_IRQ_SP 1
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#endif
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#ifndef CONFIG_ARCH_INTERRUPTSTACK
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#define CONFIG_ARCH_INTERRUPTSTACK 1024
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#endif
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.import SysTick_Handler
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.import PendSV_Handler
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.section .vectors
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.align 10
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.globl __Vectors
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.type __Vectors, @object
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__Vectors:
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.long Reset_Handler /* 0: Reset Handler */
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.rept 15
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.long Default_Handler /* 60 0x40 */
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.endr /* 64 0x40 */
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.long Default_Handler /* 64 0x44 */
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.rept 5
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.long Default_Handler /* 88 0x58 */
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.endr /* 92 0x5C */
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.long PendSV_Handler /* 92 0x5C */
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.rept 9
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.long Default_Handler /* 128 0x80 */
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.endr
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/* External interrupts */
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.long GPIOA_IRQHandler /* 32# 0: GPIOA */ /*128 0x80 */
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.long SysTick_Handler /* 1: System Tick */
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.long TIMA0_IRQHandler /* 2: TimerA0 */
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.long TIMA1_IRQHandler /* 3: TimerA1 */
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.long Default_Handler
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.long WDT_IRQHandler /* 5: WDT */
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.long USART0_IRQHandler /* 6: UART0 */
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.long USART1_IRQHandler /* 0x27 39 7: UART1 */
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.long USART2_IRQHandler /* 8: UART2 */
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.long I2C0_IRQHandler /* 9: I2C0 */
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.long I2C1_IRQHandler /* 10: I2C1 */
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.long SPI1_IRQHandler /* 11: SPI1 */
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.long SPI0_IRQHandler /* 12: SPI0 */
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.long RTC_IRQHandler /* 13: RTC */
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.long Default_Handler
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.long Default_Handler
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.long Default_Handler
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.long DMAC_IRQHandler /* 17: DMAC */
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.long Default_Handler
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.long PWM_IRQHandler /* 19: PWM */
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.long Default_Handler
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.long USART3_IRQHandler /* 21: UART3 */
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.long Default_Handler
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.long TIMB0_IRQHandler /* 23: TimerB0 */
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.long TIMB1_IRQHandler /* 24: TimerB1 */
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.long Default_Handler
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.long AES_IRQHandler /* 26: AES */
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.long GPIOB_IRQHandler /* 27: GPIOB */
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.long Default_Handler
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.long SHA_IRQHandler /* 29: SHA */
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.size __Vectors, . - __Vectors
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.text
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.align 1
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_start:
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.text
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.align 1
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.globl Reset_Handler
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.type Reset_Handler, %function
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Reset_Handler:
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/* under normal circumstances, it should not be opened */
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#ifndef CONFIG_SYSTEM_SECURE
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lrw r0, 0x80000000
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mtcr r0, psr
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#endif
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/* Initialize the normal stack pointer from the linker definition. */
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lrw a1, __StackTop
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mov sp, a1
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/*
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* The ranges of copy from/to are specified by following symbols
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* __etext: LMA of start of the section to copy from. Usually end of text
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* __data_start__: VMA of start of the section to copy to
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* __data_end__: VMA of end of the section to copy to
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*
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* All addresses must be aligned to 4 bytes boundary.
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*/
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lrw r1, __erodata
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lrw r2, __data_start__
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lrw r3, __data_end__
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subu r3, r2
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cmpnei r3, 0
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bf .L_loop0_done
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.L_loop0:
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ldw r0, (r1, 0)
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stw r0, (r2, 0)
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addi r1, 4
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addi r2, 4
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subi r3, 4
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cmpnei r3, 0
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bt .L_loop0
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.L_loop0_done:
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/*
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* The BSS section is specified by following symbols
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* __bss_start__: start of the BSS section.
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* __bss_end__: end of the BSS section.
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*
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* Both addresses must be aligned to 4 bytes boundary.
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*/
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lrw r1, __bss_start__
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lrw r2, __bss_end__
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movi r0, 0
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subu r2, r1
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cmpnei r2, 0
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bf .L_loop1_done
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.L_loop1:
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stw r0, (r1, 0)
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addi r1, 4
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subi r2, 4
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cmpnei r2, 0
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bt .L_loop1
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.L_loop1_done:
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#ifdef CONFIG_SEPARATE_IRQ_SP
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lrw r0, g_top_irqstack
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mtcr r0, cr<15, 1>
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mfcr r0, cr<31, 0>
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bseti r0, 14
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mtcr r0, cr<31, 0>
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#endif
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#ifndef __NO_SYSTEM_INIT
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bsr SystemInit
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#endif
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//#ifndef __NO_BOARD_INIT
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// bsr board_init
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//#endif
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//VIC init...
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lrw r0, VIC_TSPR
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movi r1, 0xb00
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stw r1, (r0)
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bsr entry
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__exit:
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bkpt
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.size Reset_Handler, . - Reset_Handler
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.align 1
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.weak Default_Handler
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.type Default_Handler, %function
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Default_Handler:
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br Default_Handler
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.size Default_Handler, . - Default_Handler
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.section .bss
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.align 2
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.globl g_intstackalloc
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.global g_intstackbase
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.global g_top_irqstack
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g_intstackalloc:
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g_intstackbase:
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.space CONFIG_ARCH_INTERRUPTSTACK
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g_top_irqstack:
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/* Macro to define default handlers. Default handler
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* will be weak symbol and just dead loops. They can be
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* overwritten by other handlers */
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.macro def_irq_handler handler_name
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.weak \handler_name
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.set \handler_name, Default_Handler
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.endm
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def_irq_handler CORET_IRQHandler
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def_irq_handler TIMA0_IRQHandler
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def_irq_handler TIMA1_IRQHandler
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def_irq_handler TIMB0_IRQHandler
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def_irq_handler TIMB1_IRQHandler
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def_irq_handler USART0_IRQHandler
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def_irq_handler USART1_IRQHandler
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def_irq_handler USART2_IRQHandler
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def_irq_handler USART3_IRQHandler
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def_irq_handler GPIOA_IRQHandler
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def_irq_handler GPIOB_IRQHandler
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def_irq_handler I2C0_IRQHandler
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def_irq_handler I2C1_IRQHandler
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def_irq_handler SPI0_IRQHandler
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def_irq_handler SPI1_IRQHandler
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def_irq_handler RTC_IRQHandler
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def_irq_handler WDT_IRQHandler
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def_irq_handler PWM_IRQHandler
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def_irq_handler DMAC_IRQHandler
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def_irq_handler AES_IRQHandler
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def_irq_handler SHA_IRQHandler
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.end
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