521 lines
7.8 KiB
C
521 lines
7.8 KiB
C
/*
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* Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2024/05/24 unicornx first version
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*/
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#ifndef __DRV_PINMUX_H__
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#define __DRV_PINMUX_H__
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/**
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* @brief Function Selection Type
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*/
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typedef enum _fs_type
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{
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fs_none = 0,
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ADC1,
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ADC2,
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ADC3,
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AUX0,
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AUX1,
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AUX2,
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CAM_HS0,
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CAM_MCLK0,
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CAM_MCLK1,
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CAM_PD0,
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CAM_PD1,
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CAM_RST0,
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CAM_VS0,
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CLK25M,
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CLK32K,
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CR_4WTDI,
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CR_4WTDO,
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CV_SCL0,
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CV_SDA0,
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DBG_0,
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DBG_1,
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DBG_2,
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DBG_3,
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DBG_4,
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DBG_5,
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DBG_6,
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DBG_7,
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DBG_8,
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DBG_9,
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DBG_10,
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DBG_11,
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DBG_12,
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DBG_13,
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DBG_14,
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DBG_15,
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DBG_16,
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DBG_18,
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DBG_19,
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EMMC_CLK,
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EMMC_CMD,
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EMMC_DAT0,
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EMMC_DAT1,
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EMMC_DAT2,
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EMMC_DAT3,
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EMMC_DAT_0,
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EMMC_DAT_1,
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EMMC_DAT_2,
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EMMC_DAT_3,
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EMMC_RSTN,
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EPHY_LNK_LED,
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EPHY_SPD_LED,
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GPIO_RTX,
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GPIO_ZQ,
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IIC0_SCL,
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IIC0_SDA,
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IIC1_SCL,
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IIC1_SDA,
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IIC2_SCL,
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IIC2_SDA,
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IIC3_SCL,
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IIC3_SDA,
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IIC4_SCL,
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IIC4_SDA,
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IIS1_BCLK,
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IIS1_DI,
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IIS1_DO,
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IIS1_LRCK,
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IIS1_MCLK,
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IIS2_BCLK,
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IIS2_DI,
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IIS2_DO,
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IIS2_LRCK,
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IIS2_MCLK,
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JTAG_TCK,
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JTAG_TDI,
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JTAG_TDO,
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JTAG_TMS,
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JTAG_CPU_TCK,
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JTAG_CPU_TMS,
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JTAG_CPU_TRST,
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KEY_COL0,
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KEY_COL1,
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KEY_COL2,
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KEY_COL3,
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KEY_ROW0,
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KEY_ROW1,
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KEY_ROW2,
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KEY_ROW3,
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MUX_SPI1_CS,
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MUX_SPI1_MISO,
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MUX_SPI1_MOSI,
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MUX_SPI1_SCK,
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PAD_AUD_AINL_MIC,
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PAD_AUD_AINR_MIC,
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PAD_AUD_AOUTL,
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PAD_AUD_AOUTR,
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PAD_ETH_RXM,
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PAD_ETH_RXP,
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PAD_ETH_TXM,
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PAD_ETH_TXP,
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PAD_MIPIRX0N,
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PAD_MIPIRX0P,
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PAD_MIPIRX1N,
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PAD_MIPIRX1P,
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PAD_MIPIRX2N,
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PAD_MIPIRX2P,
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PAD_MIPIRX3N,
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PAD_MIPIRX3P,
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PAD_MIPIRX4N,
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PAD_MIPIRX4P,
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PAD_MIPIRX5N,
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PAD_MIPIRX5P,
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PAD_MIPI_TXM0,
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PAD_MIPI_TXM1,
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PAD_MIPI_TXM2,
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PAD_MIPI_TXM3,
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PAD_MIPI_TXM4,
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PAD_MIPI_TXP0,
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PAD_MIPI_TXP1,
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PAD_MIPI_TXP2,
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PAD_MIPI_TXP3,
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PAD_MIPI_TXP4,
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PKG_TYPE0,
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PKG_TYPE1,
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PKG_TYPE2,
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PTEST,
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PWM0_BUCK,
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PWM_0,
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PWM_1,
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PWM_2,
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PWM_3,
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PWM_4,
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PWM_5,
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PWM_6,
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PWM_7,
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PWM_8,
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PWM_9,
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PWM_10,
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PWM_11,
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PWM_12,
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PWM_13,
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PWM_14,
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PWM_15,
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PWR_BUTTON1,
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PWR_GPIO0,
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PWR_GPIO1,
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PWR_GPIO2,
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PWR_GPIO_0,
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PWR_GPIO_1,
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PWR_GPIO_2,
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PWR_GPIO_3,
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PWR_GPIO_4,
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PWR_GPIO_5,
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PWR_GPIO_6,
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PWR_GPIO_7,
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PWR_GPIO_8,
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PWR_GPIO_9,
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PWR_GPIO_10,
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PWR_GPIO_11,
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PWR_GPIO_12,
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PWR_GPIO_13,
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PWR_GPIO_14,
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PWR_GPIO_15,
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PWR_GPIO_16,
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PWR_GPIO_17,
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PWR_GPIO_18,
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PWR_GPIO_19,
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PWR_GPIO_20,
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PWR_GPIO_21,
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PWR_GPIO_22,
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PWR_GPIO_23,
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PWR_GPIO_24,
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PWR_GPIO_25,
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PWR_GPIO_26,
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PWR_IIC_SCL,
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PWR_IIC_SDA,
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PWR_IR0,
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PWR_IR1,
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PWR_MCU_JTAG_TCK,
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PWR_MCU_JTAG_TDI,
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PWR_MCU_JTAG_TDO,
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PWR_MCU_JTAG_TMS,
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PWR_ON,
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PWR_PTEST,
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PWR_RSTN,
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PWR_SD1_CLK_VO37,
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PWR_SD1_CMD_VO36,
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PWR_SD1_D0_VO35,
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PWR_SD1_D1_VO34,
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PWR_SD1_D2_VO33,
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PWR_SD1_D3_VO32,
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PWR_SD1_CLK,
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PWR_SD1_CMD,
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PWR_SD1_D0,
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PWR_SD1_D1,
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PWR_SD1_D2,
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PWR_SD1_D3,
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PWR_SECTICK,
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PWR_SEQ1,
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PWR_SEQ2,
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PWR_SEQ3,
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PWR_SPINOR1_CS_X,
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PWR_SPINOR1_HOLD_X,
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PWR_SPINOR1_MISO,
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PWR_SPINOR1_MOSI,
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PWR_SPINOR1_SCK,
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PWR_SPINOR1_WP_X,
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PWR_UART0_RX,
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PWR_UART0_TX,
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PWR_UART1_RX,
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PWR_UART1_TX,
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PWR_VBAT_DET,
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PWR_WAKEUP0,
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PWR_WAKEUP1,
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PWR_XTAL_CLKIN,
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RMII0_IRQ,
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RMII0_MDC,
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RMII0_MDIO,
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RMII0_REFCLKI,
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RMII0_RXD0,
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RMII0_RXD1,
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RMII0_RXDV,
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RMII0_TXCLK,
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RMII0_TXD0,
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RMII0_TXD1,
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RMII0_TXEN,
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RSTN,
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SD0_CD,
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SD0_CLK,
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SD0_CMD,
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SD0_D0,
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SD0_D1,
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SD0_D2,
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SD0_D3,
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SD0_PWR_EN,
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SD1_CLK,
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SD1_CMD,
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SD1_D0,
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SD1_D1,
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SD1_D2,
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SD1_D3,
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SD1_GPIO0,
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SD1_GPIO1,
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SDIO0_CD,
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SDIO0_CLK,
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SDIO0_CMD,
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SDIO0_D_0,
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SDIO0_D_1,
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SDIO0_D_2,
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SDIO0_D_3,
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SDIO0_PWR_EN,
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SPI0_CS_X,
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SPI0_SCK,
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SPI0_SDI,
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SPI0_SDO,
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SPI1_CS_X,
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SPI1_SCK,
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SPI1_SDI,
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SPI1_SDO,
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SPI2_CS_X,
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SPI2_SCK,
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SPI2_SDI,
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SPI2_SDO,
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SPI3_CS_X,
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SPI3_SCK,
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SPI3_SDI,
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SPI3_SDO,
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SPINAND_CLK,
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SPINAND_CS,
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SPINAND_HOLD,
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SPINAND_MISO,
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SPINAND_MOSI,
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SPINAND_WP,
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SPINOR_CS_X,
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SPINOR_HOLD_X,
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SPINOR_MISO,
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SPINOR_MOSI,
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SPINOR_SCK,
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SPINOR_WP_X,
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SPK_EN,
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UART0_RX,
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UART0_TX,
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UART1_CTS,
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UART1_RTS,
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UART1_RX,
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UART1_TX,
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UART2_CTS,
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UART2_RTS,
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UART2_RX,
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UART2_TX,
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UART3_CTS,
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UART3_RTS,
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UART3_RX,
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UART3_TX,
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UART4_CTS,
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UART4_RTS,
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UART4_RX,
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UART4_TX,
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USB_ID,
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USB_VBUS_DET,
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USB_VBUS_EN,
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VI0_CLK,
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VI0_D_0,
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VI0_D_1,
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VI0_D_2,
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VI0_D_3,
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VI0_D_4,
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VI0_D_5,
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VI0_D_6,
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VI0_D_7,
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VI0_D_8,
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VI0_D_9,
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VI0_D_10,
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VI0_D_11,
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VI0_D_12,
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VI0_D_13,
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VI0_D_14,
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VI0_D_15,
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VI1_CLK,
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VI1_D_0,
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VI1_D_1,
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VI1_D_2,
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VI1_D_3,
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VI1_D_4,
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VI1_D_5,
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VI1_D_6,
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VI1_D_7,
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VI1_D_8,
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VI1_D_9,
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VI1_D_10,
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VI1_D_11,
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VI1_D_12,
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VI1_D_13,
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VI1_D_14,
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VI1_D_15,
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VI1_D_16,
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VI1_D_17,
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VI1_D_18,
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VI2_CLK,
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VI2_D_0,
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VI2_D_1,
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VI2_D_2,
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VI2_D_3,
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VI2_D_4,
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VI2_D_5,
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VI2_D_6,
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VI2_D_7,
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VIVO_CLK,
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VIVO_D0,
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VIVO_D1,
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VIVO_D2,
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VIVO_D3,
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VIVO_D4,
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VIVO_D5,
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VIVO_D6,
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VIVO_D7,
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VIVO_D8,
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VIVO_D9,
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VIVO_D10,
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VO_CLK0,
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VO_CLK1,
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VO_D_0,
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VO_D_1,
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VO_D_2,
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VO_D_3,
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VO_D_4,
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VO_D_5,
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VO_D_6,
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VO_D_7,
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VO_D_8,
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VO_D_9,
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VO_D_10,
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VO_D_11,
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VO_D_12,
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VO_D_13,
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VO_D_14,
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VO_D_15,
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VO_D_16,
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VO_D_17,
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VO_D_18,
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VO_D_19,
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VO_D_20,
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VO_D_21,
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VO_D_22,
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VO_D_23,
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VO_D_24,
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VO_D_25,
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VO_D_26,
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VO_D_27,
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VO_D_28,
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VO_D_29,
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VO_D_30,
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VO_D_31,
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WG0_D0,
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WG0_D1,
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WG1_D0,
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WG1_D1,
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WG2_D0,
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WG2_D1,
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XGPIOA_0,
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XGPIOA_1,
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XGPIOA_2,
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XGPIOA_3,
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XGPIOA_4,
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XGPIOA_5,
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XGPIOA_6,
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XGPIOA_7,
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XGPIOA_8,
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XGPIOA_9,
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XGPIOA_10,
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XGPIOA_11,
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XGPIOA_12,
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XGPIOA_13,
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XGPIOA_14,
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XGPIOA_15,
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XGPIOA_16,
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XGPIOA_17,
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XGPIOA_18,
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XGPIOA_19,
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XGPIOA_20,
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XGPIOA_21,
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XGPIOA_22,
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XGPIOA_23,
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XGPIOA_24,
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XGPIOA_25,
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XGPIOA_26,
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XGPIOA_27,
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XGPIOA_28,
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XGPIOA_29,
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XGPIOA_30,
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XGPIOB_0,
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XGPIOB_1,
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XGPIOB_2,
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XGPIOB_3,
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XGPIOB_4,
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XGPIOB_5,
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XGPIOB_6,
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XGPIOB_7,
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XGPIOB_8,
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XGPIOB_9,
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XGPIOB_10,
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XGPIOB_11,
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XGPIOB_12,
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XGPIOB_13,
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XGPIOB_14,
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XGPIOB_15,
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XGPIOB_16,
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XGPIOB_17,
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XGPIOB_18,
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XGPIOB_19,
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XGPIOB_20,
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XGPIOB_21,
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XGPIOB_22,
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XGPIOB_23,
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XGPIOB_24,
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XGPIOB_25,
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XGPIOB_26,
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XGPIOB_27,
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XGPIOC_0,
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XGPIOC_1,
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XGPIOC_2,
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XGPIOC_3,
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XGPIOC_4,
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XGPIOC_5,
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XGPIOC_6,
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XGPIOC_7,
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XGPIOC_8,
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XGPIOC_9,
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XGPIOC_10,
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XGPIOC_11,
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XGPIOC_12,
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XGPIOC_13,
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XGPIOC_14,
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XGPIOC_15,
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XGPIOC_16,
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XGPIOC_17,
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XGPIOC_18,
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XGPIOC_19,
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XGPIOC_20,
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XGPIOC_21,
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XGPIOC_22,
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XGPIOC_23,
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XGPIOC_24,
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XGPIOC_25,
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XTAL_XIN,
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} fs_type;
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/**
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* @brief configure pin multiplex
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*
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* @param pin_name pin name string
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* @param func_type function type enum
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* @param whitelist pin name whilelist which is allowed to set. Ignore check
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* if NULL.
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* NOTE: whitelist should be a string list ended with NULL.
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*
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* @return RT_EOK if succeeded
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* else: something wrong occurred and config is abandoned.
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*/
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extern int pinmux_config(const char *pin_name, fs_type func_type, const char *whitelist[]);
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#endif
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