75 lines
1.6 KiB
C
75 lines
1.6 KiB
C
/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-08-25 AisinoChip first implementation
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include "board.h"
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#include <rtdevice.h>
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#define SOC_SRAM_END_ADDR (SOC_SRAM_START_ADDR+SOC_SRAM_SIZE*1024)
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extern int rt_application_init(void);
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#elif __ICCARM__
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#pragma section="HEAP"
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#else
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extern int __bss_end;
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#endif
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extern void rt_hw_uart_init(void);
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/**
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* This is the timer interrupt service routine.
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*
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*/
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void SysTick_Handler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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rt_tick_increase();
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/* leave interrupt */
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rt_interrupt_leave();
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}
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/**
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* This function will initial EVB board.
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*/
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void rt_hw_board_init(void)
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{
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/* system init, clock, NVIC */
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System_Init();
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/* Configure the SysTick */
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SysTick_Config(System_Get_SystemClock() / RT_TICK_PER_SECOND);
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rt_hw_uart_init();
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rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
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#ifdef RT_USING_HEAP
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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rt_system_heap_init((void *)&Image$$RW_IRAM1$$ZI$$Limit, (void *)SOC_SRAM_END_ADDR);
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#elif __ICCARM__
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rt_system_heap_init(__segment_end("HEAP"), (void *)SOC_SRAM_END_ADDR);
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#else
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/* init memory system */
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rt_system_heap_init((void *)&__bss_end, (void *)SOC_SRAM_END_ADDR);
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#endif
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#endif /* RT_USING_HEAP */
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#ifdef RT_USING_COMPONENTS_INIT
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rt_components_board_init();
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#endif
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}
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