50 lines
1.8 KiB
C
50 lines
1.8 KiB
C
/*******************************************************************************
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* (c) Copyright 2012-2013 Microsemi SoC Products Group. All rights reserved.
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*
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* SmartFusion2 CMSIS system initialization.
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*
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* SVN $Revision: 5280 $
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* SVN $Date: 2013-03-22 20:51:50 +0000 (Fri, 22 Mar 2013) $
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*/
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#ifndef SYSTEM_M2SXXX_H
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#define SYSTEM_M2SXXX_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Standard CMSIS global variables. */
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extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
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/* SmartFusion2 specific clocks. */
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extern uint32_t g_FrequencyPCLK0; /*!< Clock frequency of APB bus 0. */
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extern uint32_t g_FrequencyPCLK1; /*!< Clock frequency of APB bus 1. */
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extern uint32_t g_FrequencyPCLK2; /*!< Clock frequency of APB bus 2. */
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extern uint32_t g_FrequencyFIC0; /*!< Clock frequecny of FPGA fabric interface controller 1. */
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extern uint32_t g_FrequencyFIC1; /*!< Clock frequecny of FPGA fabric inteface controller 2. */
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extern uint32_t g_FrequencyFIC64; /*!< Clock frequecny of 64-bit FPGA fabric interface controller. */
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/***************************************************************************//**
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* The SystemInit() is a standard CMSIS function called during system startup.
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* It is meant to perform low level hardware setup such as configuring DDR and
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* SERDES controllers.
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*/
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void SystemInit(void);
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/***************************************************************************//**
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* The SystemCoreClockUpdate() is a standard CMSIS function which can be called
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* by the application in order to ensure that the SystemCoreClock global
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* variable contains the up to date Cortex-M3 core frequency. Calling this
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* function also updates the global variables containing the frequencies of the
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* APB busses connecting the peripherals.
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*/
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void SystemCoreClockUpdate(void);
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#ifdef __cplusplus
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}
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#endif
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#endif
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