129 lines
4.6 KiB
C
129 lines
4.6 KiB
C
/*
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* @brief High-Speed USB registers and control functions
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*
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* @note
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* Copyright(C) NXP Semiconductors, 2012
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* All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#ifndef __USBHS_001_H_
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#define __USBHS_001_H_
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#include "sys_config.h"
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#include "cmsis.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** @defgroup IP_USBHS_001 IP: USBHS Device, Host, & OTG register block and driver
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* @ingroup IP_Drivers
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* USB High-Speed Device, Host, & OTG
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* Note: On the LPC18xx and LPC43xx, only USB0 supports OTG
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* @{
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*/
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/**
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* @brief USB High-Speed register block structure
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*/
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typedef struct { /*!< USB Structure */
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__I uint32_t RESERVED0[64];
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__I uint32_t CAPLENGTH; /*!< Capability register length */
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__I uint32_t HCSPARAMS; /*!< Host controller structural parameters */
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__I uint32_t HCCPARAMS; /*!< Host controller capability parameters */
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__I uint32_t RESERVED1[5];
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__I uint32_t DCIVERSION; /*!< Device interface version number */
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__I uint32_t RESERVED2[7];
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union {
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__IO uint32_t USBCMD_H; /*!< USB command (host mode) */
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__IO uint32_t USBCMD_D; /*!< USB command (device mode) */
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};
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union {
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__IO uint32_t USBSTS_H; /*!< USB status (host mode) */
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__IO uint32_t USBSTS_D; /*!< USB status (device mode) */
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};
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union {
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__IO uint32_t USBINTR_H; /*!< USB interrupt enable (host mode) */
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__IO uint32_t USBINTR_D; /*!< USB interrupt enable (device mode) */
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};
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union {
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__IO uint32_t FRINDEX_H; /*!< USB frame index (host mode) */
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__I uint32_t FRINDEX_D; /*!< USB frame index (device mode) */
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};
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__I uint32_t RESERVED3;
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union {
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__IO uint32_t PERIODICLISTBASE; /*!< Frame list base address */
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__IO uint32_t DEVICEADDR; /*!< USB device address */
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};
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union {
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__IO uint32_t ASYNCLISTADDR; /*!< Address of endpoint list in memory (host mode) */
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__IO uint32_t ENDPOINTLISTADDR; /*!< Address of endpoint list in memory (device mode) */
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};
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__IO uint32_t TTCTRL; /*!< Asynchronous buffer status for embedded TT (host mode) */
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__IO uint32_t BURSTSIZE; /*!< Programmable burst size */
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__IO uint32_t TXFILLTUNING; /*!< Host transmit pre-buffer packet tuning (host mode) */
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__I uint32_t RESERVED4[2];
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__IO uint32_t ULPIVIEWPORT; /*!< ULPI viewport */
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__IO uint32_t BINTERVAL; /*!< Length of virtual frame */
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__IO uint32_t ENDPTNAK; /*!< Endpoint NAK (device mode) */
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__IO uint32_t ENDPTNAKEN; /*!< Endpoint NAK Enable (device mode) */
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__I uint32_t RESERVED5;
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union {
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__IO uint32_t PORTSC1_H; /*!< Port 1 status/control (host mode) */
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__IO uint32_t PORTSC1_D; /*!< Port 1 status/control (device mode) */
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};
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__I uint32_t RESERVED6[7];
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__IO uint32_t OTGSC; /*!< OTG status and control */
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union {
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__IO uint32_t USBMODE_H; /*!< USB mode (host mode) */
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__IO uint32_t USBMODE_D; /*!< USB mode (device mode) */
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};
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__IO uint32_t ENDPTSETUPSTAT; /*!< Endpoint setup status */
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__IO uint32_t ENDPTPRIME; /*!< Endpoint initialization */
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__IO uint32_t ENDPTFLUSH; /*!< Endpoint de-initialization */
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__I uint32_t ENDPTSTAT; /*!< Endpoint status */
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__IO uint32_t ENDPTCOMPLETE; /*!< Endpoint complete */
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__IO uint32_t ENDPTCTRL[6]; /*!< Endpoint control 0 */
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} IP_USBHS_001_Type;
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __USBHS_001_H_ */
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