556 lines
31 KiB
C
556 lines
31 KiB
C
/*
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* Copyright (C) 2010-2012, Freescale Semiconductor, Inc. All Rights Reserved
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* THIS SOURCE CODE IS CONFIDENTIAL AND PROPRIETARY AND MAY NOT
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* BE USED OR DISTRIBUTED WITHOUT THE WRITTEN PERMISSION OF
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* Freescale Semiconductor, Inc.
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*/
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/*!
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* @file hdmi_regs.h
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* @brief registers defination of hdmi tx module.
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* @ingroup diag_hdmi
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*/
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#ifndef __HDMI_REGS_H__
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#define __HDMI_REGS_H__
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#include "soc_memory_map.h"
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// ANALOG registers
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#define HW_ANADIG_PLL_VIDEO ANATOP_BASE_ADDR + 0x0a0
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#define HW_ANADIG_PLL_VIDEO_NUM ANATOP_BASE_ADDR + 0x0b0
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#define HW_ANADIG_PLL_VIDEO_DENUM ANATOP_BASE_ADDR + 0x0c0
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// HDMI PHY REGISTERS
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#define CREGS_PLL_DIV_ADDR 0x06
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#define CREGS_PLL_GMP_CNTRL_ADDR 0x15
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#define CREGS_PLL_PROP_INT_CNTRL_ADDR 0x10
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#define CREGS_PATTERNGEN 0x1B
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#define CREGS_PGMODE 0x1C
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#define CREGS_DIGTXMODE 0x1E
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//
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// Hdmi controller registers
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//
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// Identification Registers
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#define HDMI_DESIGN_ID HDMI_ARB_BASE_ADDR+0x0000
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#define HDMI_REVISION_ID HDMI_ARB_BASE_ADDR+0x0001
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#define HDMI_PRODUCT_ID0 HDMI_ARB_BASE_ADDR+0x0002
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#define HDMI_PRODUCT_ID1 HDMI_ARB_BASE_ADDR+0x0003
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#define HDMI_CONFIG0_ID HDMI_ARB_BASE_ADDR+0x0004
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#define HDMI_CONFIG1_ID HDMI_ARB_BASE_ADDR+0x0005
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#define HDMI_CONFIG2_ID HDMI_ARB_BASE_ADDR+0x0006
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#define HDMI_CONFIG3_ID HDMI_ARB_BASE_ADDR+0x0007
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// Interrupt Registers
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#define HDMI_IH_FC_STAT0 HDMI_ARB_BASE_ADDR+0x0100
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#define HDMI_IH_FC_STAT1 HDMI_ARB_BASE_ADDR+0x0101
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#define HDMI_IH_FC_STAT2 HDMI_ARB_BASE_ADDR+0x0102
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#define HDMI_IH_AS_STAT0 HDMI_ARB_BASE_ADDR+0x0103
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#define HDMI_IH_PHY_STAT0 HDMI_ARB_BASE_ADDR+0x0104
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#define HDMI_IH_I2CM_STAT0 HDMI_ARB_BASE_ADDR+0x0105
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#define HDMI_IH_CEC_STAT0 HDMI_ARB_BASE_ADDR+0x0106
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#define HDMI_IH_VP_STAT0 HDMI_ARB_BASE_ADDR+0x0107
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#define HDMI_IH_I2CMPHY_STAT0 HDMI_ARB_BASE_ADDR+0x0108
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#define HDMI_IH_AHBDMAAUD_STAT0 HDMI_ARB_BASE_ADDR+0x0180
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#define HDMI_IH_MUTE_FC_STAT1 HDMI_ARB_BASE_ADDR+0x0181
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#define HDMI_IH_MUTE_FC_STAT2 HDMI_ARB_BASE_ADDR+0x0182
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#define HDMI_IH_MUTE_AS_STAT0 HDMI_ARB_BASE_ADDR+0x0183
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#define HDMI_IH_MUTE_PHY_STAT0 HDMI_ARB_BASE_ADDR+0x0184
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#define HDMI_IH_MUTE_I2CM_STAT0 HDMI_ARB_BASE_ADDR+0x0185
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#define HDMI_IH_MUTE_CEC_STAT0 HDMI_ARB_BASE_ADDR+0x0186
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#define HDMI_IH_MUTE_VP_STAT0 HDMI_ARB_BASE_ADDR+0x0187
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#define HDMI_IH_MUTE_I2CMPHY_STAT0 HDMI_ARB_BASE_ADDR+0x0188
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#define HDMI_IH_MUTE_AHBDMAAUD_STAT0 HDMI_ARB_BASE_ADDR+0x0189
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#define HDMI_IH_MUTE HDMI_ARB_BASE_ADDR+0x01FF
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// Video Sample Registers
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#define HDMI_TX_INVID0 HDMI_ARB_BASE_ADDR+0x0200
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#define HDMI_TX_INSTUFFING HDMI_ARB_BASE_ADDR+0x0201
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#define HDMI_TX_GYDATA0 HDMI_ARB_BASE_ADDR+0x0202
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#define HDMI_TX_GYDATA1 HDMI_ARB_BASE_ADDR+0x0203
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#define HDMI_TX_RCRDATA0 HDMI_ARB_BASE_ADDR+0x0204
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#define HDMI_TX_RCRDATA1 HDMI_ARB_BASE_ADDR+0x0205
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#define HDMI_TX_BCBDATA0 HDMI_ARB_BASE_ADDR+0x0206
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#define HDMI_TX_BCBDATA1 HDMI_ARB_BASE_ADDR+0x0207
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// Video Packetizer Registers
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#define HDMI_VP_STATUS HDMI_ARB_BASE_ADDR+0x0800
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#define HDMI_VP_PR_CD HDMI_ARB_BASE_ADDR+0x0801
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#define HDMI_VP_STUFF HDMI_ARB_BASE_ADDR+0x0802
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#define HDMI_VP_REMAP HDMI_ARB_BASE_ADDR+0x0803
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#define HDMI_VP_CONF HDMI_ARB_BASE_ADDR+0x0804
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#define HDMI_VP_STAT HDMI_ARB_BASE_ADDR+0x0805
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#define HDMI_VP_INT HDMI_ARB_BASE_ADDR+0x0806
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#define HDMI_VP_MASK HDMI_ARB_BASE_ADDR+0x0807
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#define HDMI_VP_POL HDMI_ARB_BASE_ADDR+0x0808
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// Frame Composer Registers
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#define HDMI_FC_INVIDCONF HDMI_ARB_BASE_ADDR+0x1000
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#define HDMI_FC_INHACTV0 HDMI_ARB_BASE_ADDR+0x1001
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#define HDMI_FC_INHACTV1 HDMI_ARB_BASE_ADDR+0x1002
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#define HDMI_FC_INHBLANK0 HDMI_ARB_BASE_ADDR+0x1003
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#define HDMI_FC_INHBLANK1 HDMI_ARB_BASE_ADDR+0x1004
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#define HDMI_FC_INVACTV0 HDMI_ARB_BASE_ADDR+0x1005
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#define HDMI_FC_INVACTV1 HDMI_ARB_BASE_ADDR+0x1006
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#define HDMI_FC_INVBLANK HDMI_ARB_BASE_ADDR+0x1007
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#define HDMI_FC_HSYNCINDELAY0 HDMI_ARB_BASE_ADDR+0x1008
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#define HDMI_FC_HSYNCINDELAY1 HDMI_ARB_BASE_ADDR+0x1009
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#define HDMI_FC_HSYNCINWIDTH0 HDMI_ARB_BASE_ADDR+0x100A
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#define HDMI_FC_HSYNCINWIDTH1 HDMI_ARB_BASE_ADDR+0x100B
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#define HDMI_FC_VSYNCINDELAY HDMI_ARB_BASE_ADDR+0x100C
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#define HDMI_FC_VSYNCINWIDTH HDMI_ARB_BASE_ADDR+0x100D
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#define HDMI_FC_INFREQ0 HDMI_ARB_BASE_ADDR+0x100E
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#define HDMI_FC_INFREQ1 HDMI_ARB_BASE_ADDR+0x100F
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#define HDMI_FC_INFREQ2 HDMI_ARB_BASE_ADDR+0x1010
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#define HDMI_FC_CTRLDUR HDMI_ARB_BASE_ADDR+0x1011
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#define HDMI_FC_EXCTRLDUR HDMI_ARB_BASE_ADDR+0x1012
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#define HDMI_FC_EXCTRLSPAC HDMI_ARB_BASE_ADDR+0x1013
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#define HDMI_FC_CH0PREAM HDMI_ARB_BASE_ADDR+0x1014
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#define HDMI_FC_CH1PREAM HDMI_ARB_BASE_ADDR+0x1015
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#define HDMI_FC_CH2PREAM HDMI_ARB_BASE_ADDR+0x1016
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#define HDMI_FC_AVICONF3 HDMI_ARB_BASE_ADDR+0x1017
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#define HDMI_FC_GCP HDMI_ARB_BASE_ADDR+0x1018
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#define HDMI_FC_AVICONF0 HDMI_ARB_BASE_ADDR+0x1019
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#define HDMI_FC_AVICONF1 HDMI_ARB_BASE_ADDR+0x101A
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#define HDMI_FC_AVICONF2 HDMI_ARB_BASE_ADDR+0x101B
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#define HDMI_FC_AVIVID HDMI_ARB_BASE_ADDR+0x101C
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#define HDMI_FC_AVIETB0 HDMI_ARB_BASE_ADDR+0x101D
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#define HDMI_FC_AVIETB1 HDMI_ARB_BASE_ADDR+0x101E
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#define HDMI_FC_AVISBB0 HDMI_ARB_BASE_ADDR+0x101F
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#define HDMI_FC_AVISBB1 HDMI_ARB_BASE_ADDR+0x1020
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#define HDMI_FC_AVIELB0 HDMI_ARB_BASE_ADDR+0x1021
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#define HDMI_FC_AVIELB1 HDMI_ARB_BASE_ADDR+0x1022
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#define HDMI_FC_AVISRB0 HDMI_ARB_BASE_ADDR+0x1023
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#define HDMI_FC_AVISRB1 HDMI_ARB_BASE_ADDR+0x1024
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#define HDMI_FC_AUDICONF0 HDMI_ARB_BASE_ADDR+0x1025
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#define HDMI_FC_AUDICONF1 HDMI_ARB_BASE_ADDR+0x1026
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#define HDMI_FC_AUDICONF2 HDMI_ARB_BASE_ADDR+0x1027
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#define HDMI_FC_AUDICONF3 HDMI_ARB_BASE_ADDR+0x1028
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#define HDMI_FC_VSDIEEEID0 HDMI_ARB_BASE_ADDR+0x1029
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#define HDMI_FC_VSDSIZE HDMI_ARB_BASE_ADDR+0x102A
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#define HDMI_FC_VSDIEEEID1 HDMI_ARB_BASE_ADDR+0x1030
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#define HDMI_FC_VSDIEEEID2 HDMI_ARB_BASE_ADDR+0x1031
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#define HDMI_FC_VSDPAYLOAD0 HDMI_ARB_BASE_ADDR+0x1032
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#define HDMI_FC_VSDPAYLOAD1 HDMI_ARB_BASE_ADDR+0x1033
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#define HDMI_FC_VSDPAYLOAD2 HDMI_ARB_BASE_ADDR+0x1034
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#define HDMI_FC_VSDPAYLOAD3 HDMI_ARB_BASE_ADDR+0x1035
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#define HDMI_FC_VSDPAYLOAD4 HDMI_ARB_BASE_ADDR+0x1036
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#define HDMI_FC_VSDPAYLOAD5 HDMI_ARB_BASE_ADDR+0x1037
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#define HDMI_FC_VSDPAYLOAD6 HDMI_ARB_BASE_ADDR+0x1038
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#define HDMI_FC_VSDPAYLOAD7 HDMI_ARB_BASE_ADDR+0x1039
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#define HDMI_FC_VSDPAYLOAD8 HDMI_ARB_BASE_ADDR+0x103A
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#define HDMI_FC_VSDPAYLOAD9 HDMI_ARB_BASE_ADDR+0x103B
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#define HDMI_FC_VSDPAYLOAD10 HDMI_ARB_BASE_ADDR+0x103C
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#define HDMI_FC_VSDPAYLOAD11 HDMI_ARB_BASE_ADDR+0x103D
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#define HDMI_FC_VSDPAYLOAD12 HDMI_ARB_BASE_ADDR+0x103E
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#define HDMI_FC_VSDPAYLOAD13 HDMI_ARB_BASE_ADDR+0x103F
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#define HDMI_FC_VSDPAYLOAD14 HDMI_ARB_BASE_ADDR+0x1040
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#define HDMI_FC_VSDPAYLOAD15 HDMI_ARB_BASE_ADDR+0x1041
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#define HDMI_FC_VSDPAYLOAD16 HDMI_ARB_BASE_ADDR+0x1042
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#define HDMI_FC_VSDPAYLOAD17 HDMI_ARB_BASE_ADDR+0x1043
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#define HDMI_FC_VSDPAYLOAD18 HDMI_ARB_BASE_ADDR+0x1044
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#define HDMI_FC_VSDPAYLOAD19 HDMI_ARB_BASE_ADDR+0x1045
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#define HDMI_FC_VSDPAYLOAD20 HDMI_ARB_BASE_ADDR+0x1046
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#define HDMI_FC_VSDPAYLOAD21 HDMI_ARB_BASE_ADDR+0x1047
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#define HDMI_FC_VSDPAYLOAD22 HDMI_ARB_BASE_ADDR+0x1048
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#define HDMI_FC_VSDPAYLOAD23 HDMI_ARB_BASE_ADDR+0x1049
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#define HDMI_FC_SPDVENDORNAME0 HDMI_ARB_BASE_ADDR+0x104A
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#define HDMI_FC_SPDVENDORNAME1 HDMI_ARB_BASE_ADDR+0x104B
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#define HDMI_FC_SPDVENDORNAME2 HDMI_ARB_BASE_ADDR+0x104C
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#define HDMI_FC_SPDVENDORNAME3 HDMI_ARB_BASE_ADDR+0x104D
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#define HDMI_FC_SPDVENDORNAME4 HDMI_ARB_BASE_ADDR+0x104E
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#define HDMI_FC_SPDVENDORNAME5 HDMI_ARB_BASE_ADDR+0x104F
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#define HDMI_FC_SPDVENDORNAME6 HDMI_ARB_BASE_ADDR+0x1050
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#define HDMI_FC_SPDVENDORNAME7 HDMI_ARB_BASE_ADDR+0x1051
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#define HDMI_FC_SDPPRODUCTNAME0 HDMI_ARB_BASE_ADDR+0x1052
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#define HDMI_FC_SDPPRODUCTNAME1 HDMI_ARB_BASE_ADDR+0x1053
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#define HDMI_FC_SDPPRODUCTNAME2 HDMI_ARB_BASE_ADDR+0x1054
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#define HDMI_FC_SDPPRODUCTNAME3 HDMI_ARB_BASE_ADDR+0x1055
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#define HDMI_FC_SDPPRODUCTNAME4 HDMI_ARB_BASE_ADDR+0x1056
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#define HDMI_FC_SDPPRODUCTNAME5 HDMI_ARB_BASE_ADDR+0x1057
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#define HDMI_FC_SDPPRODUCTNAME6 HDMI_ARB_BASE_ADDR+0x1058
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#define HDMI_FC_SDPPRODUCTNAME7 HDMI_ARB_BASE_ADDR+0x1059
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#define HDMI_FC_SDPPRODUCTNAME8 HDMI_ARB_BASE_ADDR+0x105A
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#define HDMI_FC_SDPPRODUCTNAME9 HDMI_ARB_BASE_ADDR+0x105B
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#define HDMI_FC_SDPPRODUCTNAME10 HDMI_ARB_BASE_ADDR+0x105C
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#define HDMI_FC_SDPPRODUCTNAME11 HDMI_ARB_BASE_ADDR+0x105D
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#define HDMI_FC_SDPPRODUCTNAME12 HDMI_ARB_BASE_ADDR+0x105E
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#define HDMI_FC_SDPPRODUCTNAME13 HDMI_ARB_BASE_ADDR+0x105F
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#define HDMI_FC_SDPPRODUCTNAME14 HDMI_ARB_BASE_ADDR+0x1060
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#define HDMI_FC_SPDPRODUCTNAME15 HDMI_ARB_BASE_ADDR+0x1061
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#define HDMI_FC_SPDDEVICEINF HDMI_ARB_BASE_ADDR+0x1062
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#define HDMI_FC_AUDSCONF HDMI_ARB_BASE_ADDR+0x1063
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#define HDMI_FC_AUDSSTAT HDMI_ARB_BASE_ADDR+0x1064
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#define HDMI_FC_AUDSV HDMI_ARB_BASE_ADDR+0x1065
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#define HDMI_FC_AUDSU HDMI_ARB_BASE_ADDR+0x1066
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#define HDMI_FC_AUDSCHNLS0 HDMI_ARB_BASE_ADDR+0x1067
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#define HDMI_FC_AUDSCHNLS1 HDMI_ARB_BASE_ADDR+0x1068
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#define HDMI_FC_AUDSCHNLS2 HDMI_ARB_BASE_ADDR+0x1069
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#define HDMI_FC_AUDSCHNLS3 HDMI_ARB_BASE_ADDR+0x106A
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#define HDMI_FC_AUDSCHNLS4 HDMI_ARB_BASE_ADDR+0x106B
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#define HDMI_FC_AUDSCHNLS5 HDMI_ARB_BASE_ADDR+0x106C
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#define HDMI_FC_AUDSCHNLS6 HDMI_ARB_BASE_ADDR+0x106D
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#define HDMI_FC_AUDSCHNLS7 HDMI_ARB_BASE_ADDR+0x106E
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#define HDMI_FC_AUDSCHNLS8 HDMI_ARB_BASE_ADDR+0x106F
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#define HDMI_FC_DATACH0FILL HDMI_ARB_BASE_ADDR+0x1070
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#define HDMI_FC_DATACH1FILL HDMI_ARB_BASE_ADDR+0x1071
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#define HDMI_FC_DATACH2FILL HDMI_ARB_BASE_ADDR+0x1072
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#define HDMI_FC_CTRLQHIGH HDMI_ARB_BASE_ADDR+0x1073
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#define HDMI_FC_CTRLQLOW HDMI_ARB_BASE_ADDR+0x1074
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#define HDMI_FC_ACP0 HDMI_ARB_BASE_ADDR+0x1075
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#define HDMI_FC_ACP28 HDMI_ARB_BASE_ADDR+0x1076
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#define HDMI_FC_ACP27 HDMI_ARB_BASE_ADDR+0x1077
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#define HDMI_FC_ACP26 HDMI_ARB_BASE_ADDR+0x1078
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#define HDMI_FC_ACP25 HDMI_ARB_BASE_ADDR+0x1079
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#define HDMI_FC_ACP24 HDMI_ARB_BASE_ADDR+0x107A
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#define HDMI_FC_ACP23 HDMI_ARB_BASE_ADDR+0x107B
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#define HDMI_FC_ACP22 HDMI_ARB_BASE_ADDR+0x107C
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#define HDMI_FC_ACP21 HDMI_ARB_BASE_ADDR+0x107D
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#define HDMI_FC_ACP20 HDMI_ARB_BASE_ADDR+0x107E
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#define HDMI_FC_ACP19 HDMI_ARB_BASE_ADDR+0x107F
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#define HDMI_FC_ACP18 HDMI_ARB_BASE_ADDR+0x1080
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#define HDMI_FC_ACP17 HDMI_ARB_BASE_ADDR+0x1081
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#define HDMI_FC_ACP16 HDMI_ARB_BASE_ADDR+0x1082
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#define HDMI_FC_ACP15 HDMI_ARB_BASE_ADDR+0x1083
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#define HDMI_FC_ACP14 HDMI_ARB_BASE_ADDR+0x1084
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#define HDMI_FC_ACP13 HDMI_ARB_BASE_ADDR+0x1085
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#define HDMI_FC_ACP12 HDMI_ARB_BASE_ADDR+0x1086
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#define HDMI_FC_ACP11 HDMI_ARB_BASE_ADDR+0x1087
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#define HDMI_FC_ACP10 HDMI_ARB_BASE_ADDR+0x1088
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#define HDMI_FC_ACP9 HDMI_ARB_BASE_ADDR+0x1089
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#define HDMI_FC_ACP8 HDMI_ARB_BASE_ADDR+0x108A
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#define HDMI_FC_ACP7 HDMI_ARB_BASE_ADDR+0x108B
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#define HDMI_FC_ACP6 HDMI_ARB_BASE_ADDR+0x108C
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#define HDMI_FC_ACP5 HDMI_ARB_BASE_ADDR+0x108D
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#define HDMI_FC_ACP4 HDMI_ARB_BASE_ADDR+0x108E
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#define HDMI_FC_ACP3 HDMI_ARB_BASE_ADDR+0x108F
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#define HDMI_FC_ACP2 HDMI_ARB_BASE_ADDR+0x1090
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#define HDMI_FC_ACP1 HDMI_ARB_BASE_ADDR+0x1091
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#define HDMI_FC_ISCR1_0 HDMI_ARB_BASE_ADDR+0x1092
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#define HDMI_FC_ISCR1_16 HDMI_ARB_BASE_ADDR+0x1093
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#define HDMI_FC_ISCR1_15 HDMI_ARB_BASE_ADDR+0x1094
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#define HDMI_FC_ISCR1_14 HDMI_ARB_BASE_ADDR+0x1095
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#define HDMI_FC_ISCR1_13 HDMI_ARB_BASE_ADDR+0x1096
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#define HDMI_FC_ISCR1_12 HDMI_ARB_BASE_ADDR+0x1097
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#define HDMI_FC_ISCR1_11 HDMI_ARB_BASE_ADDR+0x1098
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#define HDMI_FC_ISCR1_10 HDMI_ARB_BASE_ADDR+0x1099
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#define HDMI_FC_ISCR1_9 HDMI_ARB_BASE_ADDR+0x109A
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#define HDMI_FC_ISCR1_8 HDMI_ARB_BASE_ADDR+0x109B
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#define HDMI_FC_ISCR1_7 HDMI_ARB_BASE_ADDR+0x109C
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#define HDMI_FC_ISCR1_6 HDMI_ARB_BASE_ADDR+0x109D
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#define HDMI_FC_ISCR1_5 HDMI_ARB_BASE_ADDR+0x109E
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#define HDMI_FC_ISCR1_4 HDMI_ARB_BASE_ADDR+0x109F
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#define HDMI_FC_ISCR1_3 HDMI_ARB_BASE_ADDR+0x10A0
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#define HDMI_FC_ISCR1_2 HDMI_ARB_BASE_ADDR+0x10A1
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#define HDMI_FC_ISCR1_1 HDMI_ARB_BASE_ADDR+0x10A2
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#define HDMI_FC_ISCR2_15 HDMI_ARB_BASE_ADDR+0x10A3
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#define HDMI_FC_ISCR2_14 HDMI_ARB_BASE_ADDR+0x10A4
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#define HDMI_FC_ISCR2_13 HDMI_ARB_BASE_ADDR+0x10A5
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#define HDMI_FC_ISCR2_12 HDMI_ARB_BASE_ADDR+0x10A6
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#define HDMI_FC_ISCR2_11 HDMI_ARB_BASE_ADDR+0x10A7
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#define HDMI_FC_ISCR2_10 HDMI_ARB_BASE_ADDR+0x10A8
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#define HDMI_FC_ISCR2_9 HDMI_ARB_BASE_ADDR+0x10A9
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#define HDMI_FC_ISCR2_8 HDMI_ARB_BASE_ADDR+0x10AA
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#define HDMI_FC_ISCR2_7 HDMI_ARB_BASE_ADDR+0x10AB
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#define HDMI_FC_ISCR2_6 HDMI_ARB_BASE_ADDR+0x10AC
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#define HDMI_FC_ISCR2_5 HDMI_ARB_BASE_ADDR+0x10AD
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#define HDMI_FC_ISCR2_4 HDMI_ARB_BASE_ADDR+0x10AE
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#define HDMI_FC_ISCR2_3 HDMI_ARB_BASE_ADDR+0x10AF
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#define HDMI_FC_ISCR2_2 HDMI_ARB_BASE_ADDR+0x10B0
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#define HDMI_FC_ISCR2_1 HDMI_ARB_BASE_ADDR+0x10B1
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#define HDMI_FC_ISCR2_0 HDMI_ARB_BASE_ADDR+0x10B2
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#define HDMI_FC_DATAUTO0 HDMI_ARB_BASE_ADDR+0x10B3
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#define HDMI_FC_DATAUTO1 HDMI_ARB_BASE_ADDR+0x10B4
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#define HDMI_FC_DATAUTO2 HDMI_ARB_BASE_ADDR+0x10B5
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#define HDMI_FC_DATMAN HDMI_ARB_BASE_ADDR+0x10B6
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#define HDMI_FC_DATAUTO3 HDMI_ARB_BASE_ADDR+0x10B7
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#define HDMI_FC_RDRB0 HDMI_ARB_BASE_ADDR+0x10B8
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#define HDMI_FC_RDRB1 HDMI_ARB_BASE_ADDR+0x10B9
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#define HDMI_FC_RDRB2 HDMI_ARB_BASE_ADDR+0x10BA
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#define HDMI_FC_RDRB3 HDMI_ARB_BASE_ADDR+0x10BB
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#define HDMI_FC_RDRB4 HDMI_ARB_BASE_ADDR+0x10BC
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#define HDMI_FC_RDRB5 HDMI_ARB_BASE_ADDR+0x10BD
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#define HDMI_FC_RDRB6 HDMI_ARB_BASE_ADDR+0x10BE
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#define HDMI_FC_RDRB7 HDMI_ARB_BASE_ADDR+0x10BF
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#define HDMI_FC_STAT0 HDMI_ARB_BASE_ADDR+0x10D0
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#define HDMI_FC_INT0 HDMI_ARB_BASE_ADDR+0x10D1
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#define HDMI_FC_MASK0 HDMI_ARB_BASE_ADDR+0x10D2
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#define HDMI_FC_POL0 HDMI_ARB_BASE_ADDR+0x10D3
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#define HDMI_FC_STAT1 HDMI_ARB_BASE_ADDR+0x10D4
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#define HDMI_FC_INT1 HDMI_ARB_BASE_ADDR+0x10D5
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#define HDMI_FC_MASK1 HDMI_ARB_BASE_ADDR+0x10D6
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#define HDMI_FC_POL1 HDMI_ARB_BASE_ADDR+0x10D7
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#define HDMI_FC_STAT2 HDMI_ARB_BASE_ADDR+0x10D8
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#define HDMI_FC_INT2 HDMI_ARB_BASE_ADDR+0x10D9
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#define HDMI_FC_MASK2 HDMI_ARB_BASE_ADDR+0x10DA
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#define HDMI_FC_POL2 HDMI_ARB_BASE_ADDR+0x10DB
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#define HDMI_FC_PRCONF HDMI_ARB_BASE_ADDR+0x10E0
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#define HDMI_FC_GMD_STAT HDMI_ARB_BASE_ADDR+0x1100
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#define HDMI_FC_GMD_EN HDMI_ARB_BASE_ADDR+0x1101
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#define HDMI_FC_GMD_UP HDMI_ARB_BASE_ADDR+0x1102
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#define HDMI_FC_GMD_CONF HDMI_ARB_BASE_ADDR+0x1103
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#define HDMI_FC_GMD_HB HDMI_ARB_BASE_ADDR+0x1104
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#define HDMI_FC_GMD_PB0 HDMI_ARB_BASE_ADDR+0x1105
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#define HDMI_FC_GMD_PB1 HDMI_ARB_BASE_ADDR+0x1106
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#define HDMI_FC_GMD_PB2 HDMI_ARB_BASE_ADDR+0x1107
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#define HDMI_FC_GMD_PB3 HDMI_ARB_BASE_ADDR+0x1108
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#define HDMI_FC_GMD_PB4 HDMI_ARB_BASE_ADDR+0x1109
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#define HDMI_FC_GMD_PB5 HDMI_ARB_BASE_ADDR+0x110A
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#define HDMI_FC_GMD_PB6 HDMI_ARB_BASE_ADDR+0x110B
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#define HDMI_FC_GMD_PB7 HDMI_ARB_BASE_ADDR+0x110C
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#define HDMI_FC_GMD_PB8 HDMI_ARB_BASE_ADDR+0x110D
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#define HDMI_FC_GMD_PB9 HDMI_ARB_BASE_ADDR+0x110E
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#define HDMI_FC_GMD_PB10 HDMI_ARB_BASE_ADDR+0x110F
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#define HDMI_FC_GMD_PB11 HDMI_ARB_BASE_ADDR+0x1110
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#define HDMI_FC_GMD_PB12 HDMI_ARB_BASE_ADDR+0x1111
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#define HDMI_FC_GMD_PB13 HDMI_ARB_BASE_ADDR+0x1112
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#define HDMI_FC_GMD_PB14 HDMI_ARB_BASE_ADDR+0x1113
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#define HDMI_FC_GMD_PB15 HDMI_ARB_BASE_ADDR+0x1114
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#define HDMI_FC_GMD_PB16 HDMI_ARB_BASE_ADDR+0x1115
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#define HDMI_FC_GMD_PB17 HDMI_ARB_BASE_ADDR+0x1116
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#define HDMI_FC_GMD_PB18 HDMI_ARB_BASE_ADDR+0x1117
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#define HDMI_FC_GMD_PB19 HDMI_ARB_BASE_ADDR+0x1118
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#define HDMI_FC_GMD_PB20 HDMI_ARB_BASE_ADDR+0x1119
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#define HDMI_FC_GMD_PB21 HDMI_ARB_BASE_ADDR+0x111A
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#define HDMI_FC_GMD_PB22 HDMI_ARB_BASE_ADDR+0x111B
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#define HDMI_FC_GMD_PB23 HDMI_ARB_BASE_ADDR+0x111C
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#define HDMI_FC_GMD_PB24 HDMI_ARB_BASE_ADDR+0x111D
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#define HDMI_FC_GMD_PB25 HDMI_ARB_BASE_ADDR+0x111E
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#define HDMI_FC_GMD_PB26 HDMI_ARB_BASE_ADDR+0x111F
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#define HDMI_FC_GMD_PB27 HDMI_ARB_BASE_ADDR+0x1120
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#define HDMI_FC_DBGFORCE HDMI_ARB_BASE_ADDR+0x1200
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#define HDMI_FC_DBGAUD0CH0 HDMI_ARB_BASE_ADDR+0x1201
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#define HDMI_FC_DBGAUD1CH0 HDMI_ARB_BASE_ADDR+0x1202
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#define HDMI_FC_DBGAUD2CH0 HDMI_ARB_BASE_ADDR+0x1203
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#define HDMI_FC_DBGAUD0CH1 HDMI_ARB_BASE_ADDR+0x1204
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#define HDMI_FC_DBGAUD1CH1 HDMI_ARB_BASE_ADDR+0x1205
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#define HDMI_FC_DBGAUD2CH1 HDMI_ARB_BASE_ADDR+0x1206
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#define HDMI_FC_DBGAUD0CH2 HDMI_ARB_BASE_ADDR+0x1207
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#define HDMI_FC_DBGAUD1CH2 HDMI_ARB_BASE_ADDR+0x1208
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#define HDMI_FC_DBGAUD2CH2 HDMI_ARB_BASE_ADDR+0x1209
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#define HDMI_FC_DBGAUD0CH3 HDMI_ARB_BASE_ADDR+0x120A
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#define HDMI_FC_DBGAUD1CH3 HDMI_ARB_BASE_ADDR+0x120B
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#define HDMI_FC_DBGAUD2CH3 HDMI_ARB_BASE_ADDR+0x120C
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#define HDMI_FC_DBGAUD0CH4 HDMI_ARB_BASE_ADDR+0x120D
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#define HDMI_FC_DBGAUD1CH4 HDMI_ARB_BASE_ADDR+0x120E
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#define HDMI_FC_DBGAUD2CH4 HDMI_ARB_BASE_ADDR+0x120F
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#define HDMI_FC_DBGAUD0CH5 HDMI_ARB_BASE_ADDR+0x1210
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#define HDMI_FC_DBGAUD1CH5 HDMI_ARB_BASE_ADDR+0x1211
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#define HDMI_FC_DBGAUD2CH5 HDMI_ARB_BASE_ADDR+0x1212
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#define HDMI_FC_DBGAUD0CH6 HDMI_ARB_BASE_ADDR+0x1213
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#define HDMI_FC_DBGAUD1CH6 HDMI_ARB_BASE_ADDR+0x1214
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#define HDMI_FC_DBGAUD2CH6 HDMI_ARB_BASE_ADDR+0x1215
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#define HDMI_FC_DBGAUD0CH7 HDMI_ARB_BASE_ADDR+0x1216
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#define HDMI_FC_DBGAUD1CH7 HDMI_ARB_BASE_ADDR+0x1217
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#define HDMI_FC_DBGAUD2CH7 HDMI_ARB_BASE_ADDR+0x1218
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#define HDMI_FC_DBGTMDS0 HDMI_ARB_BASE_ADDR+0x1219
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#define HDMI_FC_DBGTMDS1 HDMI_ARB_BASE_ADDR+0x121A
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#define HDMI_FC_DBGTMDS2 HDMI_ARB_BASE_ADDR+0x121B
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// HDMI Source PHY Registers
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#define HDMI_PHY_CONF0 HDMI_ARB_BASE_ADDR+0x3000
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#define HDMI_PHY_TST0 HDMI_ARB_BASE_ADDR+0x3001
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#define HDMI_PHY_TST1 HDMI_ARB_BASE_ADDR+0x3002
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#define HDMI_PHY_TST2 HDMI_ARB_BASE_ADDR+0x3003
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#define HDMI_PHY_STAT0 HDMI_ARB_BASE_ADDR+0x3004
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#define HDMI_PHY_INT0 HDMI_ARB_BASE_ADDR+0x3005
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#define HDMI_PHY_MASK0 HDMI_ARB_BASE_ADDR+0x3006
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#define HDMI_PHY_POL0 HDMI_ARB_BASE_ADDR+0x3007
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// HDMI Master PHY Registers
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#define HDMI_PHY_I2CM_SLAVE_ADDR HDMI_ARB_BASE_ADDR+0x3020
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#define HDMI_PHY_I2CM_ADDRESS_ADDR HDMI_ARB_BASE_ADDR+0x3021
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#define HDMI_PHY_I2CM_DATAO_1_ADDR HDMI_ARB_BASE_ADDR+0x3022
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#define HDMI_PHY_I2CM_DATAO_0_ADDR HDMI_ARB_BASE_ADDR+0x3023
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#define HDMI_PHY_I2CM_DATAI_1_ADDR HDMI_ARB_BASE_ADDR+0x3024
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#define HDMI_PHY_I2CM_DATAI_0_ADDR HDMI_ARB_BASE_ADDR+0x3025
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#define HDMI_PHY_I2CM_OPERATION_ADDR HDMI_ARB_BASE_ADDR+0x3026
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#define HDMI_PHY_I2CM_INT_ADDR HDMI_ARB_BASE_ADDR+0x3027
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#define HDMI_PHY_I2CM_CTLINT_ADDR HDMI_ARB_BASE_ADDR+0x3028
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#define HDMI_PHY_I2CM_DIV_ADDR HDMI_ARB_BASE_ADDR+0x3029
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#define HDMI_PHY_I2CM_SOFTRSTZ_ADDR HDMI_ARB_BASE_ADDR+0x302a
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#define HDMI_PHY_I2CM_SS_SCL_HCNT_1_ADDR HDMI_ARB_BASE_ADDR+0x302b
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#define HDMI_PHY_I2CM_SS_SCL_HCNT_0_ADDR HDMI_ARB_BASE_ADDR+0x302c
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#define HDMI_PHY_I2CM_SS_SCL_LCNT_1_ADDR HDMI_ARB_BASE_ADDR+0x302d
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#define HDMI_PHY_I2CM_SS_SCL_LCNT_0_ADDR HDMI_ARB_BASE_ADDR+0x302e
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#define HDMI_PHY_I2CM_FS_SCL_HCNT_1_ADDR HDMI_ARB_BASE_ADDR+0x302f
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#define HDMI_PHY_I2CM_FS_SCL_HCNT_0_ADDR HDMI_ARB_BASE_ADDR+0x3030
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#define HDMI_PHY_I2CM_FS_SCL_LCNT_1_ADDR HDMI_ARB_BASE_ADDR+0x3031
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#define HDMI_PHY_I2CM_FS_SCL_LCNT_0_ADDR HDMI_ARB_BASE_ADDR+0x3032
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// Generic Parallel Audio Interface Registers
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#define HDMI_GP_CONF0 HDMI_ARB_BASE_ADDR+0x3500
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#define HDMI_GP_CONF1 HDMI_ARB_BASE_ADDR+0x3501
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#define HDMI_GP_CONF2 HDMI_ARB_BASE_ADDR+0x3502
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#define HDMI_GP_STAT HDMI_ARB_BASE_ADDR+0x3503
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#define HDMI_GP_INT HDMI_ARB_BASE_ADDR+0x3504
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#define HDMI_GP_MASK HDMI_ARB_BASE_ADDR+0x3505
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#define HDMI_GP_POL HDMI_ARB_BASE_ADDR+0x3506
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// Audio DMA Registers (TBD)
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#define HDMI_AHB_DMA_CONF0 HDMI_ARB_BASE_ADDR+0x3600
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#define HDMI_AHB_DMA_START HDMI_ARB_BASE_ADDR+0x3601
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#define HDMI_AHB_DMA_STOP HDMI_ARB_BASE_ADDR+0x3602
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#define HDMI_AHB_DMA_THRSLD HDMI_ARB_BASE_ADDR+0x3603
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#define HDMI_AHB_DMA_STRADDR0 HDMI_ARB_BASE_ADDR+0x3604
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#define HDMI_AHB_DMA_STRADDR1 HDMI_ARB_BASE_ADDR+0x3605
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#define HDMI_AHB_DMA_STRADDR2 HDMI_ARB_BASE_ADDR+0x3606
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#define HDMI_AHB_DMA_STRADDR3 HDMI_ARB_BASE_ADDR+0x3607
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#define HDMI_AHB_DMA_STPADDR0 HDMI_ARB_BASE_ADDR+0x3608
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#define HDMI_AHB_DMA_STPADDR1 HDMI_ARB_BASE_ADDR+0x3609
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#define HDMI_AHB_DMA_STPADDR2 HDMI_ARB_BASE_ADDR+0x360a
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#define HDMI_AHB_DMA_STPADDR3 HDMI_ARB_BASE_ADDR+0x360b
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#define HDMI_AHB_DMA_BSTADDR0 HDMI_ARB_BASE_ADDR+0x360c
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#define HDMI_AHB_DMA_BSTADDR1 HDMI_ARB_BASE_ADDR+0x360d
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#define HDMI_AHB_DMA_BSTADDR2 HDMI_ARB_BASE_ADDR+0x360e
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#define HDMI_AHB_DMA_BSTADDR3 HDMI_ARB_BASE_ADDR+0x360f
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#define HDMI_AHB_DMA_MBLENGTH0 HDMI_ARB_BASE_ADDR+0x3610
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#define HDMI_AHB_DMA_MBLENGTH1 HDMI_ARB_BASE_ADDR+0x3611
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#define HDMI_AHB_DMA_STAT HDMI_ARB_BASE_ADDR+0x3612
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#define HDMI_AHB_DMA_INT HDMI_ARB_BASE_ADDR+0x3613
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#define HDMI_AHB_DMA_MASK HDMI_ARB_BASE_ADDR+0x3614
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#define HDMI_AHB_DMA_POL HDMI_ARB_BASE_ADDR+0x3615
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// Main Controller Registers
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#define HDMI_MC_SFRDIV HDMI_ARB_BASE_ADDR+0x4000
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#define HDMI_MC_CLKDIS HDMI_ARB_BASE_ADDR+0x4001
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#define HDMI_MC_SWRSTZ HDMI_ARB_BASE_ADDR+0x4002
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#define HDMI_MC_OPCTRL HDMI_ARB_BASE_ADDR+0x4003
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#define HDMI_MC_FLOWCTRL HDMI_ARB_BASE_ADDR+0x4004
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#define HDMI_MC_PHYRSTZ HDMI_ARB_BASE_ADDR+0x4005
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#define HDMI_MC_LOCKONCLOCK HDMI_ARB_BASE_ADDR+0x4006
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#define HDMI_MC_HEACPHY_RST HDMI_ARB_BASE_ADDR+0x4007
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// Color Space Converter Registers
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#define HDMI_CSC_CFG HDMI_ARB_BASE_ADDR+0x4100
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#define HDMI_CSC_SCALE HDMI_ARB_BASE_ADDR+0x4101
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#define HDMI_CSC_COEF_A1_MSB HDMI_ARB_BASE_ADDR+0x4102
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#define HDMI_CSC_COEF_A1_LSB HDMI_ARB_BASE_ADDR+0x4103
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#define HDMI_CSC_COEF_A2_MSB HDMI_ARB_BASE_ADDR+0x4104
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#define HDMI_CSC_COEF_A2_LSB HDMI_ARB_BASE_ADDR+0x4105
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#define HDMI_CSC_COEF_A3_MSB HDMI_ARB_BASE_ADDR+0x4106
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#define HDMI_CSC_COEF_A3_LSB HDMI_ARB_BASE_ADDR+0x4107
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#define HDMI_CSC_COEF_A4_MSB HDMI_ARB_BASE_ADDR+0x4108
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#define HDMI_CSC_COEF_A4_LSB HDMI_ARB_BASE_ADDR+0x4109
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#define HDMI_CSC_COEF_B1_MSB HDMI_ARB_BASE_ADDR+0x410A
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#define HDMI_CSC_COEF_B1_LSB HDMI_ARB_BASE_ADDR+0x410B
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#define HDMI_CSC_COEF_B2_MSB HDMI_ARB_BASE_ADDR+0x410C
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#define HDMI_CSC_COEF_B2_LSB HDMI_ARB_BASE_ADDR+0x410D
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#define HDMI_CSC_COEF_B3_MSB HDMI_ARB_BASE_ADDR+0x410E
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#define HDMI_CSC_COEF_B3_LSB HDMI_ARB_BASE_ADDR+0x410F
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#define HDMI_CSC_COEF_B4_MSB HDMI_ARB_BASE_ADDR+0x4110
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#define HDMI_CSC_COEF_B4_LSB HDMI_ARB_BASE_ADDR+0x4111
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#define HDMI_CSC_COEF_C1_MSB HDMI_ARB_BASE_ADDR+0x4112
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#define HDMI_CSC_COEF_C1_LSB HDMI_ARB_BASE_ADDR+0x4113
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#define HDMI_CSC_COEF_C2_MSB HDMI_ARB_BASE_ADDR+0x4114
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#define HDMI_CSC_COEF_C2_LSB HDMI_ARB_BASE_ADDR+0x4115
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#define HDMI_CSC_COEF_C3_MSB HDMI_ARB_BASE_ADDR+0x4116
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#define HDMI_CSC_COEF_C3_LSB HDMI_ARB_BASE_ADDR+0x4117
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#define HDMI_CSC_COEF_C4_MSB HDMI_ARB_BASE_ADDR+0x4118
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#define HDMI_CSC_COEF_C4_LSB HDMI_ARB_BASE_ADDR+0x4119
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// HDCP Encryption Engine Registers
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#define HDMI_A_HDCPCFG0 HDMI_ARB_BASE_ADDR+0x5000
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#define HDMI_A_HDCPCFG1 HDMI_ARB_BASE_ADDR+0x5001
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#define HDMI_A_HDCPOBS0 HDMI_ARB_BASE_ADDR+0x5002
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#define HDMI_A_HDCPOBS1 HDMI_ARB_BASE_ADDR+0x5003
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#define HDMI_A_HDCPOBS2 HDMI_ARB_BASE_ADDR+0x5004
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#define HDMI_A_HDCPOBS3 HDMI_ARB_BASE_ADDR+0x5005
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#define HDMI_A_APIINTCLR HDMI_ARB_BASE_ADDR+0x5006
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#define HDMI_A_APIINTSTAT HDMI_ARB_BASE_ADDR+0x5007
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#define HDMI_A_APIINTMSK HDMI_ARB_BASE_ADDR+0x5008
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#define HDMI_A_VIDPOLCFG HDMI_ARB_BASE_ADDR+0x5009
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#define HDMI_A_OESSWCFG HDMI_ARB_BASE_ADDR+0x500A
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#define HDMI_A_TIMER1SETUP0 HDMI_ARB_BASE_ADDR+0x500B
|
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#define HDMI_A_TIMER1SETUP1 HDMI_ARB_BASE_ADDR+0x500C
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#define HDMI_A_TIMER2SETUP0 HDMI_ARB_BASE_ADDR+0x500D
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#define HDMI_A_TIMER2SETUP1 HDMI_ARB_BASE_ADDR+0x500E
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#define HDMI_A_100MSCFG HDMI_ARB_BASE_ADDR+0x500F
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#define HDMI_A_2SCFG0 HDMI_ARB_BASE_ADDR+0x5010
|
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#define HDMI_A_2SCFG1 HDMI_ARB_BASE_ADDR+0x5011
|
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#define HDMI_A_5SCFG0 HDMI_ARB_BASE_ADDR+0x5012
|
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#define HDMI_A_5SCFG1 HDMI_ARB_BASE_ADDR+0x5013
|
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#define HDMI_A_SRMVERLSB HDMI_ARB_BASE_ADDR+0x5014
|
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#define HDMI_A_SRMVERMSB HDMI_ARB_BASE_ADDR+0x5015
|
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#define HDMI_A_SRMCTRL HDMI_ARB_BASE_ADDR+0x5016
|
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#define HDMI_A_SFRSETUP HDMI_ARB_BASE_ADDR+0x5017
|
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#define HDMI_A_I2CHSETUP HDMI_ARB_BASE_ADDR+0x5018
|
|
#define HDMI_A_INTSETUP HDMI_ARB_BASE_ADDR+0x5019
|
|
#define HDMI_A_PRESETUP HDMI_ARB_BASE_ADDR+0x501A
|
|
#define HDMI_A_SRM_BASE HDMI_ARB_BASE_ADDR+0x5020
|
|
|
|
// CEC Engine Registers
|
|
#define HDMI_CEC_CTRL HDMI_ARB_BASE_ADDR+0x7D00
|
|
#define HDMI_CEC_STAT HDMI_ARB_BASE_ADDR+0x7D01
|
|
#define HDMI_CEC_MASK HDMI_ARB_BASE_ADDR+0x7D02
|
|
#define HDMI_CEC_POLARITY HDMI_ARB_BASE_ADDR+0x7D03
|
|
#define HDMI_CEC_INT HDMI_ARB_BASE_ADDR+0x7D04
|
|
#define HDMI_CEC_ADDR_L HDMI_ARB_BASE_ADDR+0x7D05
|
|
#define HDMI_CEC_ADDR_H HDMI_ARB_BASE_ADDR+0x7D06
|
|
#define HDMI_CEC_TX_CNT HDMI_ARB_BASE_ADDR+0x7D07
|
|
#define HDMI_CEC_RX_CNT HDMI_ARB_BASE_ADDR+0x7D08
|
|
#define HDMI_CEC_TX_DATA0 HDMI_ARB_BASE_ADDR+0x7D10
|
|
#define HDMI_CEC_TX_DATA1 HDMI_ARB_BASE_ADDR+0x7D11
|
|
#define HDMI_CEC_TX_DATA2 HDMI_ARB_BASE_ADDR+0x7D12
|
|
#define HDMI_CEC_TX_DATA3 HDMI_ARB_BASE_ADDR+0x7D13
|
|
#define HDMI_CEC_TX_DATA4 HDMI_ARB_BASE_ADDR+0x7D14
|
|
#define HDMI_CEC_TX_DATA5 HDMI_ARB_BASE_ADDR+0x7D15
|
|
#define HDMI_CEC_TX_DATA6 HDMI_ARB_BASE_ADDR+0x7D16
|
|
#define HDMI_CEC_TX_DATA7 HDMI_ARB_BASE_ADDR+0x7D17
|
|
#define HDMI_CEC_TX_DATA8 HDMI_ARB_BASE_ADDR+0x7D18
|
|
#define HDMI_CEC_TX_DATA9 HDMI_ARB_BASE_ADDR+0x7D19
|
|
#define HDMI_CEC_TX_DATA10 HDMI_ARB_BASE_ADDR+0x7D1a
|
|
#define HDMI_CEC_TX_DATA11 HDMI_ARB_BASE_ADDR+0x7D1b
|
|
#define HDMI_CEC_TX_DATA12 HDMI_ARB_BASE_ADDR+0x7D1c
|
|
#define HDMI_CEC_TX_DATA13 HDMI_ARB_BASE_ADDR+0x7D1d
|
|
#define HDMI_CEC_TX_DATA14 HDMI_ARB_BASE_ADDR+0x7D1e
|
|
#define HDMI_CEC_TX_DATA15 HDMI_ARB_BASE_ADDR+0x7D1f
|
|
#define HDMI_CEC_RX_DATA0 HDMI_ARB_BASE_ADDR+0x7D20
|
|
#define HDMI_CEC_RX_DATA1 HDMI_ARB_BASE_ADDR+0x7D21
|
|
#define HDMI_CEC_RX_DATA2 HDMI_ARB_BASE_ADDR+0x7D22
|
|
#define HDMI_CEC_RX_DATA3 HDMI_ARB_BASE_ADDR+0x7D23
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#define HDMI_CEC_RX_DATA4 HDMI_ARB_BASE_ADDR+0x7D24
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#define HDMI_CEC_RX_DATA5 HDMI_ARB_BASE_ADDR+0x7D25
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#define HDMI_CEC_RX_DATA6 HDMI_ARB_BASE_ADDR+0x7D26
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#define HDMI_CEC_RX_DATA7 HDMI_ARB_BASE_ADDR+0x7D27
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#define HDMI_CEC_RX_DATA8 HDMI_ARB_BASE_ADDR+0x7D28
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#define HDMI_CEC_RX_DATA9 HDMI_ARB_BASE_ADDR+0x7D29
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#define HDMI_CEC_RX_DATA10 HDMI_ARB_BASE_ADDR+0x7D2a
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#define HDMI_CEC_RX_DATA11 HDMI_ARB_BASE_ADDR+0x7D2b
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#define HDMI_CEC_RX_DATA12 HDMI_ARB_BASE_ADDR+0x7D2c
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#define HDMI_CEC_RX_DATA13 HDMI_ARB_BASE_ADDR+0x7D2d
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#define HDMI_CEC_RX_DATA14 HDMI_ARB_BASE_ADDR+0x7D2e
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#define HDMI_CEC_RX_DATA15 HDMI_ARB_BASE_ADDR+0x7D2f
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#define HDMI_CEC_LOCK HDMI_ARB_BASE_ADDR+0x7D30
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#define HDMI_CEC_WKUPCTRL HDMI_ARB_BASE_ADDR+0x7D31
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// I2C Master Registers (E-DDC)
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#define HDMI_I2CM_SLAVE HDMI_ARB_BASE_ADDR+0x7E00
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#define HDMI_I2CMESS HDMI_ARB_BASE_ADDR+0x7E01
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#define HDMI_I2CM_DATAO HDMI_ARB_BASE_ADDR+0x7E02
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#define HDMI_I2CM_DATAI HDMI_ARB_BASE_ADDR+0x7E03
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#define HDMI_I2CM_OPERATION HDMI_ARB_BASE_ADDR+0x7E04
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#define HDMI_I2CM_INT HDMI_ARB_BASE_ADDR+0x7E05
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#define HDMI_I2CM_CTLINT HDMI_ARB_BASE_ADDR+0x7E06
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#define HDMI_I2CM_DIV HDMI_ARB_BASE_ADDR+0x7E07
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#define HDMI_I2CM_SEGADDR HDMI_ARB_BASE_ADDR+0x7E08
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#define HDMI_I2CM_SOFTRSTZ HDMI_ARB_BASE_ADDR+0x7E09
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#define HDMI_I2CM_SEGPTR HDMI_ARB_BASE_ADDR+0x7E0A
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#define HDMI_I2CM_SS_SCL_HCNT_1_ADDR HDMI_ARB_BASE_ADDR+0x7E0B
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#define HDMI_I2CM_SS_SCL_HCNT_0_ADDR HDMI_ARB_BASE_ADDR+0x7E0C
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#define HDMI_I2CM_SS_SCL_LCNT_1_ADDR HDMI_ARB_BASE_ADDR+0x7E0D
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#define HDMI_I2CM_SS_SCL_LCNT_0_ADDR HDMI_ARB_BASE_ADDR+0x7E0E
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#define HDMI_I2CM_FS_SCL_HCNT_1_ADDR HDMI_ARB_BASE_ADDR+0x7E0F
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#define HDMI_I2CM_FS_SCL_HCNT_0_ADDR HDMI_ARB_BASE_ADDR+0x7E10
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#define HDMI_I2CM_FS_SCL_LCNT_1_ADDR HDMI_ARB_BASE_ADDR+0x7E11
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#define HDMI_I2CM_FS_SCL_LCNT_0_ADDR HDMI_ARB_BASE_ADDR+0x7E12
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// Random Number Generator Registers (RNG)
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#define HDMI_RNG_BASE HDMI_ARB_BASE_ADDR+0x8000
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#endif //HDMI_COMMON_H
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