107 lines
3.2 KiB
C
107 lines
3.2 KiB
C
/*
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* Copyright (c) 2006-2022, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-05-23 liuduanfei first version
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*/
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#ifndef __DRV_SDIO_H__
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#define __DRV_SDIO_H__
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#include <rtthread.h>
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#include "rtdevice.h"
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#include <rthw.h>
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#include <drv_common.h>
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#include <string.h>
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#include <drivers/dev_mmcsd_core.h>
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#include <drivers/dev_sdio.h>
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#define SDIO_BUFF_SIZE 4096
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#define SDIO_ALIGN_LEN 32
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#ifndef SDIO_BASE_ADDRESS
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#define SDIO_BASE_ADDRESS (0x52007000)
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#endif
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#ifndef SDIO_CLOCK_FREQ
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#define SDIO_CLOCK_FREQ (200U * 1000 * 1000)
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#endif
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#ifndef SDIO_BUFF_SIZE
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#define SDIO_BUFF_SIZE (4096)
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#endif
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#ifndef SDIO_ALIGN_LEN
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#define SDIO_ALIGN_LEN (32)
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#endif
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#ifndef SDIO_MAX_FREQ
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#define SDIO_MAX_FREQ (25 * 1000 * 1000)
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#endif
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#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
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#define SDIO_ERRORS \
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(SDMMC_STA_IDMATE | SDMMC_STA_ACKTIMEOUT | \
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SDMMC_STA_RXOVERR | SDMMC_STA_TXUNDERR | \
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SDMMC_STA_DTIMEOUT | SDMMC_STA_CTIMEOUT | \
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SDMMC_STA_DCRCFAIL | SDMMC_STA_CCRCFAIL)
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#define SDIO_MASKR_ALL \
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(SDMMC_MASK_CCRCFAILIE | SDMMC_MASK_DCRCFAILIE | SDMMC_MASK_CTIMEOUTIE | \
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SDMMC_MASK_TXUNDERRIE | SDMMC_MASK_RXOVERRIE | SDMMC_MASK_CMDRENDIE | \
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SDMMC_MASK_CMDSENTIE | SDMMC_MASK_DATAENDIE | SDMMC_MASK_ACKTIMEOUTIE)
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#define HW_SDIO_DATATIMEOUT (0xFFFFFFFFU)
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struct stm32_sdio
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{
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volatile rt_uint32_t power; /* offset 0x00 */
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volatile rt_uint32_t clkcr; /* offset 0x04 */
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volatile rt_uint32_t arg; /* offset 0x08 */
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volatile rt_uint32_t cmd; /* offset 0x0C */
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volatile rt_uint32_t respcmd; /* offset 0x10 */
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volatile rt_uint32_t resp1; /* offset 0x14 */
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volatile rt_uint32_t resp2; /* offset 0x18 */
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volatile rt_uint32_t resp3; /* offset 0x1C */
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volatile rt_uint32_t resp4; /* offset 0x20 */
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volatile rt_uint32_t dtimer; /* offset 0x24 */
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volatile rt_uint32_t dlen; /* offset 0x28 */
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volatile rt_uint32_t dctrl; /* offset 0x2C */
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volatile rt_uint32_t dcount; /* offset 0x30 */
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volatile rt_uint32_t sta; /* offset 0x34 */
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volatile rt_uint32_t icr; /* offset 0x38 */
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volatile rt_uint32_t mask; /* offset 0x3C */
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volatile rt_uint32_t acktimer; /* offset 0x40 */
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volatile rt_uint32_t reserved0[3]; /* offset 0x44 ~ 0x4C */
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volatile rt_uint32_t idmatrlr; /* offset 0x50 */
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volatile rt_uint32_t idmabsizer; /* offset 0x54 */
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volatile rt_uint32_t idmabase0r; /* offset 0x58 */
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volatile rt_uint32_t idmabase1r; /* offset 0x5C */
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volatile rt_uint32_t reserved1[8]; /* offset 0x60 ~ 7C */
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volatile rt_uint32_t fifo; /* offset 0x80 */
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};
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typedef rt_uint32_t (*sdio_clk_get)(struct stm32_sdio *hw_sdio);
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struct stm32_sdio_des
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{
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struct stm32_sdio *hw_sdio;
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sdio_clk_get clk_get;
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};
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/* stm32 sdio dirver class */
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struct stm32_sdio_class
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{
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struct stm32_sdio_des *des;
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const struct stm32_sdio_config *cfg;
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struct rt_mmcsd_host host;
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};
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extern void stm32_mmcsd_change(void);
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#endif /* __DRV_SDIO_H__ */
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