491 lines
16 KiB
C
491 lines
16 KiB
C
/*
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* Copyright (c) 2023 HPMicro
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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*/
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#ifndef _HPM_BOARD_H
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#define _HPM_BOARD_H
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#include <stdio.h>
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#include "hpm_common.h"
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#include "hpm_clock_drv.h"
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#include "hpm_lcdc_drv.h"
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#include "hpm_soc.h"
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#include "hpm_soc_feature.h"
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#include "pinmux.h"
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#ifdef CONFIG_HPM_PANEL
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#include "hpm_panel.h"
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#endif
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#if !defined(CONFIG_NDEBUG_CONSOLE) || !CONFIG_NDEBUG_CONSOLE
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#include "hpm_debug_console.h"
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#endif
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#define BOARD_NAME "hpm6800evk"
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#define BOARD_UF2_SIGNATURE (0x0A4D5048UL)
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/* dma section */
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#define BOARD_APP_XDMA HPM_XDMA
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#define BOARD_APP_HDMA HPM_HDMA
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#define BOARD_APP_XDMA_IRQ IRQn_XDMA
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#define BOARD_APP_HDMA_IRQ IRQn_HDMA
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#define BOARD_APP_DMAMUX HPM_DMAMUX
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#define TEST_DMA_CONTROLLER HPM_HDMA
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#define TEST_DMA_IRQ IRQn_HDMA
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#ifndef BOARD_RUNNING_CORE
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#define BOARD_RUNNING_CORE HPM_CORE0
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#endif
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/* uart section */
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#ifndef BOARD_APP_UART_BASE
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#define BOARD_APP_UART_BASE HPM_UART3
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#define BOARD_APP_UART_IRQ IRQn_UART3
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#define BOARD_APP_UART_BAUDRATE (115200UL)
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#define BOARD_APP_UART_CLK_NAME clock_uart3
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#define BOARD_APP_UART_RX_DMA_REQ HPM_DMA_SRC_UART3_RX
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#define BOARD_APP_UART_TX_DMA_REQ HPM_DMA_SRC_UART3_TX
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#endif
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/* uart lin sample section */
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#define BOARD_UART_LIN BOARD_APP_UART_BASE
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#define BOARD_UART_LIN_IRQ BOARD_APP_UART_IRQ
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#define BOARD_UART_LIN_CLK_NAME BOARD_APP_UART_CLK_NAME
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#define BOARD_UART_LIN_TX_PORT GPIO_DI_GPIOE
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#define BOARD_UART_LIN_TX_PIN (15U) /* PE15 should align with used pin in pinmux configuration */
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#if !defined(CONFIG_NDEBUG_CONSOLE) || !CONFIG_NDEBUG_CONSOLE
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#ifndef BOARD_CONSOLE_TYPE
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#define BOARD_CONSOLE_TYPE CONSOLE_TYPE_UART
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#endif
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#if BOARD_CONSOLE_TYPE == CONSOLE_TYPE_UART
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#ifndef BOARD_CONSOLE_UART_BASE
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#define BOARD_CONSOLE_UART_BASE HPM_UART0
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#define BOARD_CONSOLE_UART_CLK_NAME clock_uart0
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#define BOARD_CONSOLE_UART_IRQ IRQn_UART0
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#define BOARD_CONSOLE_UART_TX_DMA_REQ HPM_DMA_SRC_UART0_TX
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#define BOARD_CONSOLE_UART_RX_DMA_REQ HPM_DMA_SRC_UART0_RX
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#endif
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#define BOARD_CONSOLE_UART_BAUDRATE (115200UL)
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#endif
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#endif
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/* uart microros sample section */
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#define BOARD_MICROROS_UART_BASE BOARD_APP_UART_BASE
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#define BOARD_MICROROS_UART_IRQ BOARD_APP_UART_IRQ
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#define BOARD_MICROROS_UART_CLK_NAME BOARD_APP_UART_CLK_NAME
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/* rtthread-nano finsh section */
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#define BOARD_RT_CONSOLE_BASE BOARD_CONSOLE_UART_BASE
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/* usb cdc acm uart section */
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#define BOARD_USB_CDC_ACM_UART BOARD_APP_UART_BASE
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#define BOARD_USB_CDC_ACM_UART_CLK_NAME BOARD_APP_UART_CLK_NAME
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#define BOARD_USB_CDC_ACM_UART_TX_DMA_SRC BOARD_APP_UART_TX_DMA_REQ
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#define BOARD_USB_CDC_ACM_UART_RX_DMA_SRC BOARD_APP_UART_RX_DMA_REQ
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/* modbus sample section */
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#define BOARD_MODBUS_UART_BASE BOARD_APP_UART_BASE
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#define BOARD_MODBUS_UART_CLK_NAME BOARD_APP_UART_CLK_NAME
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#define BOARD_MODBUS_UART_RX_DMA_REQ BOARD_APP_UART_RX_DMA_REQ
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#define BOARD_MODBUS_UART_TX_DMA_REQ BOARD_APP_UART_TX_DMA_REQ
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/* lin section */
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#define BOARD_LIN HPM_LIN0
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#define BOARD_LIN_CLK_NAME clock_lin0
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#define BOARD_LIN_IRQ IRQn_LIN0
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#define BOARD_LIN_BAUDRATE (19200U)
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/* nor flash section */
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#define BOARD_FLASH_BASE_ADDRESS (0x80000000UL)
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#define BOARD_FLASH_SIZE (16 * SIZE_1MB)
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/* i2c section */
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#define BOARD_APP_I2C_BASE HPM_I2C1
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#define BOARD_APP_I2C_IRQ IRQn_I2C1
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#define BOARD_APP_I2C_CLK_NAME clock_i2c1
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#define BOARD_APP_I2C_DMA HPM_HDMA
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#define BOARD_APP_I2C_DMAMUX HPM_DMAMUX
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#define BOARD_APP_I2C_DMA_SRC HPM_DMA_SRC_I2C1
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#define BOARD_APP_I2C_DMAMUX_CH DMAMUX_MUXCFG_HDMA_MUX0
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/* cam */
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#define BOARD_CAM_I2C_BASE HPM_I2C0
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#define BOARD_CAM_I2C_CLK_NAME clock_i2c0
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#define BOARD_SUPPORT_CAM_RESET
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#define BOARD_SUPPORT_CAM_PWDN
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#define BOARD_CAM_RST_GPIO_CTRL HPM_GPIO0
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#define BOARD_CAM_RST_GPIO_INDEX GPIO_DI_GPIOA
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#define BOARD_CAM_RST_GPIO_PIN 22
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#define BOARD_CAM_PWDN_GPIO_CTRL HPM_GPIO0
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#define BOARD_CAM_PWDN_GPIO_INDEX GPIO_DI_GPIOA
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#define BOARD_CAM_PWDN_GPIO_PIN 21
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/* touch panel */
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#define BOARD_CAP_I2C_BASE (HPM_I2C0)
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#define BOARD_CAP_I2C_CLK_NAME clock_i2c0
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#define BOARD_CAP_RST_GPIO (HPM_GPIO0)
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#define BOARD_CAP_RST_GPIO_INDEX (GPIO_DI_GPIOY)
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#define BOARD_CAP_RST_GPIO_PIN (7)
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#define BOARD_CAP_RST_GPIO_IRQ (IRQn_GPIO0_Y)
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#define BOARD_CAP_INTR_GPIO (HPM_GPIO0)
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#define BOARD_CAP_INTR_GPIO_INDEX (GPIO_DI_GPIOY)
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#define BOARD_CAP_INTR_GPIO_PIN (6)
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#define BOARD_CAP_INTR_GPIO_IRQ (IRQn_GPIO0_Y)
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#define BOARD_CAP_I2C_GPIO HPM_GPIO0
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#define BOARD_CAP_I2C_SDA_GPIO_INDEX (GPIO_DI_GPIOF)
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#define BOARD_CAP_I2C_SDA_GPIO_PIN (9)
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#define BOARD_CAP_I2C_CLK_GPIO_INDEX (GPIO_DI_GPIOF)
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#define BOARD_CAP_I2C_CLK_GPIO_PIN (8)
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/* i2s section */
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#define BOARD_APP_I2S_BASE HPM_I2S3
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#define BOARD_APP_I2S_DATA_LINE (2U)
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#define BOARD_APP_I2S_CLK_NAME clock_i2s3
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#define BOARD_APP_I2S_TX_DMA_REQ HPM_DMA_SRC_I2S3_TX
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#define BOARD_APP_I2S_IRQ IRQn_I2S3
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#define BOARD_APP_AUDIO_CLK_SRC clock_source_pll3_clk0
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#define BOARD_APP_AUDIO_CLK_SRC_NAME clk_pll3clk0
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#define BOARD_PDM_SINGLE_CHANNEL_MASK (0x02U)
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#define BOARD_PDM_DUAL_CHANNEL_MASK (0x22U)
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/* i2c for i2s codec section */
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#define BOARD_CODEC_I2C_BASE HPM_I2C3
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#define BOARD_CODEC_I2C_CLK_NAME clock_i2c3
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/* dma section */
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#define BOARD_APP_XDMA HPM_XDMA
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#define BOARD_APP_HDMA HPM_HDMA
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#define BOARD_APP_XDMA_IRQ IRQn_XDMA
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#define BOARD_APP_HDMA_IRQ IRQn_HDMA
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#define BOARD_APP_DMAMUX HPM_DMAMUX
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/* gptmr section */
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#define BOARD_GPTMR HPM_GPTMR2
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#define BOARD_GPTMR_IRQ IRQn_GPTMR2
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#define BOARD_GPTMR_CHANNEL 0
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#define BOARD_GPTMR_DMA_SRC HPM_DMA_SRC_GPTMR2_0
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#define BOARD_GPTMR_CLK_NAME clock_gptmr2
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#define BOARD_GPTMR_PWM HPM_GPTMR2
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#define BOARD_GPTMR_PWM_CHANNEL 0
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#define BOARD_GPTMR_PWM_DMA_SRC HPM_DMA_SRC_GPTMR2_0
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#define BOARD_GPTMR_PWM_CLK_NAME clock_gptmr2
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#define BOARD_GPTMR_PWM_IRQ IRQn_GPTMR2
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#define BOARD_GPTMR_PWM_SYNC HPM_GPTMR2
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#define BOARD_GPTMR_PWM_SYNC_CHANNEL 1
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#define BOARD_GPTMR_PWM_SYNC_CLK_NAME clock_gptmr2
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/* pinmux section */
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#define USING_GPIO0_FOR_GPIOZ
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#ifndef USING_GPIO0_FOR_GPIOZ
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#define BOARD_APP_GPIO_CTRL HPM_BGPIO
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#define BOARD_APP_GPIO_IRQ IRQn_BGPIO
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#else
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#define BOARD_APP_GPIO_CTRL HPM_GPIO0
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#define BOARD_APP_GPIO_IRQ IRQn_GPIO0_F
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#endif
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/* gpiom section */
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#define BOARD_APP_GPIOM_BASE HPM_GPIOM
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#define BOARD_APP_GPIOM_USING_CTRL HPM_FGPIO
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#define BOARD_APP_GPIOM_USING_CTRL_NAME gpiom_core0_fast
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/*
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* in errata, for gpiom, setting the ASSIGN register of GPIOF is invalid.
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* so need to configure GPIOE to make it effective at the same time.
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*/
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#define BOARD_LED_GPIOM_GPIO_INDEX GPIO_DI_GPIOE
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/* spi section */
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#define BOARD_APP_SPI_BASE HPM_SPI3
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#define BOARD_APP_SPI_CLK_NAME clock_spi3
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#define BOARD_APP_SPI_IRQ IRQn_SPI3
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#define BOARD_APP_SPI_SCLK_FREQ (20000000UL)
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#define BOARD_APP_SPI_ADDR_LEN_IN_BYTES (1U)
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#define BOARD_APP_SPI_DATA_LEN_IN_BITS (8U)
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#define BOARD_APP_SPI_RX_DMA HPM_DMA_SRC_SPI3_RX
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#define BOARD_APP_SPI_TX_DMA HPM_DMA_SRC_SPI3_TX
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#define BOARD_SPI_CS_GPIO_CTRL HPM_GPIO0
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#define BOARD_SPI_CS_PIN IOC_PAD_PE04
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#define BOARD_SPI_CS_ACTIVE_LEVEL (0U)
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/* Flash section */
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#define BOARD_APP_XPI_NOR_XPI_BASE (HPM_XPI0)
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#define BOARD_APP_XPI_NOR_CFG_OPT_HDR (0xfcf90001U)
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#define BOARD_APP_XPI_NOR_CFG_OPT_OPT0 (0x00000005U)
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#define BOARD_APP_XPI_NOR_CFG_OPT_OPT1 (0x00001000U)
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/* ADC section */
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#define BOARD_APP_ADC16_NAME "ADC0"
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#define BOARD_APP_ADC16_BASE HPM_ADC0
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#define BOARD_APP_ADC16_IRQn IRQn_ADC0
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#define BOARD_APP_ADC16_CH_1 (8U)
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#define BOARD_APP_ADC16_CLK_NAME (clock_adc0)
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#define BOARD_APP_ADC16_PMT_TRIG_CH ADC16_CONFIG_TRG0A
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/* CAN section */
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#define BOARD_APP_CAN_BASE HPM_MCAN3
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#define BOARD_APP_CAN_IRQn IRQn_MCAN3
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/*
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* timer for board delay
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*/
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#define BOARD_DELAY_TIMER (HPM_GPTMR3)
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#define BOARD_DELAY_TIMER_CH 0
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#define BOARD_DELAY_TIMER_CLK_NAME (clock_gptmr3)
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#define BOARD_CALLBACK_TIMER (HPM_GPTMR3)
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#define BOARD_CALLBACK_TIMER_CH 1
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#define BOARD_CALLBACK_TIMER_IRQ IRQn_GPTMR3
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#define BOARD_CALLBACK_TIMER_CLK_NAME (clock_gptmr3)
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#define BOARD_CPU_FREQ (500000000UL)
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/* LED */
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#define BOARD_R_GPIO_CTRL HPM_GPIO0
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#define BOARD_R_GPIO_INDEX GPIO_DI_GPIOF
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#define BOARD_R_GPIO_PIN 1
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#define BOARD_G_GPIO_CTRL HPM_GPIO0
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#define BOARD_G_GPIO_INDEX GPIO_DI_GPIOF
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#define BOARD_G_GPIO_PIN 2
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#define BOARD_B_GPIO_CTRL HPM_GPIO0
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#define BOARD_B_GPIO_INDEX GPIO_DI_GPIOF
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#define BOARD_B_GPIO_PIN 5
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#define BOARD_RGB_RED 0
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#define BOARD_RGB_GREEN (BOARD_RGB_RED + 1)
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#define BOARD_RGB_BLUE (BOARD_RGB_RED + 2)
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#define BOARD_LED_GPIO_CTRL BOARD_G_GPIO_CTRL
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#define BOARD_LED_GPIO_INDEX BOARD_G_GPIO_INDEX
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#define BOARD_LED_GPIO_PIN BOARD_G_GPIO_PIN
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#define BOARD_LED_OFF_LEVEL 0
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#define BOARD_LED_ON_LEVEL !BOARD_LED_OFF_LEVEL
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#define BOARD_LED_TOGGLE_RGB 1
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/* Key */
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#define BOARD_APP_GPIO_INDEX GPIO_DI_GPIOF
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#define BOARD_APP_GPIO_PIN 6
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/* ACMP desction */
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#define BOARD_ACMP 0
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#define BOARD_ACMP_CHANNEL ACMP_CHANNEL_CHN1
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#define BOARD_ACMP_IRQ 0
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#define BOARD_ACMP_PLUS_INPUT ACMP_INPUT_DAC_OUT /* use internal DAC */
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#define BOARD_ACMP_MINUS_INPUT ACMP_INPUT_ANALOG_6 /* align with used pin */
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#define BOARD_GWC_BASE HPM_GWC0
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#define BOARD_GWC_FUNC_IRQ IRQn_GWCK0_FUNC
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#define BOARD_GWC_ERR_IRQ IRQn_GWCK0_ERR
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#define BOARD_GWC_PIXEL_WIDTH 1920
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#define BOARD_GWC_PIXEL_HEIGHT 1080
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/* lcd section */
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#define BOARD_LCD_BASE HPM_LCDC
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#define BOARD_LCD_IRQ IRQn_LCDC
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#define clock_display clock_lcd0
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#ifndef BOARD_LCD_WIDTH
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#define BOARD_LCD_WIDTH PANEL_SIZE_WIDTH
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#endif
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#ifndef BOARD_LCD_HEIGHT
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#define BOARD_LCD_HEIGHT PANEL_SIZE_HEIGHT
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#endif
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/* pdma section */
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#define BOARD_PDMA_BASE HPM_PDMA
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#ifndef IRQn_PDMA_D0
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#define IRQn_PDMA_D0 IRQn_PDMA
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#endif
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#ifndef BOARD_SHOW_CLOCK
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#define BOARD_SHOW_CLOCK 1
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#endif
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#ifndef BOARD_SHOW_BANNER
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#define BOARD_SHOW_BANNER 1
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#endif
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/* USB */
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#define BOARD_USB HPM_USB0
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/* FreeRTOS Definitions */
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#define BOARD_FREERTOS_TIMER HPM_GPTMR2
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#define BOARD_FREERTOS_TIMER_CHANNEL 1
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#define BOARD_FREERTOS_TIMER_IRQ IRQn_GPTMR2
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#define BOARD_FREERTOS_TIMER_CLK_NAME clock_gptmr2
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/* Threadx Definitions */
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#define BOARD_THREADX_TIMER HPM_GPTMR2
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#define BOARD_THREADX_TIMER_CHANNEL 1
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#define BOARD_THREADX_TIMER_IRQ IRQn_GPTMR2
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#define BOARD_THREADX_TIMER_CLK_NAME clock_gptmr2
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/* SDXC section */
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#define BOARD_APP_SDCARD_SDXC_BASE (HPM_SDXC1)
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#define BOARD_APP_SDCARD_SUPPORT_3V3 (1)
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#define BOARD_APP_SDCARD_SUPPORT_1V8 (1)
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#define BOARD_APP_SDCARD_SUPPORT_4BIT (1)
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#define BOARD_APP_SDCARD_SUPPORT_CARD_DETECTION (1)
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#define BOARD_APP_SDCARD_SUPPORT_POWER_SWITCH (1)
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#define BOARD_APP_SDCARD_SUPPORT_VOLTAGE_SWITCH (1)
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#define BOARD_APP_SDCARD_CARD_DETECTION_USING_GPIO (1)
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#define BOARD_APP_SDCARD_POWER_SWITCH_USING_GPIO (1)
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#define BOARD_APP_SDCARD_VOLTAGE_SWITCH_USING_GPIO (1)
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#if BOARD_APP_SDCARD_CARD_DETECTION_USING_GPIO
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#define BOARD_APP_SDCARD_CARD_DETECTION_PIN IOC_PAD_PD05
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#define BOARD_APP_SDCARD_CARD_DETECTION_PIN_POL (1) /* pin value 0 means card was detected*/
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#endif
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#ifdef BOARD_APP_SDCARD_POWER_SWITCH_USING_GPIO
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#define BOARD_APP_SDCARD_POWER_SWITCH_PIN IOC_PAD_PD07
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#endif
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#ifdef BOARD_APP_SDCARD_VOLTAGE_SWITCH_USING_GPIO
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#define BOARD_APP_SDCARD_VSEL_PIN IOC_PAD_PD12
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#endif
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#define BOARD_APP_EMMC_SDXC_BASE (HPM_SDXC0)
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#define BOARD_APP_EMMC_SUPPORT_3V3 (0)
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#define BOARD_APP_EMMC_SUPPORT_1V8 (1)
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#define BOARD_APP_EMMC_SUPPORT_4BIT (1)
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#define BOARD_APP_EMMC_SUPPORT_8BIT (1)
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#define BOARD_APP_EMMC_SUPPORT_DS (1)
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#define BOARD_APP_EMMC_HOST_USING_IRQ (0)
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/* enet section */
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#define BOARD_ENET_COUNT (1U)
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#define BOARD_ENET_PPS HPM_ENET0
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#define BOARD_ENET_PPS_IDX enet_pps_0
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#define BOARD_ENET_PPS_PTP_CLOCK clock_ptp0
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#define BOARD_ENET_RGMII_PHY_ITF enet_inf_rgmii
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#define BOARD_ENET_RGMII_RST_GPIO HPM_GPIO0
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#define BOARD_ENET_RGMII_RST_GPIO_INDEX GPIO_DO_GPIOD
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#define BOARD_ENET_RGMII_RST_GPIO_PIN (18U)
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#define BOARD_ENET_RGMII HPM_ENET0
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#define BOARD_ENET_RGMII_TX_DLY (0U)
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#define BOARD_ENET_RGMII_RX_DLY (0U)
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#define BOARD_ENET_RGMII_PTP_CLOCK clock_ptp0
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#define BOARD_ENET_RGMII_PPS0_PINOUT (1)
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#define BOARD_ENET0_INF (1U) /* 0: RMII, 1: RGMII */
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#define BOARD_ENET0_INT_REF_CLK (0U)
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#define BOARD_ENET0_PHY_RST_TIME (30)
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#if BOARD_ENET0_INF
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#define BOARD_ENET0_TX_DLY (0U)
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#define BOARD_ENET0_RX_DLY (0U)
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#endif
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#if __USE_ENET_PTP
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#define BOARD_ENET0_PTP_CLOCK (clock_ptp0)
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#endif
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/* dram section */
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#define DDR_TYPE_DDR2 (0U)
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#define DDR_TYPE_DDR3L (1U)
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#define BOARD_DDR_TYPE DDR_TYPE_DDR3L
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#define BOARD_SDRAM_ADDRESS (0x40000000UL)
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#if (BOARD_DDR_TYPE == DDR_TYPE_DDR2)
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#define BOARD_SDRAM_SIZE (256UL * 1024UL * 1024UL)
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#else
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#define BOARD_SDRAM_SIZE (512UL * 1024UL * 1024UL)
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#endif
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/* Tamper Section */
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#define BOARD_TAMP_ACTIVE_CH 4
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#define BOARD_TAMP_LOW_LEVEL_CH 6
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#if defined(__cplusplus)
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extern "C" {
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#endif /* __cplusplus */
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typedef void (*board_timer_cb)(void);
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void board_init(void);
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void board_init_console(void);
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void board_init_uart(UART_Type *ptr);
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void board_init_i2c(I2C_Type *ptr);
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void board_init_can(MCAN_Type *ptr);
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void board_init_gpio_pins(void);
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void board_init_spi_pins(SPI_Type *ptr);
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void board_init_spi_pins_with_gpio_as_cs(SPI_Type *ptr);
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void board_write_spi_cs(uint32_t pin, uint8_t state);
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uint8_t board_get_led_gpio_off_level(void);
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void board_init_led_pins(void);
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void board_disable_output_rgb_led(uint8_t color);
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void board_enable_output_rgb_led(uint8_t color);
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void board_led_write(uint8_t state);
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void board_led_toggle(void);
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/* Initialize SoC overall clocks */
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void board_init_clock(void);
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uint32_t board_init_spi_clock(SPI_Type *ptr);
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uint32_t board_init_can_clock(MCAN_Type *ptr);
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void board_init_enet_pps_pins(ENET_Type *ptr);
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uint8_t board_get_enet_dma_pbl(ENET_Type *ptr);
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hpm_stat_t board_reset_enet_phy(ENET_Type *ptr);
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hpm_stat_t board_init_enet_pins(ENET_Type *ptr);
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hpm_stat_t board_init_enet_rmii_reference_clock(ENET_Type *ptr, bool internal);
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hpm_stat_t board_init_enet_rgmii_clock_delay(ENET_Type *ptr);
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hpm_stat_t board_init_enet_ptp_clock(ENET_Type *ptr);
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hpm_stat_t board_enable_enet_irq(ENET_Type *ptr);
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hpm_stat_t board_disable_enet_irq(ENET_Type *ptr);
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/*
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* @brief Initialize PMP and PMA for but not limited to the following purposes:
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* -- non-cacheable memory initialization
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*/
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void board_init_pmp(void);
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void board_delay_us(uint32_t us);
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void board_delay_ms(uint32_t ms);
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void board_timer_create(uint32_t ms, board_timer_cb cb);
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void board_ungate_mchtmr_at_lp_mode(void);
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/* Initialize the UART clock */
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uint32_t board_init_uart_clock(UART_Type *ptr);
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void board_lcd_backlight(bool is_on);
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void board_init_lcd(void);
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void board_panel_para_to_lcdc(lcdc_config_t *config);
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void board_init_gwc(void);
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void board_init_cap_touch(void);
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void board_init_usb_pins(void);
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void board_usb_vbus_ctrl(uint8_t usb_index, uint8_t level);
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void board_init_sd_pins(SDXC_Type *ptr);
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uint32_t board_sd_configure_clock(SDXC_Type *ptr, uint32_t freq, bool need_inverse);
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void board_sd_switch_pins_to_1v8(SDXC_Type *ptr);
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bool board_sd_detect_card(SDXC_Type *ptr);
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uint32_t board_init_dao_clock(void);
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uint32_t board_init_pdm_clock(void);
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uint32_t board_init_i2s_clock(I2S_Type *ptr);
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uint32_t board_config_i2s_clock(I2S_Type *ptr, uint32_t sample_rate);
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void board_init_adc16_pins(void);
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uint32_t board_init_adc16_clock(ADC16_Type *ptr, bool clk_src_ahb);
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void board_init_cam_pins(void);
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void board_write_cam_rst(uint8_t state);
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void board_write_cam_pwdn(uint8_t state);
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uint32_t board_init_cam_clock(CAM_Type *ptr);
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void board_init_mipi_csi_cam_pins(void);
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void board_write_mipi_csi_cam_rst(uint8_t state);
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uint32_t board_init_gptmr_clock(GPTMR_Type *ptr);
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void board_sd_power_switch(SDXC_Type *ptr, bool on_off);
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#if defined(__cplusplus)
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}
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#endif /* __cplusplus */
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#endif /* _HPM_BOARD_H */
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