741 lines
20 KiB
C
741 lines
20 KiB
C
/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2019-07-10 Ernest 1st version
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* 2020-10-14 Dozingfiretruck Porting for stm32wbxx
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* 2020-11-26 thread-liu add hash
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* 2020-11-26 thread-liu add cryp
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* 2020-12-11 WKJay fix build problem
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*/
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#include <rtdevice.h>
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#include <stdlib.h>
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#include <string.h>
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#include "drv_crypto.h"
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#include <board.h>
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#include "drv_config.h"
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struct stm32_hwcrypto_device
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{
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struct rt_hwcrypto_device dev;
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struct rt_mutex mutex;
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};
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#if defined(BSP_USING_CRC)
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#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32WB) || defined(SOC_SERIES_STM32MP1)
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static struct hwcrypto_crc_cfg crc_backup_cfg;
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static int reverse_bit(rt_uint32_t n)
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{
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n = ((n >> 1) & 0x55555555) | ((n << 1) & 0xaaaaaaaa);
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n = ((n >> 2) & 0x33333333) | ((n << 2) & 0xcccccccc);
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n = ((n >> 4) & 0x0f0f0f0f) | ((n << 4) & 0xf0f0f0f0);
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n = ((n >> 8) & 0x00ff00ff) | ((n << 8) & 0xff00ff00);
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n = ((n >> 16) & 0x0000ffff) | ((n << 16) & 0xffff0000);
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return n;
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}
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#endif /* defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7) */
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static rt_uint32_t _crc_update(struct hwcrypto_crc *ctx, const rt_uint8_t *in, rt_size_t length)
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{
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rt_uint32_t result = 0;
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struct stm32_hwcrypto_device *stm32_hw_dev = (struct stm32_hwcrypto_device *)ctx->parent.device->user_data;
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#if defined(SOC_SERIES_STM32L4)|| defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32WB) || defined(SOC_SERIES_STM32MP1)
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CRC_HandleTypeDef *HW_TypeDef = (CRC_HandleTypeDef *)(ctx->parent.contex);
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#endif
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rt_mutex_take(&stm32_hw_dev->mutex, RT_WAITING_FOREVER);
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#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32WB) || defined(SOC_SERIES_STM32MP1)
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if (memcmp(&crc_backup_cfg, &ctx->crc_cfg, sizeof(struct hwcrypto_crc_cfg)) != 0)
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{
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if (HW_TypeDef->Init.DefaultPolynomialUse == DEFAULT_POLYNOMIAL_DISABLE)
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{
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HW_TypeDef->Init.GeneratingPolynomial = ctx ->crc_cfg.poly;
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}
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else
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{
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HW_TypeDef->Init.GeneratingPolynomial = DEFAULT_CRC32_POLY;
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}
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switch (ctx ->crc_cfg.flags)
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{
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case 0:
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HW_TypeDef->Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_NONE;
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HW_TypeDef->Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_DISABLE;
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break;
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case CRC_FLAG_REFIN:
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HW_TypeDef->Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_BYTE;
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break;
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case CRC_FLAG_REFOUT:
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HW_TypeDef->Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_ENABLE;
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break;
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case CRC_FLAG_REFIN|CRC_FLAG_REFOUT:
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HW_TypeDef->Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_BYTE;
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HW_TypeDef->Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_ENABLE;
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break;
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default :
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goto _exit;
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}
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switch(ctx ->crc_cfg.width)
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{
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#if defined(CRC_POLYLENGTH_7B) && defined(CRC_POLYLENGTH_8B) && defined(CRC_POLYLENGTH_16B) && defined(CRC_POLYLENGTH_32B)
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case 7:
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HW_TypeDef->Init.CRCLength = CRC_POLYLENGTH_7B;
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break;
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case 8:
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HW_TypeDef->Init.CRCLength = CRC_POLYLENGTH_8B;
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break;
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case 16:
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HW_TypeDef->Init.CRCLength = CRC_POLYLENGTH_16B;
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break;
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case 32:
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HW_TypeDef->Init.CRCLength = CRC_POLYLENGTH_32B;
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break;
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default :
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goto _exit;
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#else
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case 32:
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HW_TypeDef->Init.CRCLength = CRC_POLYLENGTH_32B;
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break;
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default :
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goto _exit;
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#endif /* defined(CRC_POLYLENGTH_7B) && defined(CRC_POLYLENGTH_8B) && defined(CRC_POLYLENGTH_16B) && defined(CRC_POLYLENGTH_32B) */
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}
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if (HW_TypeDef->Init.DefaultInitValueUse == DEFAULT_INIT_VALUE_DISABLE)
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{
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HW_TypeDef->Init.InitValue = ctx ->crc_cfg.last_val;
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}
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if (HAL_CRC_Init(HW_TypeDef) != HAL_OK)
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{
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goto _exit;
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}
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memcpy(&crc_backup_cfg, &ctx->crc_cfg, sizeof(struct hwcrypto_crc_cfg));
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}
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if (HAL_CRC_STATE_READY != HAL_CRC_GetState(HW_TypeDef))
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{
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goto _exit;
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}
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#else
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if (ctx->crc_cfg.flags != 0 || ctx->crc_cfg.last_val != 0xFFFFFFFF || ctx->crc_cfg.xorout != 0 || length % 4 != 0)
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{
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goto _exit;
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}
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length /= 4;
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#endif /* defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7) */
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result = HAL_CRC_Accumulate(ctx->parent.contex, (rt_uint32_t *)in, length);
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#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32WB) || defined(SOC_SERIES_STM32MP1)
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if (HW_TypeDef->Init.OutputDataInversionMode)
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{
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ctx ->crc_cfg.last_val = reverse_bit(result);
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}
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else
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{
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ctx ->crc_cfg.last_val = result;
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}
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crc_backup_cfg.last_val = ctx ->crc_cfg.last_val;
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result = (result ? result ^ (ctx ->crc_cfg.xorout) : result);
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#endif /* defined(SOC_SERIES_STM32L4)|| defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7) */
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_exit:
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rt_mutex_release(&stm32_hw_dev->mutex);
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return result;
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}
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static const struct hwcrypto_crc_ops crc_ops =
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{
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.update = _crc_update,
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};
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#endif /* BSP_USING_CRC */
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#if defined(BSP_USING_RNG)
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static rt_uint32_t _rng_rand(struct hwcrypto_rng *ctx)
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{
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rt_uint32_t gen_random = 0;
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RNG_HandleTypeDef *HW_TypeDef = (RNG_HandleTypeDef *)(ctx->parent.contex);
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if (HAL_OK == HAL_RNG_GenerateRandomNumber(HW_TypeDef, &gen_random))
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{
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return gen_random ;
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}
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return 0;
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}
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static const struct hwcrypto_rng_ops rng_ops =
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{
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.update = _rng_rand,
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};
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#endif /* BSP_USING_RNG */
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#if defined(BSP_USING_HASH)
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static rt_err_t _hash_update(struct hwcrypto_hash *ctx, const rt_uint8_t *in, rt_size_t length)
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{
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rt_uint32_t tickstart = 0;
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rt_uint32_t result = RT_EOK;
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struct stm32_hwcrypto_device *stm32_hw_dev = (struct stm32_hwcrypto_device *)ctx->parent.device->user_data;
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rt_mutex_take(&stm32_hw_dev->mutex, RT_WAITING_FOREVER);
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#if defined(SOC_SERIES_STM32MP1)
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HASH_HandleTypeDef *HW_TypeDef = (HASH_HandleTypeDef *)(ctx->parent.contex);
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/* Start HASH computation using DMA transfer */
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switch (ctx->parent.type)
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{
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case HWCRYPTO_TYPE_SHA224:
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result = HAL_HASHEx_SHA224_Start_DMA(HW_TypeDef, (uint8_t *)in, length);
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break;
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case HWCRYPTO_TYPE_SHA256:
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result = HAL_HASHEx_SHA256_Start_DMA(HW_TypeDef, (uint8_t *)in, length);
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break;
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case HWCRYPTO_TYPE_MD5:
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result = HAL_HASH_MD5_Start_DMA(HW_TypeDef, (uint8_t *)in, length);
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break;
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case HWCRYPTO_TYPE_SHA1:
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result = HAL_HASH_SHA1_Start_DMA(HW_TypeDef, (uint8_t *)in, length);
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break;
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default :
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rt_kprintf("not support hash type: %x", ctx->parent.type);
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break;
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}
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if (result != HAL_OK)
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{
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goto _exit;
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}
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/* Wait for DMA transfer to complete */
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tickstart = rt_tick_get();
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while (HAL_HASH_GetState(HW_TypeDef) == HAL_HASH_STATE_BUSY)
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{
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if (rt_tick_get() - tickstart > 0xFFFF)
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{
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result = -RT_ETIMEOUT;
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goto _exit;
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}
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}
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#endif
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_exit:
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rt_mutex_release(&stm32_hw_dev->mutex);
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return result;
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}
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static rt_err_t _hash_finish(struct hwcrypto_hash *ctx, rt_uint8_t *out, rt_size_t length)
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{
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rt_uint32_t result = RT_EOK;
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struct stm32_hwcrypto_device *stm32_hw_dev = (struct stm32_hwcrypto_device *)ctx->parent.device->user_data;
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rt_mutex_take(&stm32_hw_dev->mutex, RT_WAITING_FOREVER);
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#if defined(SOC_SERIES_STM32MP1)
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HASH_HandleTypeDef *HW_TypeDef = (HASH_HandleTypeDef *)(ctx->parent.contex);
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/* Get the computed digest value */
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switch (ctx->parent.type)
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{
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case HWCRYPTO_TYPE_SHA224:
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result = HAL_HASHEx_SHA224_Finish(HW_TypeDef, (uint8_t *)out, length);
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break;
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case HWCRYPTO_TYPE_SHA256:
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result = HAL_HASHEx_SHA256_Finish(HW_TypeDef, (uint8_t *)out, length);
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break;
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case HWCRYPTO_TYPE_MD5:
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result = HAL_HASH_MD5_Finish(HW_TypeDef, (uint8_t *)out, length);
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break;
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case HWCRYPTO_TYPE_SHA1:
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result = HAL_HASH_SHA1_Finish(HW_TypeDef, (uint8_t *)out, length);
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break;
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default :
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rt_kprintf("not support hash type: %x", ctx->parent.type);
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break;
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}
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if (result != HAL_OK)
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{
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goto _exit;
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}
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#endif
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_exit:
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rt_mutex_release(&stm32_hw_dev->mutex);
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return result;
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}
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static const struct hwcrypto_hash_ops hash_ops =
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{
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.update = _hash_update,
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.finish = _hash_finish
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};
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#endif /* BSP_USING_HASH */
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#if defined(BSP_USING_CRYP)
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static rt_err_t _cryp_crypt(struct hwcrypto_symmetric *ctx,
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struct hwcrypto_symmetric_info *info)
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{
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rt_uint32_t result = RT_EOK;
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rt_uint32_t tickstart = 0;
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struct stm32_hwcrypto_device *stm32_hw_dev = (struct stm32_hwcrypto_device *)ctx->parent.device->user_data;
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rt_mutex_take(&stm32_hw_dev->mutex, RT_WAITING_FOREVER);
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#if defined(SOC_SERIES_STM32MP1)
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CRYP_HandleTypeDef *HW_TypeDef = (CRYP_HandleTypeDef *)(ctx->parent.contex);
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switch (ctx->parent.type)
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{
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case HWCRYPTO_TYPE_AES_ECB:
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HW_TypeDef->Init.Algorithm = CRYP_AES_ECB;
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break;
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case HWCRYPTO_TYPE_AES_CBC:
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HW_TypeDef->Init.Algorithm = CRYP_AES_CBC;
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break;
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case HWCRYPTO_TYPE_AES_CTR:
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HW_TypeDef->Init.Algorithm = CRYP_AES_CTR;
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break;
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case HWCRYPTO_TYPE_DES_ECB:
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HW_TypeDef->Init.Algorithm = CRYP_DES_ECB;
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break;
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case HWCRYPTO_TYPE_DES_CBC:
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HW_TypeDef->Init.Algorithm = CRYP_DES_CBC;
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break;
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default :
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rt_kprintf("not support cryp type: %x", ctx->parent.type);
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break;
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}
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HAL_CRYP_DeInit(HW_TypeDef);
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HW_TypeDef->Init.DataType = CRYP_DATATYPE_8B;
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HW_TypeDef->Init.DataWidthUnit = CRYP_DATAWIDTHUNIT_BYTE;
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HW_TypeDef->Init.KeySize = CRYP_KEYSIZE_128B;
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HW_TypeDef->Init.pKey = (uint32_t*)ctx->key;
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result = HAL_CRYP_Init(HW_TypeDef);
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if (result != HAL_OK)
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{
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/* Initialization Error */
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goto _exit;
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}
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if (info->mode == HWCRYPTO_MODE_ENCRYPT)
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{
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result = HAL_CRYP_Encrypt_DMA(HW_TypeDef, (uint32_t *)info->in, info->length, (uint32_t *)info->out);
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}
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else if (info->mode == HWCRYPTO_MODE_DECRYPT)
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{
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result = HAL_CRYP_Decrypt_DMA(HW_TypeDef, (uint32_t *)info->in, info->length, (uint32_t *)info->out);
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}
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else
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{
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rt_kprintf("error cryp mode : %02x!\n", info->mode);
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result = -RT_ERROR;
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goto _exit;
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}
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if (result != HAL_OK)
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{
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goto _exit;
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}
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tickstart = rt_tick_get();
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while (HAL_CRYP_GetState(HW_TypeDef) != HAL_CRYP_STATE_READY)
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{
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if (rt_tick_get() - tickstart > 0xFFFF)
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{
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result = -RT_ETIMEOUT;
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goto _exit;
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}
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}
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#endif
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if (result != HAL_OK)
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{
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goto _exit;
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}
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_exit:
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rt_mutex_release(&stm32_hw_dev->mutex);
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return result;
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}
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static const struct hwcrypto_symmetric_ops cryp_ops =
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{
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.crypt = _cryp_crypt
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};
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#endif
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static rt_err_t _crypto_create(struct rt_hwcrypto_ctx *ctx)
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{
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rt_err_t res = RT_EOK;
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switch (ctx->type & HWCRYPTO_MAIN_TYPE_MASK)
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{
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#if defined(BSP_USING_RNG)
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case HWCRYPTO_TYPE_RNG:
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{
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__HAL_RCC_RNG_CLK_ENABLE();
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RNG_HandleTypeDef *hrng = rt_calloc(1, sizeof(RNG_HandleTypeDef));
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if (RT_NULL == hrng)
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{
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res = -RT_ERROR;
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break;
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}
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#if defined(SOC_SERIES_STM32MP1)
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hrng->Instance = RNG2;
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#else
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hrng->Instance = RNG;
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#endif
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HAL_RNG_Init(hrng);
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ctx->contex = hrng;
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((struct hwcrypto_rng *)ctx)->ops = &rng_ops;
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break;
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}
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#endif /* BSP_USING_RNG */
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|
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#if defined(BSP_USING_CRC)
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case HWCRYPTO_TYPE_CRC:
|
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{
|
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CRC_HandleTypeDef *hcrc = rt_calloc(1, sizeof(CRC_HandleTypeDef));
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if (RT_NULL == hcrc)
|
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{
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res = -RT_ERROR;
|
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break;
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}
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#if defined(SOC_SERIES_STM32MP1)
|
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hcrc->Instance = CRC2;
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#else
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hcrc->Instance = CRC;
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#endif
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#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32WB) || defined(SOC_SERIES_STM32MP1)
|
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hcrc->Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_DISABLE;
|
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hcrc->Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_DISABLE;
|
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hcrc->Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_BYTE;
|
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hcrc->Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_ENABLE;
|
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hcrc->InputDataFormat = CRC_INPUTDATA_FORMAT_BYTES;
|
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#else
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if (HAL_CRC_Init(hcrc) != HAL_OK)
|
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{
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res = -RT_ERROR;
|
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}
|
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#endif /* defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7) */
|
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ctx->contex = hcrc;
|
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((struct hwcrypto_crc *)ctx)->ops = &crc_ops;
|
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|
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break;
|
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}
|
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#endif /* BSP_USING_CRC */
|
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|
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#if defined(BSP_USING_HASH)
|
|
case HWCRYPTO_TYPE_MD5:
|
|
case HWCRYPTO_TYPE_SHA1:
|
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case HWCRYPTO_TYPE_SHA2:
|
|
{
|
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HASH_HandleTypeDef *hash = rt_calloc(1, sizeof(HASH_HandleTypeDef));
|
|
if (RT_NULL == hash)
|
|
{
|
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res = -RT_ERROR;
|
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break;
|
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}
|
|
#if defined(SOC_SERIES_STM32MP1)
|
|
/* enable dma for hash */
|
|
__HAL_RCC_DMA2_CLK_ENABLE();
|
|
HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 2, 0);
|
|
HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn);
|
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|
|
hash->Init.DataType = HASH_DATATYPE_8B;
|
|
if (HAL_HASH_Init(hash) != HAL_OK)
|
|
{
|
|
res = -RT_ERROR;
|
|
}
|
|
#endif
|
|
ctx->contex = hash;
|
|
((struct hwcrypto_hash *)ctx)->ops = &hash_ops;
|
|
|
|
break;
|
|
}
|
|
#endif /* BSP_USING_HASH */
|
|
|
|
#if defined(BSP_USING_CRYP)
|
|
case HWCRYPTO_TYPE_AES:
|
|
case HWCRYPTO_TYPE_DES:
|
|
case HWCRYPTO_TYPE_3DES:
|
|
case HWCRYPTO_TYPE_RC4:
|
|
case HWCRYPTO_TYPE_GCM:
|
|
{
|
|
CRYP_HandleTypeDef *cryp = rt_calloc(1, sizeof(CRYP_HandleTypeDef));
|
|
if (RT_NULL == cryp)
|
|
{
|
|
res = -RT_ERROR;
|
|
break;
|
|
}
|
|
#if defined(SOC_SERIES_STM32MP1)
|
|
cryp->Instance = CRYP2;
|
|
/* enable dma for cryp */
|
|
__HAL_RCC_DMA2_CLK_ENABLE();
|
|
|
|
HAL_NVIC_SetPriority(DMA2_Stream5_IRQn, 2, 0);
|
|
HAL_NVIC_EnableIRQ(DMA2_Stream5_IRQn);
|
|
|
|
HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 2, 0);
|
|
HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn);
|
|
|
|
if (HAL_CRYP_Init(cryp) != HAL_OK)
|
|
{
|
|
res = -RT_ERROR;
|
|
}
|
|
#endif
|
|
ctx->contex = cryp;
|
|
((struct hwcrypto_symmetric *)ctx)->ops = &cryp_ops;
|
|
|
|
break;
|
|
}
|
|
#endif /* BSP_USING_CRYP */
|
|
|
|
default:
|
|
res = -RT_ERROR;
|
|
break;
|
|
}
|
|
return res;
|
|
}
|
|
|
|
static void _crypto_destroy(struct rt_hwcrypto_ctx *ctx)
|
|
{
|
|
switch (ctx->type & HWCRYPTO_MAIN_TYPE_MASK)
|
|
{
|
|
#if defined(BSP_USING_RNG)
|
|
case HWCRYPTO_TYPE_RNG:
|
|
break;
|
|
#endif /* BSP_USING_RNG */
|
|
|
|
#if defined(BSP_USING_CRC)
|
|
case HWCRYPTO_TYPE_CRC:
|
|
__HAL_CRC_DR_RESET((CRC_HandleTypeDef *)ctx-> contex);
|
|
HAL_CRC_DeInit((CRC_HandleTypeDef *)(ctx->contex));
|
|
break;
|
|
#endif /* BSP_USING_CRC */
|
|
|
|
#if defined(BSP_USING_HASH)
|
|
case HWCRYPTO_TYPE_MD5:
|
|
case HWCRYPTO_TYPE_SHA1:
|
|
case HWCRYPTO_TYPE_SHA2:
|
|
__HAL_HASH_RESET_HANDLE_STATE((HASH_HandleTypeDef *)(ctx->contex));
|
|
HAL_HASH_DeInit((HASH_HandleTypeDef *)(ctx->contex));
|
|
break;
|
|
#endif /* BSP_USING_HASH */
|
|
|
|
#if defined(BSP_USING_CRYP)
|
|
case HWCRYPTO_TYPE_AES:
|
|
case HWCRYPTO_TYPE_DES:
|
|
case HWCRYPTO_TYPE_3DES:
|
|
case HWCRYPTO_TYPE_RC4:
|
|
case HWCRYPTO_TYPE_GCM:
|
|
HAL_CRYP_DeInit((CRYP_HandleTypeDef *)(ctx->contex));
|
|
break;
|
|
#endif /* BSP_USING_CRYP */
|
|
|
|
default:
|
|
break;
|
|
}
|
|
|
|
rt_free(ctx->contex);
|
|
}
|
|
|
|
static rt_err_t _crypto_clone(struct rt_hwcrypto_ctx *des, const struct rt_hwcrypto_ctx *src)
|
|
{
|
|
rt_err_t res = RT_EOK;
|
|
|
|
switch (src->type & HWCRYPTO_MAIN_TYPE_MASK)
|
|
{
|
|
#if defined(BSP_USING_RNG)
|
|
case HWCRYPTO_TYPE_RNG:
|
|
if (des->contex && src->contex)
|
|
{
|
|
rt_memcpy(des->contex, src->contex, sizeof(RNG_HandleTypeDef));
|
|
}
|
|
break;
|
|
#endif /* BSP_USING_RNG */
|
|
|
|
#if defined(BSP_USING_CRC)
|
|
case HWCRYPTO_TYPE_CRC:
|
|
if (des->contex && src->contex)
|
|
{
|
|
rt_memcpy(des->contex, src->contex, sizeof(CRC_HandleTypeDef));
|
|
}
|
|
break;
|
|
#endif /* BSP_USING_CRC */
|
|
|
|
#if defined(BSP_USING_HASH)
|
|
case HWCRYPTO_TYPE_MD5:
|
|
case HWCRYPTO_TYPE_SHA1:
|
|
case HWCRYPTO_TYPE_SHA2:
|
|
if (des->contex && src->contex)
|
|
{
|
|
rt_memcpy(des->contex, src->contex, sizeof(HASH_HandleTypeDef));
|
|
}
|
|
break;
|
|
#endif /* BSP_USING_HASH */
|
|
|
|
#if defined(BSP_USING_CRYP)
|
|
case HWCRYPTO_TYPE_AES:
|
|
case HWCRYPTO_TYPE_DES:
|
|
case HWCRYPTO_TYPE_3DES:
|
|
case HWCRYPTO_TYPE_RC4:
|
|
case HWCRYPTO_TYPE_GCM:
|
|
if (des->contex && src->contex)
|
|
{
|
|
rt_memcpy(des->contex, src->contex, sizeof(CRYP_HandleTypeDef));
|
|
}
|
|
break;
|
|
#endif /* BSP_USING_CRYP */
|
|
|
|
default:
|
|
res = -RT_ERROR;
|
|
break;
|
|
}
|
|
return res;
|
|
}
|
|
|
|
static void _crypto_reset(struct rt_hwcrypto_ctx *ctx)
|
|
{
|
|
switch (ctx->type & HWCRYPTO_MAIN_TYPE_MASK)
|
|
{
|
|
#if defined(BSP_USING_RNG)
|
|
case HWCRYPTO_TYPE_RNG:
|
|
break;
|
|
#endif /* BSP_USING_RNG */
|
|
|
|
#if defined(BSP_USING_CRC)
|
|
case HWCRYPTO_TYPE_CRC:
|
|
__HAL_CRC_DR_RESET((CRC_HandleTypeDef *)ctx-> contex);
|
|
break;
|
|
#endif /* BSP_USING_CRC */
|
|
|
|
#if defined(BSP_USING_HASH)
|
|
case HWCRYPTO_TYPE_MD5:
|
|
case HWCRYPTO_TYPE_SHA1:
|
|
case HWCRYPTO_TYPE_SHA2:
|
|
__HAL_HASH_RESET_HANDLE_STATE((HASH_HandleTypeDef *)(ctx->contex));
|
|
break;
|
|
#endif /* BSP_USING_HASH*/
|
|
|
|
#if defined(BSP_USING_CRYP)
|
|
case HWCRYPTO_TYPE_AES:
|
|
case HWCRYPTO_TYPE_DES:
|
|
case HWCRYPTO_TYPE_3DES:
|
|
case HWCRYPTO_TYPE_RC4:
|
|
case HWCRYPTO_TYPE_GCM:
|
|
break;
|
|
#endif /* BSP_USING_CRYP */
|
|
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
|
|
#if defined(HASH2_IN_DMA_INSTANCE)
|
|
void HASH2_DMA_IN_IRQHandler(void)
|
|
{
|
|
extern DMA_HandleTypeDef hdma_hash_in;
|
|
|
|
/* enter interrupt */
|
|
rt_interrupt_enter();
|
|
|
|
HAL_DMA_IRQHandler(&hdma_hash_in);
|
|
|
|
/* leave interrupt */
|
|
rt_interrupt_leave();
|
|
}
|
|
#endif
|
|
|
|
#if defined(CRYP2_IN_DMA_INSTANCE)
|
|
void CRYP2_DMA_IN_IRQHandler(void)
|
|
{
|
|
extern DMA_HandleTypeDef hdma_cryp_in;
|
|
|
|
/* enter interrupt */
|
|
rt_interrupt_enter();
|
|
|
|
HAL_DMA_IRQHandler(&hdma_cryp_in);
|
|
|
|
/* leave interrupt */
|
|
rt_interrupt_leave();
|
|
}
|
|
#endif
|
|
|
|
#if defined (CRYP2_OUT_DMA_INSTANCE)
|
|
void CRYP2_DMA_OUT_IRQHandler(void)
|
|
{
|
|
extern DMA_HandleTypeDef hdma_cryp_out;
|
|
|
|
/* enter interrupt */
|
|
rt_interrupt_enter();
|
|
|
|
HAL_DMA_IRQHandler(&hdma_cryp_out);
|
|
|
|
/* leave interrupt */
|
|
rt_interrupt_leave();
|
|
}
|
|
#endif
|
|
|
|
static const struct rt_hwcrypto_ops _ops =
|
|
{
|
|
.create = _crypto_create,
|
|
.destroy = _crypto_destroy,
|
|
.copy = _crypto_clone,
|
|
.reset = _crypto_reset,
|
|
};
|
|
|
|
int stm32_hw_crypto_device_init(void)
|
|
{
|
|
static struct stm32_hwcrypto_device _crypto_dev;
|
|
rt_uint32_t cpuid[3] = {0};
|
|
|
|
_crypto_dev.dev.ops = &_ops;
|
|
#if defined(BSP_USING_UDID)
|
|
|
|
#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
|
|
cpuid[0] = HAL_GetUIDw0();
|
|
cpuid[1] = HAL_GetUIDw1();
|
|
#elif defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32MP1)
|
|
cpuid[0] = HAL_GetREVID();
|
|
cpuid[1] = HAL_GetDEVID();
|
|
#endif
|
|
|
|
#endif /* BSP_USING_UDID */
|
|
|
|
_crypto_dev.dev.id = 0;
|
|
rt_memcpy(&_crypto_dev.dev.id, cpuid, 8);
|
|
|
|
_crypto_dev.dev.user_data = &_crypto_dev;
|
|
|
|
if (rt_hwcrypto_register(&_crypto_dev.dev, RT_HWCRYPTO_DEFAULT_NAME) != RT_EOK)
|
|
{
|
|
return -1;
|
|
}
|
|
rt_mutex_init(&_crypto_dev.mutex, RT_HWCRYPTO_DEFAULT_NAME, RT_IPC_FLAG_PRIO);
|
|
return 0;
|
|
}
|
|
INIT_DEVICE_EXPORT(stm32_hw_crypto_device_init);
|