219 lines
6.5 KiB
C
219 lines
6.5 KiB
C
/*
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* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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* Change Logs:
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* Date Author Notes
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* 2019-04-03 wangyq the first version
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* 2019-11-01 wangyq update libraries
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* 2021-04-20 liuhy the second version
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "board.h"
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#include "drv_adc.h"
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#ifdef RT_USING_ADC
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/* define adc instance */
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#ifdef BSP_USING_ADC0
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static struct rt_adc_device _device_adc0;
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#endif /*BSP_USING_ADC0*/
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#ifdef BSP_USING_ADC1
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static struct rt_adc_device _device_adc1;
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#endif /*BSP_USING_ADC1*/
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/* enable or disable adc */
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static rt_err_t es32f3_adc_enabled(struct rt_adc_device *device, rt_int8_t channel, rt_bool_t enabled)
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{
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ald_adc_handle_t *_hadc = (ald_adc_handle_t *)device->parent.user_data;
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RT_ASSERT(device != RT_NULL);
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if (enabled)
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{
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ALD_ADC_ENABLE(_hadc); ;
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}
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else
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{
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ALD_ADC_DISABLE(_hadc);
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}
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return RT_EOK;
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}
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static ald_adc_channel_t es32f3_adc_get_channel(rt_uint32_t channel)
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{
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ald_adc_channel_t es32f3_channel;
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ald_gpio_init_t gpio_initstruct;
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/* Initialize ADC pin */
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gpio_initstruct.mode = ALD_GPIO_MODE_CLOSE;
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gpio_initstruct.pupd = ALD_GPIO_FLOATING;
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gpio_initstruct.od = ALD_GPIO_PUSH_PULL;
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gpio_initstruct.odrv = ALD_GPIO_OUT_DRIVE_NORMAL;
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gpio_initstruct.flt = ALD_GPIO_FILTER_DISABLE;
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gpio_initstruct.type = ALD_GPIO_TYPE_CMOS;
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gpio_initstruct.func = ALD_GPIO_FUNC_0;
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/* select gpio pin as adc function */
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switch (channel)
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{
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case 0:
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es32f3_channel = ALD_ADC_CHANNEL_0;
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ald_gpio_init(ES_GPIO_ADC_CH0_GPIO, ES_GPIO_ADC_CH0_PIN, &gpio_initstruct);
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break;
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case 1:
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es32f3_channel = ALD_ADC_CHANNEL_1;
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ald_gpio_init(ES_GPIO_ADC_CH1_GPIO, ES_GPIO_ADC_CH1_PIN, &gpio_initstruct);
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break;
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case 2:
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es32f3_channel = ALD_ADC_CHANNEL_2;
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ald_gpio_init(ES_GPIO_ADC_CH2_GPIO, ES_GPIO_ADC_CH2_PIN, &gpio_initstruct);
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break;
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case 3:
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es32f3_channel = ALD_ADC_CHANNEL_3;
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ald_gpio_init(ES_GPIO_ADC_CH3_GPIO, ES_GPIO_ADC_CH3_PIN, &gpio_initstruct);
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break;
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case 4:
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es32f3_channel = ALD_ADC_CHANNEL_4;
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ald_gpio_init(ES_GPIO_ADC_CH4_GPIO, ES_GPIO_ADC_CH4_PIN, &gpio_initstruct);
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break;
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case 5:
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es32f3_channel = ALD_ADC_CHANNEL_5;
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ald_gpio_init(ES_GPIO_ADC_CH5_GPIO, ES_GPIO_ADC_CH5_PIN, &gpio_initstruct);
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break;
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case 6:
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es32f3_channel = ALD_ADC_CHANNEL_6;
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ald_gpio_init(ES_GPIO_ADC_CH6_GPIO, ES_GPIO_ADC_CH6_PIN, &gpio_initstruct);
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break;
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case 7:
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es32f3_channel = ALD_ADC_CHANNEL_7;
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ald_gpio_init(ES_GPIO_ADC_CH7_GPIO, ES_GPIO_ADC_CH7_PIN, &gpio_initstruct);
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break;
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case 8:
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es32f3_channel = ALD_ADC_CHANNEL_8;
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ald_gpio_init(ES_GPIO_ADC_CH8_GPIO, ES_GPIO_ADC_CH8_PIN, &gpio_initstruct);
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break;
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case 9:
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es32f3_channel = ALD_ADC_CHANNEL_9;
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ald_gpio_init(ES_GPIO_ADC_CH9_GPIO, ES_GPIO_ADC_CH9_PIN, &gpio_initstruct);
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break;
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case 10:
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es32f3_channel = ALD_ADC_CHANNEL_10;
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ald_gpio_init(ES_GPIO_ADC_CH10_GPIO, ES_GPIO_ADC_CH10_PIN, &gpio_initstruct);
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break;
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case 11:
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es32f3_channel = ALD_ADC_CHANNEL_11;
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ald_gpio_init(ES_GPIO_ADC_CH11_GPIO, ES_GPIO_ADC_CH11_PIN, &gpio_initstruct);
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break;
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case 12:
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es32f3_channel = ALD_ADC_CHANNEL_12;
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ald_gpio_init(ES_GPIO_ADC_CH12_GPIO, ES_GPIO_ADC_CH12_PIN, &gpio_initstruct);
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break;
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case 13:
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es32f3_channel = ALD_ADC_CHANNEL_13;
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ald_gpio_init(ES_GPIO_ADC_CH13_GPIO, ES_GPIO_ADC_CH13_PIN, &gpio_initstruct);
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break;
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case 14:
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es32f3_channel = ALD_ADC_CHANNEL_14;
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ald_gpio_init(ES_GPIO_ADC_CH14_GPIO, ES_GPIO_ADC_CH14_PIN, &gpio_initstruct);
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break;
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case 15:
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es32f3_channel = ALD_ADC_CHANNEL_15;
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ald_gpio_init(ES_GPIO_ADC_CH15_GPIO, ES_GPIO_ADC_CH15_PIN, &gpio_initstruct);
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break;
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default:
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break;
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}
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return es32f3_channel;
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}
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static rt_err_t es32f3_get_adc_value(struct rt_adc_device *device, rt_int8_t channel, rt_uint32_t *value)
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{
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ald_adc_handle_t *_hadc = (ald_adc_handle_t *)device->parent.user_data;
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ald_adc_nch_conf_t nm_config;
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RT_ASSERT(device != RT_NULL);
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RT_ASSERT(value != RT_NULL);
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/* config adc channel */
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nm_config.ch = es32f3_adc_get_channel(channel);
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nm_config.idx = ALD_ADC_NCH_IDX_1;
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nm_config.samp = ES_ADC0_NCH_SAMPLETIME;
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ald_adc_normal_channel_config(_hadc, &nm_config);
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ald_adc_normal_start(_hadc);
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if (ald_adc_normal_poll_for_conversion(_hadc, 5000) == ALD_OK)
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*value = ald_adc_normal_get_value(_hadc);
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return RT_EOK;
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}
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static const struct rt_adc_ops es32f3_adc_ops =
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{
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es32f3_adc_enabled,
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es32f3_get_adc_value,
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};
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int rt_hw_adc_init(void)
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{
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ald_adc_handle_t _h_adc;
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/* adc function initialization */
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_h_adc.init.scan = ENABLE;
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_h_adc.init.cont = DISABLE;
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_h_adc.init.disc = ALD_ADC_ALL_DISABLE;
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_h_adc.init.disc_nr = ALD_ADC_DISC_NR_1;
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_h_adc.init.data_bit = ALD_ADC_CONV_BIT_12;
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_h_adc.init.div = ALD_ADC_CKDIV_16;
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_h_adc.init.nch_nr = ALD_ADC_NCH_NR_1;
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_h_adc.init.nche_sel = ALD_ADC_NCHESEL_MODE_ALL;
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_h_adc.init.cont = DISABLE;
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_h_adc.init.n_ref = ALD_ADC_NEG_REF_VSS;
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_h_adc.init.p_ref = ALD_ADC_POS_REF_VDD;
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#ifdef BSP_USING_ADC0
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static ald_adc_handle_t _h_adc0;
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_h_adc0.init = _h_adc.init;
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_h_adc0.perh = ADC;
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_h_adc0.init.align = ES_ADC0_ALIGN;
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_h_adc0.init.data_bit = ES_ADC0_DATA_BIT;
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_h_adc0.init.div = ES_ADC0_CLK_DIV;
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ALD_ADC_ENABLE(&_h_adc0);
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ALD_ADC_DISABLE(&_h_adc0);
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ald_adc_init(&_h_adc0);
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rt_hw_adc_register(&_device_adc0, ES_DEVICE_NAME_ADC0, &es32f3_adc_ops, &_h_adc0);
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#endif /*BSP_USING_ADC0*/
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return RT_EOK;
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}
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INIT_BOARD_EXPORT(rt_hw_adc_init);
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#endif
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