137 lines
3.8 KiB
C
137 lines
3.8 KiB
C
/**
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******************************************************************************
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* @brief MISC functions of the firmware library.
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "gd32f10x_misc.h"
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/** @addtogroup GD32F10x_Firmware
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* @{
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*/
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/** @defgroup MISC
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* @brief MISC driver modules
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* @{
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*/
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/** @defgroup MISC_Private_Defines
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* @{
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*/
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#define AIRCR_VECTKEY_MASK ((uint32_t)0x05FA0000)
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/**
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* @}
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*/
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/** @defgroup MISC_Private_Functions
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* @{
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*/
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/**
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* @brief By the PRIGROUP[10:8] bits of the AIRCR register, Setting the priority grouping:
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* pre-emption priority and subpriority.
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* @param NVIC_PriGroup: NVIC_PRIGROUP_0, NVIC_PRIGROUP_1,...NVIC_PRIGROUP_4.
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* @retval None
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*/
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void NVIC_PRIGroup_Enable(uint32_t NVIC_PRIGroup)
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{
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/* Set the priority grouping value */
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SCB->AIRCR = AIRCR_VECTKEY_MASK | NVIC_PRIGroup;
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}
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/**
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* @brief The NVIC peripheral Initialization.
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* @param NVIC_InitStruct: a NVIC_InitPara structure pointer.
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* @retval None
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*/
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void NVIC_Init(NVIC_InitPara *NVIC_InitStruct)
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{
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uint32_t temppriority = 0x00, temppreempt = 0x00, tempsub = 0x00;
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if (NVIC_InitStruct->NVIC_IRQEnable != DISABLE) {
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if (((SCB->AIRCR) & (uint32_t)0x700) == NVIC_PRIGROUP_0) {
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temppreempt = 0;
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tempsub = 0x4;
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} else if (((SCB->AIRCR) & (uint32_t)0x700) == NVIC_PRIGROUP_1) {
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temppreempt = 1;
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tempsub = 0x3;
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} else if (((SCB->AIRCR) & (uint32_t)0x700) == NVIC_PRIGROUP_2) {
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temppreempt = 2;
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tempsub = 0x2;
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} else if (((SCB->AIRCR) & (uint32_t)0x700) == NVIC_PRIGROUP_3) {
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temppreempt = 3;
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tempsub = 0x1;
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} else if (((SCB->AIRCR) & (uint32_t)0x700) == NVIC_PRIGROUP_4) {
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temppreempt = 4;
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tempsub = 0x0;
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}
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temppriority = (uint32_t)NVIC_InitStruct->NVIC_IRQPreemptPriority << (0x4 - temppreempt);
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temppriority |= NVIC_InitStruct->NVIC_IRQSubPriority & (0x0F >> (0x4 - tempsub));
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temppriority = temppriority << 0x04;
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NVIC->IP[NVIC_InitStruct->NVIC_IRQ] = temppriority;
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/* Enable the Selected IRQ Channels */
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NVIC->ISER[NVIC_InitStruct->NVIC_IRQ >> 0x05] = (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQ & (uint8_t)0x1F);
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} else {
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/* Disable the Selected IRQ Channels */
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NVIC->ICER[NVIC_InitStruct->NVIC_IRQ >> 0x05] = (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQ & (uint8_t)0x1F);
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}
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}
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/**
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* @brief Specify the vector table in RAM or FLASH memory and its Offset.
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* @param NVIC_VectTab: NVIC_VECTTAB_RAM,NVIC_VECTTAB_FLASH
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* @param Offset: Vector Table start address.
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* @retval None
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*/
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void NVIC_VectTableSet(uint32_t NVIC_VectTab, uint32_t Offset)
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{
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SCB->VTOR = NVIC_VectTab | (Offset & (uint32_t)0x1FFFFF80);
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}
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/**
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* @brief Specify the state of the system to enter low power mode.
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* @param LowPowerMode: NVIC_LOWPOWER_SEVONPEND,NVIC_LOWPOWER_SLEEPDEEP,NVIC_LOWPOWER_SLEEPONEXIT.
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* @param NewValue: new value of Low Power state. This parameter can be: ENABLE or DISABLE.
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* @retval None
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*/
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void NVIC_SystemLowPowerConfig(uint8_t LowPowerMode, TypeState NewValue)
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{
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if (NewValue != DISABLE) {
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SCB->SCR |= LowPowerMode;
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} else {
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SCB->SCR &= (~(uint32_t)LowPowerMode);
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}
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}
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/**
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* @brief Specify the SysTick clock source.
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* @param SysTick_CKSource: SYSTICK_CKSOURCE_HCLK_DIV8,SYSTICK_CKSOURCE_HCLK.
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* @retval None
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*/
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void SysTick_CKSource_Enable(uint32_t SysTick_CKSource)
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{
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if (SysTick_CKSource == SYSTICK_CKSOURCE_HCLK) {
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SysTick->CTRL |= SYSTICK_CKSOURCE_HCLK;
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} else {
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SysTick->CTRL &= SYSTICK_CKSOURCE_HCLK_DIV8;
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}
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}
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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