345 lines
8.7 KiB
ArmAsm
345 lines
8.7 KiB
ArmAsm
/*********************** (C) COPYRIGHT 2020 Aisinochip *************************
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;* File Name : Startup_ACM32F4.s
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;* Author : AisinoChip Firmware Team
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;* Version : V1.0.0
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;* Date : 2020
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;* Description : ACM32F4 Devices vector table for GCC toolchain.
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;* This module performs:
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;* - Set the initial SP
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;* - Set the initial PC == Reset_Handler
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;* - Set the vector table entries with the exceptions ISR address
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;* - Configure the clock system
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;* - Branches to __main in the C library (which eventually
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;* calls main()).
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;* After Reset the Cortex-M33 processor is in Thread mode,
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;* priority is Privileged, and the Stack is set to Main.
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;********************************************************************************
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;* @attention
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;*
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;* Copyright (c) 2020 AisinoChip.
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;* All rights reserved.
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;*******************************************************************************/
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.syntax unified
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.cpu cortex-m33
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.fpu softvfp
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.thumb
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.global g_pfnVectors
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.global Default_Handler
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/* start address for the initialization values of the .data section.
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defined in linker script */
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.word _sidata
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/* start address for the .data section. defined in linker script */
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.word _sdata
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/* end address for the .data section. defined in linker script */
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.word _edata
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/* start address for the .bss section. defined in linker script */
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.word _sbss
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/* end address for the .bss section. defined in linker script */
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.word _ebss
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/*.equ BootRAM, 0xF108F85F */
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/**
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* @brief This is the code that gets called when the processor first
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* starts execution following a reset event. Only the absolutely
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* necessary set is performed, after which the application
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* supplied main() routine is called.
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* @param None
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* @retval : None
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*/
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.section .text.Reset_Handler
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.weak Reset_Handler
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.type Reset_Handler, %function
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Reset_Handler:
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/* Copy the data segment initializers from flash to SRAM */
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movs r1, #0
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b LoopCopyDataInit
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CopyDataInit:
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ldr r3, =_sidata
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ldr r3, [r3, r1]
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str r3, [r0, r1]
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adds r1, r1, #4
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LoopCopyDataInit:
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ldr r0, =_sdata
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ldr r3, =_edata
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adds r2, r0, r1
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cmp r2, r3
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bcc CopyDataInit
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ldr r2, =_sbss
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b LoopFillZerobss
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/* Zero fill the bss segment. */
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FillZerobss:
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movs r3, #0
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str r3, [r2], #4
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LoopFillZerobss:
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ldr r3, = _ebss
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cmp r2, r3
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bcc FillZerobss
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/* Call the clock system intitialization function.*/
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/* bl SystemInit */
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/* Call static constructors */
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/* bl __libc_init_array */
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/* Call the application's entry point.*/
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bl entry
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bx lr
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.size Reset_Handler, .-Reset_Handler
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/**
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* @brief This is the code that gets called when the processor receives an
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* unexpected interrupt. This simply enters an infinite loop, preserving
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* the system state for examination by a debugger.
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*
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* @param None
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* @retval : None
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*/
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.section .text.Default_Handler,"ax",%progbits
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Default_Handler:
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Infinite_Loop:
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b Infinite_Loop
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.size Default_Handler, .-Default_Handler
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/******************************************************************************
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*
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* The minimal vector table for a Cortex M3. Note that the proper constructs
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* must be placed on this to ensure that it ends up at physical address
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* 0x0000.0000.
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*
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******************************************************************************/
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.section .isr_vector,"a",%progbits
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.type g_pfnVectors, %object
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.size g_pfnVectors, .-g_pfnVectors
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g_pfnVectors:
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.word _estack
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.word Reset_Handler
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.word NMI_Handler
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.word HardFault_Handler
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.word MemManage_Handler
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.word BusFault_Handler
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.word UsageFault_Handler
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.word 0
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.word 0
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.word 0
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.word 0
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.word SVC_Handler
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.word DebugMon_Handler
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.word 0
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.word PendSV_Handler
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.word SysTick_Handler
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/* External Interrupts */
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.word WDT_IRQHandler
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.word RTC_IRQHandler
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.word EFC_IRQHandler
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.word GPIOAB_IRQHandler
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.word GPIOCD_IRQHandler
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.word EXIT_IRQHandler
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.word SRAM_PAPITY_IRQHandler
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.word CLKRDY_IRQHandler
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.word UART4_IRQHandler
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.word DMA_IRQHandler
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.word UART3_IRQHandler
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.word RSV_IRQHandler
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.word ADC_IRQHandler
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.word TIM1_BRK_UP_TRG_COM_IRQHandler
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.word TIM1_CC_IRQHandler
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.word TIM2_IRQHandler
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.word TIM3_IRQHandler
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.word TIM6_IRQHandler
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.word TIM7_IRQHandler
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.word TIM14_IRQHandler
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.word TIM15_IRQHandler
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.word TIM16_IRQHandler
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.word TIM17_IRQHandler
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.word I2C1_IRQHandler
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.word I2C2_IRQHandler
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.word SPI1_IRQHandler
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.word SPI2_IRQHandler
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.word UART1_IRQHandler
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.word UART2_IRQHandler
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.word LPUART_IRQHandler
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.word SPI3_IRQHandler
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.word AES_IRQHandler
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.word USB_IRQHandler
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.word DAC_IRQHandler
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.word I2S_IRQHandler
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.word GPIOEF_IRQHandler
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.word CAN1_IRQHandler
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.word CAN2_IRQHandler
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.word FPU_IRQHandler
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.word TIM4_IRQHandler
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.word SPI4_IRQHandler
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/*******************************************************************************
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*
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* Provide weak aliases for each Exception handler to the Default_Handler.
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* As they are weak aliases, any function with the same name will override
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* this definition.
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*
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*******************************************************************************/
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.weak NMI_Handler
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.thumb_set NMI_Handler,Default_Handler
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.weak HardFault_Handler
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.thumb_set HardFault_Handler,Default_Handler
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.weak MemManage_Handler
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.thumb_set MemManage_Handler,Default_Handler
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.weak BusFault_Handler
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.thumb_set BusFault_Handler,Default_Handler
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.weak UsageFault_Handler
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.thumb_set UsageFault_Handler,Default_Handler
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.weak SVC_Handler
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.thumb_set SVC_Handler,Default_Handler
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.weak DebugMon_Handler
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.thumb_set DebugMon_Handler,Default_Handler
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.weak PendSV_Handler
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.thumb_set PendSV_Handler,Default_Handler
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.weak SysTick_Handler
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.thumb_set SysTick_Handler,Default_Handler
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.weak WDT_IRQHandler
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.thumb_set WDT_IRQHandler,Default_Handler
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.weak RTC_IRQHandler
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.thumb_set RTC_IRQHandler,Default_Handler
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.weak EFC_IRQHandler
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.thumb_set EFC_IRQHandler,Default_Handler
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.weak GPIOAB_IRQHandler
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.thumb_set GPIOAB_IRQHandler,Default_Handler
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.weak GPIOCD_IRQHandler
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.thumb_set GPIOCD_IRQHandler,Default_Handler
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.weak EXIT_IRQHandler
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.thumb_set EXIT_IRQHandler,Default_Handler
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.weak SRAM_PAPITY_IRQHandler
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.thumb_set SRAM_PAPITY_IRQHandler,Default_Handler
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.weak CLKRDY_IRQHandler
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.thumb_set CLKRDY_IRQHandler,Default_Handler
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.weak UART4_IRQHandler
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.thumb_set UART4_IRQHandler,Default_Handler
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.weak DMA_IRQHandler
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.thumb_set DMA_IRQHandler,Default_Handler
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.weak UART3_IRQHandler
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.thumb_set UART3_IRQHandler,Default_Handler
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.weak RSV_IRQHandler
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.thumb_set RSV_IRQHandler,Default_Handler
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.weak ADC_IRQHandler
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.thumb_set ADC_IRQHandler,Default_Handler
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.weak TIM1_BRK_UP_TRG_COM_IRQHandler
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.thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler
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.weak TIM1_CC_IRQHandler
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.thumb_set TIM1_CC_IRQHandler,Default_Handler
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.weak TIM2_IRQHandler
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.thumb_set TIM2_IRQHandler,Default_Handler
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.weak TIM3_IRQHandler
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.thumb_set TIM3_IRQHandler,Default_Handler
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.weak TIM6_IRQHandler
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.thumb_set TIM6_IRQHandler,Default_Handler
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.weak TIM7_IRQHandler
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.thumb_set TIM7_IRQHandler,Default_Handler
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.weak TIM14_IRQHandler
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.thumb_set TIM14_IRQHandler,Default_Handler
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.weak TIM15_IRQHandler
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.thumb_set TIM15_IRQHandler,Default_Handler
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.weak TIM16_IRQHandler
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.thumb_set TIM16_IRQHandler,Default_Handler
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.weak TIM17_IRQHandler
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.thumb_set TIM17_IRQHandler,Default_Handler
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.weak I2C1_IRQHandler
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.thumb_set I2C1_IRQHandler,Default_Handler
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.weak I2C2_IRQHandler
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.thumb_set I2C2_IRQHandler,Default_Handler
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.weak SPI1_IRQHandler
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.thumb_set SPI1_IRQHandler,Default_Handler
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.weak SPI2_IRQHandler
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.thumb_set SPI2_IRQHandler,Default_Handler
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.weak UART1_IRQHandler
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.thumb_set UART1_IRQHandler,Default_Handler
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.weak UART2_IRQHandler
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.thumb_set UART2_IRQHandler,Default_Handler
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.weak LPUART_IRQHandler
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.thumb_set LPUART_IRQHandler,Default_Handler
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.weak SPI3_IRQHandler
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.thumb_set SPI3_IRQHandler,Default_Handler
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.weak AES_IRQHandler
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.thumb_set AES_IRQHandler,Default_Handler
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.weak USB_IRQHandler
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.thumb_set USB_IRQHandler,Default_Handler
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.weak DAC_IRQHandler
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.thumb_set DAC_IRQHandler,Default_Handler
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.weak I2S_IRQHandler
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.thumb_set I2S_IRQHandler,Default_Handler
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.weak GPIOEF_IRQHandler
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.thumb_set GPIOEF_IRQHandler,Default_Handler
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.weak CAN1_IRQHandler
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.thumb_set CAN1_IRQHandler,Default_Handler
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.weak CAN2_IRQHandler
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.thumb_set CAN2_IRQHandler,Default_Handler
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.weak FPU_IRQHandler
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.thumb_set FPU_IRQHandler,Default_Handler
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.weak TIM4_IRQHandler
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.thumb_set TIM4_IRQHandler,Default_Handler
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.weak SPI4_IRQHandler
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.thumb_set SPI4_IRQHandler,Default_Handler
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