291 lines
7.4 KiB
C
291 lines
7.4 KiB
C
/*
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* File : drv_spi.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2015, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2016-09-02 Aubr.Cool the first version
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*/
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#include <stm32l0xx.h>
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#include <rthw.h>
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#include <rtthread.h>
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#include <rtdevice.h>
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#include <board.h>
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#ifdef RT_USING_COMPONENTS_INIT
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#include <components.h>
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#endif
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#define SPIRXEVENT 0x01
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#define SPITXEVENT 0x02
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#ifdef RT_USING_SPI
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#define SPITIMEOUT 2
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#define SPICRCEN 0
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struct stm32_hw_spi;
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typedef void(*spiirqapi)(struct stm32_hw_spi *hspi);
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struct stm32_hw_spi {
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SPI_TypeDef* Instance;
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struct rt_spi_configuration* cfg;
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};
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struct stm32_spi {
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SPI_TypeDef* spi_device;
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struct stm32_hw_spi *data;
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};
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struct stm32_hw_spi_cs {
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rt_uint32_t pin;
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};
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static rt_err_t stml0xx_spi_init(SPI_TypeDef * spix, struct rt_spi_configuration * cfg)
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{
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SPI_HandleTypeDef hspi;
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hspi.Instance = spix;
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if(cfg->mode & RT_SPI_SLAVE) {
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hspi.Init.Mode = SPI_MODE_SLAVE;
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} else {
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hspi.Init.Mode = SPI_MODE_MASTER;
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}
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if(cfg->mode & RT_SPI_3WIRE) {
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hspi.Init.Direction = SPI_DIRECTION_1LINE;
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} else {
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hspi.Init.Direction = SPI_DIRECTION_2LINES;
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}
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if(cfg->data_width == 8) {
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hspi.Init.DataSize = SPI_DATASIZE_8BIT;
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} else if(cfg->data_width == 16) {
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hspi.Init.DataSize = SPI_DATASIZE_16BIT;
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} else {
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return RT_EIO;
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}
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if(cfg->mode & RT_SPI_CPHA) {
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hspi.Init.CLKPhase = SPI_PHASE_2EDGE;
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} else {
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hspi.Init.CLKPhase = SPI_PHASE_1EDGE;
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}
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if(cfg->mode & RT_SPI_CPOL) {
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hspi.Init.CLKPolarity = SPI_POLARITY_HIGH;
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} else {
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hspi.Init.CLKPolarity = SPI_POLARITY_LOW;
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}
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if(cfg->mode & RT_SPI_NO_CS) {
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hspi.Init.NSS = SPI_NSS_SOFT;
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} else {
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hspi.Init.NSS = SPI_NSS_HARD_OUTPUT;
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}
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hspi.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4;
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if(cfg->mode & RT_SPI_MSB) {
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hspi.Init.FirstBit = SPI_FIRSTBIT_MSB;
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} else {
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hspi.Init.FirstBit = SPI_FIRSTBIT_LSB;
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}
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hspi.Init.TIMode = SPI_TIMODE_DISABLE;
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hspi.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
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hspi.Init.CRCPolynomial = 7;
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if (HAL_SPI_Init(&hspi) != HAL_OK)
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{
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return RT_EIO;
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}
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__HAL_SPI_ENABLE(&hspi);
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return RT_EOK;
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}
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#define SPISTEP(datalen) (((datalen) == 8) ? 1 : 2)
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#define SPISEND_1(reg, ptr, datalen) \
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do {\
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if(datalen == 8) { \
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(reg) = *(rt_uint8_t *)(ptr); \
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} else { \
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(reg) = *(rt_uint16_t *) (ptr); \
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} \
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} while(0)
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#define SPIRECV_1(reg, ptr, datalen) \
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do {\
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if(datalen == 8) { \
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*(rt_uint8_t *)(ptr) = (reg); \
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} else { \
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*(rt_uint16_t *) (ptr) = reg; \
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} \
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} while(0)
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static rt_err_t spitxrx1b(struct stm32_hw_spi *hspi, void *rcvb, const void *sndb)
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{
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rt_uint32_t padrcv = 0;
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rt_uint32_t padsnd = 0xFF;
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if(! rcvb && !sndb) {
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return RT_ERROR;
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}
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if(!rcvb) {
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rcvb = &padrcv;
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}
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if(!sndb) {
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sndb = &padsnd;
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}
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while(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE) == RESET);
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SPISEND_1(hspi->Instance->DR, sndb, hspi->cfg->data_width);
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while(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE) == RESET);
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SPIRECV_1(hspi->Instance->DR, rcvb, hspi->cfg->data_width);
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return RT_EOK;
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}
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static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message *message)
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{
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rt_err_t res;
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RT_ASSERT(device != RT_NULL);
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RT_ASSERT(device->bus != RT_NULL);
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RT_ASSERT(device->bus->parent.user_data != RT_NULL);
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struct stm32_spi* spix;
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spix = (struct stm32_spi *)device->bus->parent.user_data;
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struct stm32_hw_spi *hspi = spix->data;
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struct stm32_hw_spi_cs * cs = device->parent.user_data;
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if(message->cs_take) {
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rt_pin_write(cs->pin, 0);
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}
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const rt_uint8_t *sndb = message->send_buf;
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rt_uint8_t *rcvb = message->recv_buf;
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rt_int32_t length = message->length;
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while(length) {
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res = spitxrx1b(hspi, rcvb, sndb);
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if(rcvb) {
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rcvb += SPISTEP(hspi->cfg->data_width);
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}
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if(sndb) {
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sndb += SPISTEP(hspi->cfg->data_width);
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}
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if(res != RT_EOK) {
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break;
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}
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length--;
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}
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/* Wait until Busy flag is reset before disabling SPI */
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while(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_BSY) == SET);
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if(message->cs_release) {
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rt_pin_write(cs->pin, 1);
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}
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return message->length - length;
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}
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#ifdef RT_USING_SPI1
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static struct stm32_hw_spi spi1hwdata = {
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.Instance = SPI1,
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};
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const static struct stm32_spi spi1 = {
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SPI1,
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&spi1hwdata,
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};
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const static struct stm32_hw_spi_cs stm32_spi1_cs = {
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SPI1PINNSS,
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};
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rt_err_t spi1configure(struct rt_spi_device *device,
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struct rt_spi_configuration *configuration)
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{
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spi1hwdata.cfg = configuration;
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return stml0xx_spi_init(spi1.spi_device, configuration);
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}
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const struct rt_spi_ops stm_spi_ops1 =
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{
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.configure = spi1configure,
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.xfer = spixfer,
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};
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static struct rt_spi_bus stm_spi_bus1 = {
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.parent = {
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.user_data = (void *)&spi1,
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},
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};
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#endif /*RT_USING_SPI1*/
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#ifdef RT_USING_SPI2
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static struct stm32_hw_spi spi2hwdata = {
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.Instance = SPI2,
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};
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const struct stm32_spi spi2 = {
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SPI2,
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&spi2hwdata,
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};
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rt_err_t spi2configure(struct rt_spi_device *device,
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struct rt_spi_configuration *configuration)
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{
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spi2hwdata.cfg = configuration;
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return stml0xx_spi_init(spi2.spi_device, configuration);
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}
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const struct rt_spi_ops stm_spi_ops2 =
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{
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.configure = spi2configure,
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.xfer = spixfer,
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};
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const static struct stm32_hw_spi_cs stm32_spi2_cs = {
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SPI2PINNSS,
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};
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static struct rt_spi_bus stm_spi_bus2 = {
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.parent = {
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.user_data = (void *)&spi2,
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},
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};
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#endif /*RT_USING_SPI2*/
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static void RCC_Configuration(void)
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{
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#ifdef RT_USING_SPI1
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__HAL_RCC_SPI1_CLK_ENABLE();
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#endif /*RT_USING_SPI1*/
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#ifdef RT_USING_SPI2
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__HAL_RCC_SPI2_CLK_ENABLE();
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#endif /*RT_USING_SPI2*/
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}
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static void GPIO_Configuration(void)
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{
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#ifdef RT_USING_SPI1
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{
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/**SPI1 GPIO Configuration **/
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rt_uint32_t mode;
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mode = (GPIO_AF0_SPI1 << 8) | GPIO_MODE_AF_PP;
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stm32_pin_mode_early(SPI1PINSCK, mode);
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stm32_pin_mode_early(SPI1PINMISO, mode);
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stm32_pin_mode_early(SPI1PINMOSI, mode);
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}
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#endif /*RT_USING_SPI1*/
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#ifdef RT_USING_SPI2
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#endif /*RT_USING_SPI1*/
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}
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int stm32_hw_spi_init(void)
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{
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int result1 = RT_EOK, result2 = RT_EOK;
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RCC_Configuration();
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GPIO_Configuration();
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#ifdef RT_USING_SPI1
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{
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result1 = rt_spi_bus_register(&stm_spi_bus1, "spi1", &stm_spi_ops1);
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static struct rt_spi_device spi_device;
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rt_uint32_t mode = GPIO_MODE_OUTPUT_PP;
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stm32_pin_mode_early(SPI1PINNSS, mode);
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stm32_pin_write_early(SPI1PINNSS, 1);
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rt_spi_bus_attach_device(&spi_device, "spi10", "spi1", (void *)&stm32_spi1_cs);
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}
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#endif /*RT_USING_SPI1*/
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#ifdef RT_USING_SPI2
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{
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result2 = rt_spi_bus_register(&stm_spi_bus2, "spi2", &stm_spi_ops1);
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static struct rt_spi_device spi_device;
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rt_uint32_t mode = GPIO_MODE_OUTPUT_PP;
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stm32_pin_mode_early(SPI2PINNSS, mode);
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stm32_pin_write_early(SPI2PINNSS, 1);
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rt_spi_bus_attach_device(&spi_device, "spi20", "spi2", (void *)&stm32_spi2_cs);
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}
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#endif /*RT_USING_SPI2*/
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return result1 | result2;
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}
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INIT_BOARD_EXPORT(stm32_hw_spi_init);
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#endif /*RT_USING_SPI*/
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