418 lines
16 KiB
C
418 lines
16 KiB
C
/**
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*****************************************************************************
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* @file cmem7_eth.h
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*
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* @brief CMEM7 ethernet header file
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*
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*
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* @version V1.0
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* @date 3. September 2013
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*
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* @note
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*
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*****************************************************************************
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* @attention
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*
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* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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* TIME. AS A RESULT, CAPITAL-MICRO SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
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* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*
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* <h2><center>© COPYRIGHT 2013 Capital-micro </center></h2>
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*****************************************************************************
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*/
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#ifndef __CMEM7_ETH_H
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#define __CMEM7_ETH_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "cmem7.h"
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#include "cmem7_conf.h"
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/** @defgroup ETH_SPEED
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* @{
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*/
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#define ETH_SPEED_10M 0x0
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#define ETH_SPEED_100M 0x1
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#define ETH_SPEED_1000M 0x2
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#define IS_ETH_SPEED(SPEED) (((SPEED) == ETH_SPEED_10M) || \
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((SPEED) == ETH_SPEED_100M) || \
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((SPEED) == ETH_SPEED_1000M))
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/**
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* @}
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*/
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/** @defgroup ETH_DUPLEX
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* @{
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*/
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#define ETH_DUPLEX_HALF 0x0
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#define ETH_DUPLEX_FULL 0x1
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#define IS_ETH_DUPLEX(DUPLEX) (((DUPLEX) == ETH_DUPLEX_HALF) || \
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((DUPLEX) == ETH_DUPLEX_FULL))
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/**
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* @}
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*/
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/** @defgroup ETH_INT
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* @{
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*/
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#define ETH_INT_TX_COMPLETE_FRAME 0x0001
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#define ETH_INT_TX_STOP 0x0002
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#define ETH_INT_TX_BUF_UNAVAI 0x0004
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#define ETH_INT_RX_OVERFLOW 0x0010
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#define ETH_INT_TX_UNDERFLOW 0x0020
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#define ETH_INT_RX_COMPLETE_FRAME 0x0040
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#define ETH_INT_RX_BUF_UNAVAI 0x0080
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#define ETH_INT_RX_STOP 0x0100
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#define ETH_INT_BUS_FATAL_ERROR 0x2000
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#define ETH_INT_ALL (ETH_INT_TX_COMPLETE_FRAME | \
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ETH_INT_TX_STOP | \
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ETH_INT_TX_BUF_UNAVAI | \
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ETH_INT_RX_OVERFLOW | \
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ETH_INT_TX_UNDERFLOW | \
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ETH_INT_RX_COMPLETE_FRAME | \
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ETH_INT_RX_BUF_UNAVAI | \
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ETH_INT_RX_STOP | \
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ETH_INT_BUS_FATAL_ERROR)
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#define IS_ETH_INT(INT) (((INT) != 0) && (((INT) & ~ETH_INT_ALL) == 0))
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/**
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* @}
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*/
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/**
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* @brief EFUSE receive filter structure
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*/
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typedef struct
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{
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BOOL ETH_BroadcastFilterEnable; /*!< Broadcast is dropped or passed */
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BOOL ETH_OwnFilterEnable; /*!< source address filter is on or off */
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BOOL ETH_SelfDrop; /*!< Only own address is dropped or passed */
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BOOL ETH_SourceFilterEnable; /*!< source address filter is on or off */
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BOOL ETH_SourceDrop; /*!< Only specific source address is dropped or passed */
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uint8_t ETH_SourceMacAddr[6]; /*!< Source MAC address */
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} ETH_FrameFilter;
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/**
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* @brief Ethernet initialization structure
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*/
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typedef struct
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{
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BOOL ETH_LinkUp; /*!< If ETH is linked up and it can be retrieved from PHY */
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uint8_t ETH_Speed; /*!< speed of ETH, refer as @ref ETH_SPEED */
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uint8_t ETH_Duplex; /*!< duplex mode of ETH, refer as @ref ETH_DUPLEX */
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BOOL ETH_RxEn; /*!< Rx enable */
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BOOL ETH_TxEn; /*!< Tx enable */
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BOOL ETH_ChecksumOffload; /*!< Checksum offload enable */
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BOOL ETH_JumboFrame; /*!< Jumbo Frame Enable */
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uint8_t ETH_MacAddr[6]; /*!< MAC address */
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ETH_FrameFilter *ETH_Filter; /*!< Received frame address filter, receive all if null */
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} ETH_InitTypeDef;
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/**
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* @brief Ethernet Tx descriptor structure
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*/
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typedef struct {
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union {
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uint32_t TX0;
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struct {
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uint32_t : 1;
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uint32_t UNDERFLOW_ERR : 1; /*!< [OUT] Underflow error */
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uint32_t : 1;
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uint32_t COLLISION_CNT : 4; /*!< [OUT] Collision count */
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uint32_t : 1;
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uint32_t EX_COLLISION : 1; /*!< [OUT] Excessive collision error */
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uint32_t LATE_COLLISION : 1; /*!< [OUT] Late collision error */
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uint32_t NO_CARRIER : 1; /*!< [OUT] No carrier error */
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uint32_t LOSS_CARRIER : 1; /*!< [OUT] loss of carrier error */
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uint32_t PAYLOAD_ERR : 1; /*!< [OUT] IP payload error */
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uint32_t : 2;
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uint32_t ERR_SUM : 1; /*!< [OUT] Error summary */
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uint32_t HEADER_ERR : 1; /*!< [OUT] IP header error */
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uint32_t : 8;
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uint32_t TTSE : 1; /*!< enables IEEE1588 hardware timestamping in first segment */
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uint32_t : 2;
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uint32_t FS : 1; /*!< first segment flag */
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uint32_t LS : 1; /*!< last segment flag */
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uint32_t : 2;
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} TX0_b;
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} TX_0;
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union {
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uint32_t TX1;
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struct {
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uint32_t SIZE : 13; /*!< buffer size */
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uint32_t : 19;
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} TX1_b;
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} TX_1;
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uint32_t bufAddr; /*!< address of buffer */
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uint32_t nextDescAddr; /*!< address of next descriptor */
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uint64_t reserved;
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uint64_t timeStamp; /*!< time stamp while last segment */
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} ETH_TX_DESC;
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/**
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* @brief Ethernet Rx descriptor structure
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*/
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typedef struct {
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union {
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uint32_t RX0;
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struct {
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uint32_t : 1;
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uint32_t CRC_ERR : 1; /*!< [OUT] CRC error while last segment */
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uint32_t : 5;
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uint32_t TTSE : 1; /*!< timestamp available while last segment */
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uint32_t LS : 1; /*!< [OUT] last segment flag */
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uint32_t FS : 1; /*!< [OUT] first segment flag */
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uint32_t : 1;
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uint32_t OVERFLOW_ERR : 1; /*!< [OUT] FIFO overflow while last segment */
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uint32_t LENGTH_ERR : 1; /*!< [OUT] length error while last segment */
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uint32_t : 2;
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uint32_t ERR_SUM : 1; /*!< [OUT] Error summary while last segment */
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uint32_t FL : 14; /*!< [OUT] frame length while last segment */
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uint32_t : 2;
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} RX0_b;
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} RX_0;
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union {
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uint32_t RX1;
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struct {
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uint32_t SIZE : 13; /*!< buffer size */
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uint32_t : 19;
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} RX1_b;
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} RX_1;
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uint32_t bufAddr; /*!< buffer address */
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uint32_t nextDescAddr; /*!< address of next descriptor */
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uint64_t reserved;
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uint64_t timeStamp; /*!< time stamp while the last segment */
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} ETH_RX_DESC;
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/**
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* @brief Read data from phy chip
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* @param[in] phyAddr Address of phy chip
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* @param[in] phyReg Address of phy's register to be read
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* @retval uint32_t value of phy's register
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*/
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uint32_t ETH_PhyRead(uint32_t phyAddr, uint32_t phyReg);
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/**
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* @brief Write data to phy chip
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* @param[in] phyAddr Address of phy chip
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* @param[in] phyReg Address of phy's register to be written
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* @param[in] data Data to be written
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* @retval None
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*/
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void ETH_PhyWrite(uint32_t phyAddr, uint32_t phyReg, uint32_t data);
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/**
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* @brief Fills each ETH_InitStruct member with its default value.
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* @param ETH_InitStruct: pointer to a ETH_InitTypeDef structure
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* which will be initialized.
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* @retval : None
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*/
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void ETH_StructInit(ETH_InitTypeDef* init);
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/**
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* @brief Ethernet initialization
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* @note This function should be called at first before any other interfaces.
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* @param[in] init A pointer to structure ETH_InitTypeDef
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* @retval BOOL The bit indicates if ethernet is initialized successfully
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*/
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BOOL ETH_Init(ETH_InitTypeDef *init);
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/**
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* @brief Enable or disable ethernet interrupt.
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* @param[in] Int interrupt mask bits, which can be the combination of @ref ETH_INT
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* @param[in] Enable The bit indicates if specific interrupts are enable or not
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* @retval None
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*/
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void ETH_ITConfig(uint32_t Int, BOOL enable);
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/**
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* @brief Check specific interrupts are set or not
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* @param[in] Int interrupt mask bits, which can be the combination of @ref ETH_INT
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* @retval BOOL The bit indicates if specific interrupts are set or not
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*/
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BOOL ETH_GetITStatus(uint32_t Int);
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/**
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* @brief Clear specific interrupts
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* @param[in] Int interrupt mask bits, which can be the combination of @ref ETH_INT
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* @retval None
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*/
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void ETH_ClearITPendingBit(uint32_t Int);
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/**
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* @brief Get ethernte MAC address
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* @param[in] mac A user-allocated buffer to fetch MAC to be read, 6 bytes.
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* @retval None
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*/
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void ETH_GetMacAddr(uint8_t *mac);
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/**
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* @brief Set ethernet transmission descriptor ring
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* @note Make sure that memory occupied by descriptors should be in physical
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* memory and keep valid before ethernet transmission is finished.
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* @param[in] ring A pointer to header of ETH_TX_DESC ring, whose last node
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* has a 'nextDescAddr' pointed to first node.
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* @retval BOOL The bit indicates if valid ring is set
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*/
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BOOL ETH_SetTxDescRing(ETH_TX_DESC *ring);
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/**
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* @brief Start ethernet transmission
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* @param None
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* @retval None
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*/
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void ETH_StartTx(void);
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/**
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* @brief Stop ethernet transmission
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* @param None
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* @retval None
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*/
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void ETH_StopTx(void);
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/**
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* @brief Resume ethernet transmission\n
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* While ethernet doesn't have enough buffer to transmit data, it will
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* pause and inform users by interrupt 'ETH_INT_TX_BUF_UNAVAI'. Users
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* must call this function to start ethernet again after new buffer
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* prepared.
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* @param None
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* @retval None
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*/
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void ETH_ResumeTx(void);
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/**
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* @brief Get free transmission descriptor\n
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* @param None
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* @retval ETH_TX_DESC* A pointer of free transmission descriptor,
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* NULL if no free descriptor
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*/
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ETH_TX_DESC *ETH_AcquireFreeTxDesc(void);
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/**
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* @brief Check if a transmission descriptor is free or not
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* @param[in] desc A pointer of a transmission descriptor
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* @retval BOOL True if the transmission descriptor is free, or flase.
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*/
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BOOL ETH_IsFreeTxDesc(ETH_TX_DESC *desc);
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/**
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* @brief Release a transmission descriptor to ethernet\n
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* After users prepared data in the buffer of a free descriptor,
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* They must call this function to change ownership of the
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* descriptor to hardware.
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* @param[in] desc A pointer of a transmission descriptor
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* @retval None
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*/
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void ETH_ReleaseTxDesc(ETH_TX_DESC *desc);
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/**
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* @brief Set buffer address of the specific TX descriptor
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* @param[in] desc A pointer of a transmission descriptor
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* @param[in] bufAddr buffer address to be sent
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* @retval None
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*/
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void ETH_SetTxDescBufAddr(ETH_TX_DESC *desc, uint32_t bufAddr);
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/**
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* @brief Get buffer address of the specific TX descriptor
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* @param[in] desc A pointer of a transmission descriptor
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* @retval uint32_t buffer address to be gotten
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*/
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uint32_t ETH_GetTxDescBufAddr(ETH_TX_DESC *desc);
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/**
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* @brief Set ethernet receive descriptor ring
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* @note Make sure that memory occupied by descriptors should be in physical
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* memory and keep valid before ethernet receive is finished.
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* @param[in] ring A pointer to header of ETH_TX_DESC ring, whose last node
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* has a 'nextDescAddr' pointed to first node.
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* @retval BOOL The bit indicates if valid ring is set
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*/
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BOOL ETH_SetRxDescRing(ETH_RX_DESC *ring);
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/**
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* @brief Start ethernet receive
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* @param None
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* @retval None
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*/
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void ETH_StartRx(void);
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/**
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* @brief Stop ethernet receive
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* @param None
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* @retval None
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*/
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void ETH_StopRx(void);
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/**
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* @brief Resume ethernet receive\n
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* While ethernet doesn't have enough buffer to receive data, it will
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* pause and inform users by interrupt 'ETH_INT_RX_BUF_UNAVAI'. Users
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* must call this function to start ethernet again after new buffer
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* prepared.
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* @param None
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* @retval None
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*/
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void ETH_ResumeRx(void);
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/**
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* @brief Get the free descriptor which contains received data\n
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* @param None
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* @retval ETH_RX_DESC* A pointer of free receive descriptor,
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* NULL if no free descriptor
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*/
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ETH_RX_DESC *ETH_AcquireFreeRxDesc(void);
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/**
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* @brief Check if a receive descriptor is free or not
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* @param[in] desc A pointer of a receive descriptor
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* @retval BOOL True if the receive descriptor is free, or flase.
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*/
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BOOL ETH_IsFreeRxDesc(ETH_RX_DESC *desc);
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/**
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* @brief Release a receive descriptor to ethernet\n
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* After users handled data in the buffer of a free descriptor,
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* They must call this function to change ownership of the
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* descriptor to hardware.
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* @param[in] desc A pointer of a transmission descriptor
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* @retval None
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*/
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void ETH_ReleaseRxDesc(ETH_RX_DESC *desc);
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/**
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* @brief Set buffer address of the specific RX descriptor
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* @param[in] desc A pointer of a receive descriptor
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* @param[in] bufAddr buffer address to be received
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* @retval None
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*/
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void ETH_SetRxDescBufAddr(ETH_RX_DESC *desc, uint32_t bufAddr);
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/**
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* @brief Get buffer address of the specific RX descriptor
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* @param[in] desc A pointer of a receive descriptor
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* @retval uint32_t buffer address to be gotten
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*/
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uint32_t ETH_GetRxDescBufAddr(ETH_RX_DESC *desc);
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#ifdef __cplusplus
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}
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#endif
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#endif /* __CMEM7_ETH_H */
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