244 lines
7.9 KiB
C
244 lines
7.9 KiB
C
/**
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*******************************************************************************
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* @file hc32f4a0_tmr0.h
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* @brief This file contains all the functions prototypes of the TMR0 driver
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* library.
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@verbatim
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Change Logs:
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Date Author Notes
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2020-06-12 Heqb First version
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@endverbatim
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*******************************************************************************
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* Copyright (C) 2020, Huada Semiconductor Co., Ltd. All rights reserved.
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*
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* This software component is licensed by HDSC under BSD 3-Clause license
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* (the "License"); You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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*******************************************************************************
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*/
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#ifndef __HC32F4A0_TMR0_H__
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#define __HC32F4A0_TMR0_H__
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/* C binding of definitions if building with C++ compiler */
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/*******************************************************************************
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* Include files
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******************************************************************************/
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#include "hc32_common.h"
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#include "ddl_config.h"
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/**
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* @addtogroup HC32F4A0_DDL_Driver
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* @{
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*/
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/**
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* @addtogroup DDL_TMR0
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* @{
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*/
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#if (DDL_TMR0_ENABLE == DDL_ON)
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/*******************************************************************************
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* Global type definitions ('typedef')
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******************************************************************************/
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/**
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* @defgroup TMR0_Global_Types TMR0 Global Types
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* @{
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*/
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/**
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* @brief Tmr0 base counter function init structrue definition
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*/
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typedef struct
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{
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uint32_t u32ClockDivision; /*!< Specifies the TMR0 clock division,
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and this parameter can be a value of
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@ref TMR0_Clock_Division_define */
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uint32_t u32ClockSource; /*!< Specifies the TMR0 clock source,
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and this parameter can be a value of
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@ref TMR0_Clock_Source_define*/
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uint32_t u32Tmr0Func; /*!< Specifies the TMR0 function,
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compare output or capture input
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@ref TMR0_Function_define */
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uint32_t u32HwTrigFunc; /*!< Specifies the TMR0 compare
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function hardware trigger function, and
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this parameter can be a value of @ref
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TMR0_HardwareTrigger_Func_define */
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uint16_t u16CmpValue; /*!< Specifies the TMR0 compare value
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This value can be set 0-0xFFFF */
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uint16_t u16CntValue; /*!< Specifies the TMR0 count value
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This value can be set 0-0xFFFF */
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}stc_tmr0_init_t;
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/**
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* @}
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*/
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/*******************************************************************************
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* Global pre-processor symbols/macros ('#define')
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******************************************************************************/
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/**
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* @defgroup TMR0_Global_Macros TMR0 Global Macros
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* @{
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*/
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/** @defgroup TMR0_Clock_Division_define TMR0 clock division define
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* @{
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*/
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#define TMR0_CLK_DIV1 (0UL<<TMR0_BCONR_CKDIVA_POS)
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#define TMR0_CLK_DIV2 (1UL<<TMR0_BCONR_CKDIVA_POS)
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#define TMR0_CLK_DIV4 (2UL<<TMR0_BCONR_CKDIVA_POS)
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#define TMR0_CLK_DIV8 (3UL<<TMR0_BCONR_CKDIVA_POS)
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#define TMR0_CLK_DIV16 (4UL<<TMR0_BCONR_CKDIVA_POS)
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#define TMR0_CLK_DIV32 (5UL<<TMR0_BCONR_CKDIVA_POS)
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#define TMR0_CLK_DIV64 (6UL<<TMR0_BCONR_CKDIVA_POS)
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#define TMR0_CLK_DIV128 (7UL<<TMR0_BCONR_CKDIVA_POS)
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#define TMR0_CLK_DIV256 (8UL<<TMR0_BCONR_CKDIVA_POS)
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#define TMR0_CLK_DIV512 (9UL<<TMR0_BCONR_CKDIVA_POS)
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#define TMR0_CLK_DIV1024 (10UL<<TMR0_BCONR_CKDIVA_POS)
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/**
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* @}
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*/
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/**
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* @defgroup TMR0_Channel_Index TMR0 Channel Index
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* @{
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*/
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#define TMR0_CH_A (0U)
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#define TMR0_CH_B (1U)
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/**
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* @}
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*/
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/** @defgroup TMR0_Clock_Source_define TMR0 clock source define
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* @{
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*/
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#define TMR0_CLK_SRC_PCLK1 (0x00000000UL)
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#define TMR0_CLK_SRC_INTHWTRIG (TMR0_BCONR_SYNCLKA)
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#define TMR0_CLK_SRC_LRC (TMR0_BCONR_SYNSA)
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#define TMR0_CLK_SRC_XTAL32 (TMR0_BCONR_ASYNCLKA | TMR0_BCONR_SYNSA)
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/**
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* @}
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*/
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/** @defgroup TMR0_Function_define TMR0 Function define
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* @{
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*/
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#define TMR0_FUNC_CMP (0x00000000UL)
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#define TMR0_FUNC_CAP (TMR0_BCONR_CAPMDA | TMR0_BCONR_HICPA)
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/**
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* @}
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*/
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/** @defgroup TMR0_HardwareTrigger_Func_define TMR0 hardware trigger function define
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* @{
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*/
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#define TMR0_BT_HWTRG_FUNC_START (TMR0_BCONR_HSTAA)
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#define TMR0_BT_HWTRG_FUNC_CLEAR (TMR0_BCONR_HCLEA)
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#define TMR0_BT_HWTRG_FUNC_STOP (TMR0_BCONR_HSTPA)
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#define TMR0_BT_HWTRG_FUNC_NONE (0x00000000UL)
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#define TMR0_BT_HETRG_FUNC_MASK (TMR0_BT_HWTRG_FUNC_START | \
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TMR0_BT_HWTRG_FUNC_CLEAR | \
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TMR0_BT_HWTRG_FUNC_STOP)
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/**
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* @}
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*/
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/**
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* @defgroup TMR0_CAMPAR_FLAG TMR0 Compare Status
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* @{
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*/
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#define TMR0_FLAG_CMP_A (TMR0_STFLR_CMFA)
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#define TMR0_FLAG_CMP_B (TMR0_STFLR_CMFB)
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/**
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* @}
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*/
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/**
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* @defgroup TMR0_Common_Trigger_Sel TMR0 common Trigger source select
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* @{
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*/
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#define TMR0_COM_TRIG1 (AOS_TMR0_HTSSR_COMTRG_EN_0)
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#define TMR0_COM_TRIG2 (AOS_TMR0_HTSSR_COMTRG_EN_1)
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#define TMR0_COM_TRIG_MASk (AOS_TMR0_HTSSR_COMTRG_EN)
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/**
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* @}
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*/
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/**
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* @}
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*/
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/*******************************************************************************
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* Global variable definitions ('extern')
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******************************************************************************/
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/*******************************************************************************
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Global function prototypes (definition in C source)
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******************************************************************************/
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/**
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* @addtogroup TMR0_Global_Functions
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* @{
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*/
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en_result_t TMR0_StructInit(stc_tmr0_init_t* pstcInitStruct);
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en_result_t TMR0_Init(M4_TMR0_TypeDef* TMR0x, uint8_t u8Channel, \
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const stc_tmr0_init_t* pstcTmr0Init);
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void TMR0_DeInit(M4_TMR0_TypeDef* TMR0x);
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void TMR0_Cmd(M4_TMR0_TypeDef* TMR0x, uint8_t u8Channel, \
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en_functional_state_t enNewState);
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void TMR0_IntCmd(M4_TMR0_TypeDef* TMR0x, uint8_t u8Channel, \
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en_functional_state_t enNewState);
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void TMR0_SetClkSrc(M4_TMR0_TypeDef *TMR0x, uint8_t u8Channel, uint32_t u32ClkSrc);
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void TMR0_SetClkDiv(M4_TMR0_TypeDef *TMR0x, uint8_t u8Channel, uint32_t u32ClkDiv);
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void TMR0_HWTrigCmd(M4_TMR0_TypeDef *TMR0x, uint8_t u8Channel, \
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uint32_t u32HWFunc, en_functional_state_t enNewState);
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void TMR0_SetFunc(M4_TMR0_TypeDef *TMR0x, uint8_t u8Channel, uint32_t u32Func);
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void TMR0_SetCntVal(M4_TMR0_TypeDef* TMR0x, uint8_t u8Channel, uint16_t u16Value);
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void TMR0_SetCmpVal(M4_TMR0_TypeDef* TMR0x, uint8_t u8Channel, uint16_t u16Value);
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void TMR0_ClearStatus(M4_TMR0_TypeDef* TMR0x, uint8_t u8Channel);
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void TMR0_SetTriggerSrc(en_event_src_t enEvent);
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void TMR0_ComTriggerCmd(uint32_t u32ComTrig, en_functional_state_t enNewState);
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en_flag_status_t TMR0_GetStatus(const M4_TMR0_TypeDef* TMR0x, uint8_t u8Channel);
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uint16_t TMR0_GetCntVal(const M4_TMR0_TypeDef* TMR0x, uint8_t u8Channel);
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uint16_t TMR0_GetCmpVal(const M4_TMR0_TypeDef* TMR0x, uint8_t u8Channel);
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/**
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* @}
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*/
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#endif /* DDL_TMR0_ENABLE */
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/**
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* @}
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*/
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __HC32F4A0_TMR0_H__ */
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/*******************************************************************************
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* EOF (not truncated)
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******************************************************************************/
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