351 lines
11 KiB
ArmAsm
351 lines
11 KiB
ArmAsm
.extern main /* ÒýÈëÍⲿCÈë¿Ú */
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.extern __bss_beg__
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.extern __bss_end__
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.extern __stack_end__
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.extern __data_beg__
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.extern __data_end__
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.extern __data+beg_src__
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.extern rt_interrupt_enter
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.extern rt_interrupt_leave
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.extern rt_thread_switch_interrput_flag
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.extern rt_interrupt_from_thread
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.extern rt_interrupt_to_thread
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.extern rt_hw_trap_irq
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.global start
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.global endless_loop
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.global rt_hw_context_switch_interrupt_do
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/************* Ä¿±êÅäÖà *************/
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.set UND_STACK_SIZE, 0x00000004
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.set ABT_STACK_SIZE, 0x00000004
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.set FIQ_STACK_SIZE, 0x00000004
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.set IRQ_STACK_SIZE, 0x00000400
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.set SVC_STACK_SIZE, 0x00000400
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.set UND_Stack_Size, 0x00000004
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.set ABT_Stack_Size, 0x00000004
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.set FIQ_Stack_Size, 0x00000004
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.set IRQ_Stack_Size, 0x00000400
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.set SVC_Stack_Size, 0x00000400
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/* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs */
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.set MODE_USR, 0x10 /* User Mode */
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.set MODE_FIQ, 0x11 /* FIQ Mode */
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.set MODE_IRQ, 0x12 /* IRQ Mode */
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.set MODE_SVC, 0x13 /* Supervisor Mode */
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.set MODE_ABT, 0x17 /* Abort Mode */
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.set MODE_UND, 0x1B /* Undefined Mode */
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.set MODE_SYS, 0x1F /* System Mode */
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.set MODE_USR, 0x10 /* User Mode */
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.set Mode_FIQ, 0x11 /* FIQ Mode */
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.set Mode_IRQ, 0x12 /* IRQ Mode */
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.set Mode_SVC, 0x13 /* Supervisor Mode */
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.set Mode_ABT, 0x17 /* Abort Mode */
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.set Mode_UND, 0x1B /* Undefined Mode */
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.set Mode_SYS, 0x1F /* System Mode */
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.equ I_BIT, 0x80 /* when I bit is set, IRQ is disabled */
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.equ F_BIT, 0x40 /* when F bit is set, FIQ is disabled */
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.equ I_Bit, 0x80 /* when I bit is set, IRQ is disabled */
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.equ F_Bit, 0x40 /* when F bit is set, FIQ is disabled */
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/* VPBDIV definitions*/
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.equ VPBDIV, 0xE01FC100
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.set VPBDIV_VALUE, 0x00000000
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/* Phase Locked Loop (PLL) definitions*/
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.equ PLL_BASE, 0xE01FC080
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.equ PLLCON_OFS, 0x00
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.equ PLLCFG_OFS, 0x04
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.equ PLLSTAT_OFS, 0x08
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.equ PLLFEED_OFS, 0x0C
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.equ PLLCON_PLLE, (1<<0) /* PLL Enable */
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.equ PLLCON_PLLC, (1<<1) /* PLL Connect */
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.equ PLLSTAT_LOCK, (1<<10) /* PLL Lock Status */
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.equ PLLCFG_MSEL, ((PLL_MUL - 1) << 0)
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.equ PLLCFG_PSEL, (0x02 << 5)
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.equ PLLCFG_Val, (PLLCFG_MSEL|PLLCFG_PSEL)
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.equ MEMMAP, 0xE01FC040 /*Memory Mapping Control*/
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/* Memory Accelerator Module (MAM) definitions*/
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.equ MAM_BASE, 0xE01FC000
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.equ MAMCR_OFS, 0x00
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.equ MAMTIM_OFS, 0x04
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.equ MAMCR_Val, 0x00000002
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.equ MAMTIM_Val, 0x00000004
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.equ VICIntEnClr, 0xFFFFF014
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.equ VICIntSelect, 0xFFFFF00C
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/************* Ä¿±êÅäÖýáÊø *************/
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/* Setup the operating mode & stack.*/
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/* --------------------------------- */
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.global _start, start, _reset, reset,
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.func _start,
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_start:
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start:
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_reset:
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reset:
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.code 32
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.align 0
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/************************* PLL_SETUP **********************************/
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#if (PLL_MUL>1)
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ldr r0, =PLL_BASE
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mov r1, #0xAA
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mov r2, #0x55
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/* Configure and Enable PLL */
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mov r3, #PLLCFG_Val
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str r3, [r0, #PLLCFG_OFS]
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mov r3, #PLLCON_PLLE
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str r3, [r0, #PLLCON_OFS]
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str r1, [r0, #PLLFEED_OFS]
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str r2, [r0, #PLLFEED_OFS]
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/* Wait until PLL Locked */
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PLL_Locked_loop:
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ldr r3, [r0, #PLLSTAT_OFS]
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ands r3, r3, #PLLSTAT_LOCK
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beq PLL_Locked_loop
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/* Switch to PLL Clock */
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mov r3, #(PLLCON_PLLE|PLLCON_PLLC)
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str r3, [r0, #PLLCON_OFS]
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str r1, [r0, #PLLFEED_OFS]
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str R2, [r0, #PLLFEED_OFS]
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#endif
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/************************* PLL_SETUP **********************************/
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/************************ Setup VPBDIV ********************************/
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ldr r0, =VPBDIV
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ldr r1, =VPBDIV_VALUE
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str r1, [r0]
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/************************ Setup VPBDIV ********************************/
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/************** Setup MAM **************/
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ldr r0, =MAM_BASE
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mov r1, #MAMTIM_Val
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str r1, [r0, #MAMTIM_OFS]
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mov r1, #MAMCR_Val
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str r1, [r0, #MAMCR_OFS]
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/************** Setup MAM **************/
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/************************ setup stack *********************************/
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ldr r0, .LC6 /* LC6:__stack_end__ */
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msr CPSR_c, #MODE_UND|I_BIT|F_BIT /* Undefined Instruction Mode */
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mov sp, r0
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sub r0, r0, #UND_STACK_SIZE
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msr CPSR_c, #MODE_ABT|I_BIT|F_BIT /* Abort Mode */
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mov sp, r0
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sub r0, r0, #ABT_STACK_SIZE
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msr CPSR_c, #MODE_FIQ|I_BIT|F_BIT /* FIQ Mode */
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mov sp, r0
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sub r0, r0, #FIQ_STACK_SIZE
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msr CPSR_c, #MODE_IRQ|I_BIT|F_BIT /* IRQ Mode */
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mov sp, r0
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sub r0, r0, #IRQ_STACK_SIZE
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msr CPSR_c, #MODE_SVC|I_BIT|F_BIT /* Supervisor Mode */
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mov sp, r0
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/************************ setup stack ********************************/
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/************************ Clear BSS ********************************/
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/* Clear BSS. */
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mov a2, #0 /* Fill value */
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mov fp, a2 /* Null frame pointer */
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mov r7, a2 /* Null frame pointer for Thumb */
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ldr r1, .LC1 /* Start of memory block */
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ldr r3, .LC2 /* End of memory block */
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subs r3, r3, r1 /* Length of block */
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beq .end_clear_loop
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mov r2, #0
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.clear_loop:
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strb r2, [r1], #1
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subs r3, r3, #1
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bgt .clear_loop
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.end_clear_loop:
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/* Initialise data. */
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ldr r1, .LC3 /* Start of memory block */
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ldr r2, .LC4 /* End of memory block */
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ldr r3, .LC5
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subs r3, r3, r1 /* Length of block */
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beq .end_set_loop
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.set_loop:
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ldrb r4, [r2], #1
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strb r4, [r1], #1
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subs r3, r3, #1
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bgt .set_loop
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.end_set_loop:
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mov r0, #0 /* no arguments */
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mov r1, #0 /* no argv either */
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bl main
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endless_loop:
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b endless_loop
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.align 0
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.LC1:
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.word __bss_beg__
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.LC2:
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.word __bss_end__
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.LC3:
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.word __data_beg__
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.LC4:
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.word __data_beg_src__
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.LC5:
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.word __data_end__
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.LC6:
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.word __stack_end__
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/*********************** END Clear BSS ******************************/
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/******************** Ìøתµ½ main() ********************/
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LDR R0, =main /* »ñµÃmain()Èë¿ÚµØÖ· */
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BX R0 /* ³¤Ìøתµ½main() */
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/******************** Ìøתµ½ main() ********************/
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/* ±¾¶ÎΪ.startup¶Î ÔÚÁ´½Ó½Å±¾Öб»Á´½Óµ½³ÌÐò×ͷ */
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.section .startup,"ax"
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.code 32
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.align 0
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ldr pc, __start /* reset - _start */
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ldr pc, _undf /* undefined - _undf */
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ldr pc, _swi /* SWI - _swi */
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ldr pc, _pabt /* program abort - _pabt */
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ldr pc, _dabt /* data abort - _dabt */
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//.word 0xB9205F80 /* ĬÈÏ 0xB9205F80 */
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.word 0xB8A06F58 /* 0xB8A06F58 ȫΪ */
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ldr pc, __IRQ_Handler /* IRQ - read the VIC */
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ldr pc, _fiq /* FIQ - _fiq */
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__start:.word _start
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_undf: .word __undf /* undefined */
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_swi: .word __swi /* SWI */
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_pabt: .word __pabt /* program abort */
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_dabt: .word __dabt /* data abort */
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temp1: .word 0
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__IRQ_Handler: .word IRQ_Handler
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_fiq: .word __fiq /* FIQ */
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__undf: b . /* undefined */
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__swi : b .
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__pabt: b . /* program abort */
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__dabt: b . /* data abort */
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__fiq : b . /* FIQ */
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/* IRQÈë¿Ú */
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IRQ_Handler :
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stmfd sp!, {r0-r12,lr} /* ¶ÔR0 ¨C R12£¬LR¼Ä´æÆ÷ѹջ */
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bl rt_interrupt_enter /* ֪ͨRT-Thread½øÈëÖжÏģʽ */
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bl rt_hw_trap_irq /* ÏàÓ¦ÖжϷþÎñÀý³Ì´¦Àí */
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bl rt_interrupt_leave /* ; ֪ͨRT-ThreadÒªÀ뿪ÖжÏģʽ */
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/* Èç¹ûÉèÖÃÁËrt_thread_switch_interrput_flag£¬½øÐÐÖжÏÖеÄÏß³ÌÉÏÏÂÎÄ´¦Àí */
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ldr r0, =rt_thread_switch_interrput_flag
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ldr r1, [r0]
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cmp r1, #1
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beq rt_hw_context_switch_interrupt_do /* ÖжÏÖÐÇл»·¢Éú */
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/* Èç¹ûÌøתÁË£¬½«²»»á»ØÀ´ */
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ldmfd sp!, {r0-r12,lr} /* »Ö¸´Õ» */
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subs pc, lr, #4 /* ´ÓIRQÖзµ»Ø */
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/*
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* void rt_hw_context_switch_interrupt_do(rt_base_t flag)
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* ÖжϽáÊøºóµÄÉÏÏÂÎÄÇл»
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*/
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rt_hw_context_switch_interrupt_do:
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mov r1, #0 /* clear flag */
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/* Çå³þÖжÏÖÐÇл»±êÖ¾ */
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str r1, [r0] /* */
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ldmfd sp!, {r0-r12,lr}/* reload saved registers */
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/* ÏȻָ´±»ÖжÏÏ̵߳ÄÉÏÏÂÎÄ */
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stmfd sp!, {r0-r3} /* save r0-r3 */
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/* ¶ÔR0 ¨C R3ѹջ£¬ÒòΪºóÃæ»áÓõ½ */
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mov r1, sp /* °Ñ´Ë´¦µÄÕ»Öµ±£´æµ½R1 */
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add sp, sp, #16 /* restore sp */
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/* »Ö¸´IRQµÄÕ»£¬ºóÃæ»áÌø³öIRQģʽ */
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sub r2, lr, #4 /* save old task's pc to r2 */
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/* ±£´æÇл»³öÏ̵߳ÄPCµ½R2 */
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mrs r3, spsr /* disable interrupt ±£´æÖжÏÇ°µÄCPSRµ½R3¼Ä´æÆ÷ */
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/* »ñµÃSPSR¼Ä´æÆ÷Öµ */
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orr r0, r3, #I_BIT|F_BIT
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msr spsr_c, r0 /* ¹Ø±ÕSPSRÖеÄIRQ/FIQÖÐ¶Ï */
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ldr r0, =.+8 /* °Ñµ±Ç°µØÖ·+8ÔØÈëµ½R0¼Ä´æÆ÷ÖÐ switch to interrupted task's stack */
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movs pc, r0 /* Í˳öIRQģʽ£¬ÓÉÓÚSPSR±»ÉèÖóɹØÖжÏģʽ */
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/* ËùÒÔ´ÓIRQ·µ»Øºó£¬Öжϲ¢Ã»Óдò¿ª
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; R0¼Ä´æÆ÷ÖеÄλÖÃʵ¼Ê¾ÍÊÇÏÂÒ»ÌõÖ¸Á
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; ¼´PC¼ÌÐøÍùÏÂ×ß
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; ´Ëʱ
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; ģʽÒѾ»»³ÉÖжÏÇ°µÄSVCģʽ£¬
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; SP¼Ä´æÆ÷Ò²ÊÇSVCģʽϵÄÕ»¼Ä´æÆ÷
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; R1±£´æIRQģʽϵÄÕ»Ö¸Õë
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; R2±£´æÇл»³öÏ̵߳ÄPC
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; R3±£´æÇл»³öÏ̵߳ÄCPSR */
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stmfd sp!, {r2} /* push old task's pc */
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/* ±£´æÇл»³öÈÎÎñµÄPC */
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stmfd sp!, {r4-r12,lr}/* push old task's lr,r12-r4 */
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/* ±£´æR4 ¨C R12£¬LR¼Ä´æÆ÷ */
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mov r4, r1 /* Special optimised code below */
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/* R1±£´æÓÐѹջR0 ¨C R3´¦µÄջλÖà */
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mov r5, r3 /* R3Çл»³öÏ̵߳ÄCPSR */
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ldmfd r4!, {r0-r3} /* »Ö¸´R0 ¨C R3 */
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stmfd sp!, {r0-r3} /* push old task's r3-r0 */
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/* R0 ¨C R3ѹջµ½Çл»³öÏß³Ì */
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stmfd sp!, {r5} /* push old task's psr */
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/* Çл»³öÏß³ÌCPSRѹջ */
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mrs r4, spsr
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stmfd sp!, {r4} /* push old task's spsr */
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/* Çл»³öÏß³ÌSPSRѹջ */
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ldr r4, =rt_interrupt_from_thread
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ldr r5, [r4]
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str sp, [r5] /* store sp in preempted tasks's TCB */
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/* ±£´æÇл»³öÏ̵߳ÄSPÖ¸Õë */
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ldr r6, =rt_interrupt_to_thread
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ldr r6, [r6]
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ldr sp, [r6] /* get new task's stack pointer */
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/* »ñµÃÇл»µ½Ï̵߳ÄÕ» */
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ldmfd sp!, {r4} /* pop new task's spsr */
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/* »Ö¸´SPSR */
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msr SPSR_cxsf, r4
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ldmfd sp!, {r4} /* pop new task's psr */
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/* »Ö¸´CPSR */
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msr CPSR_cxsf, r4
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ldmfd sp!, {r0-r12,lr,pc} /* pop new task's r0-r12,lr & pc */
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/* »Ö¸´R0 ¨C R12£¬LR¼°PC¼Ä´æÆ÷ */
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/* ´úÂë¼ÓÃܹ¦ÄÜ */
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#if defined(CODE_PROTECTION)
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.org 0x01FC
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.word 0x87654321
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#endif
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