336 lines
8.0 KiB
C
336 lines
8.0 KiB
C
/*
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* Copyright (c) 2006-2022, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-07-1 Rbb666 first version
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*/
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#include "drv_gpio.h"
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#ifdef RT_USING_PIN
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#define PIN_GET(pin) ((uint8_t)(((uint8_t)pin) & 0x07U))
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#define PORT_GET(pin) ((uint8_t)(((uint8_t)pin) >> 3U))
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#define __IFX_PORT_MAX 15u
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#define PIN_IFXPORT_MAX __IFX_PORT_MAX
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static const struct pin_irq_map pin_irq_map[] =
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{
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{CYHAL_PORT_0, ioss_interrupts_gpio_0_IRQn},
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{CYHAL_PORT_1, ioss_interrupts_gpio_1_IRQn},
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{CYHAL_PORT_2, ioss_interrupts_gpio_2_IRQn},
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{CYHAL_PORT_3, ioss_interrupts_gpio_3_IRQn},
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{CYHAL_PORT_4, ioss_interrupts_gpio_4_IRQn},
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{CYHAL_PORT_5, ioss_interrupts_gpio_5_IRQn},
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{CYHAL_PORT_6, ioss_interrupts_gpio_6_IRQn},
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{CYHAL_PORT_7, ioss_interrupts_gpio_7_IRQn},
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{CYHAL_PORT_8, ioss_interrupts_gpio_8_IRQn},
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{CYHAL_PORT_9, ioss_interrupts_gpio_9_IRQn},
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{CYHAL_PORT_10, ioss_interrupts_gpio_10_IRQn},
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{CYHAL_PORT_11, ioss_interrupts_gpio_11_IRQn},
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{CYHAL_PORT_12, ioss_interrupts_gpio_12_IRQn},
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{CYHAL_PORT_13, ioss_interrupts_gpio_13_IRQn},
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{CYHAL_PORT_14, ioss_interrupts_gpio_14_IRQn},
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};
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static struct rt_pin_irq_hdr pin_irq_handler_tab[] =
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{
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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{-1, 0, RT_NULL, RT_NULL},
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};
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rt_inline void pin_irq_handler(int irqno)
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{
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if (pin_irq_handler_tab[irqno].hdr)
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{
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pin_irq_handler_tab[irqno].hdr(pin_irq_handler_tab[irqno].args);
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}
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}
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void gpio_exint_handler(uint16_t GPIO_Port)
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{
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pin_irq_handler(GPIO_Port);
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}
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/* interrupt callback definition*/
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static void irq_callback(void *callback_arg, cyhal_gpio_event_t event)
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{
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/* To avoid compiler warnings */
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(void) callback_arg;
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(void) event;
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/* enter interrupt */
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rt_interrupt_enter();
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gpio_exint_handler(*(rt_uint16_t *)callback_arg);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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cyhal_gpio_callback_data_t irq_cb_data;
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static void ifx_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
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{
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rt_uint16_t gpio_pin;
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if (PORT_GET(pin) < PIN_IFXPORT_MAX)
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{
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gpio_pin = pin;
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}
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else
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{
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return;
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}
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switch (mode)
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{
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case PIN_MODE_OUTPUT:
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cyhal_gpio_init(gpio_pin, CYHAL_GPIO_DIR_OUTPUT, CYHAL_GPIO_DRIVE_STRONG, true);
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break;
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case PIN_MODE_INPUT:
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cyhal_gpio_init(gpio_pin, CYHAL_GPIO_DIR_INPUT, CYHAL_GPIO_DRIVE_NONE, false);
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break;
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case PIN_MODE_INPUT_PULLUP:
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cyhal_gpio_init(gpio_pin, CYHAL_GPIO_DIR_BIDIRECTIONAL, CYHAL_GPIO_DRIVE_PULLUP, true);
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break;
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case PIN_MODE_INPUT_PULLDOWN:
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cyhal_gpio_init(gpio_pin, CYHAL_GPIO_DIR_BIDIRECTIONAL, CYHAL_GPIO_DRIVE_PULLDOWN, false);
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break;
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case PIN_MODE_OUTPUT_OD:
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cyhal_gpio_init(gpio_pin, CYHAL_GPIO_DIR_BIDIRECTIONAL, CYHAL_GPIO_DRIVE_PULLUP, true);
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break;
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}
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}
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static void ifx_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
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{
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rt_uint16_t gpio_pin;
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if (PORT_GET(pin) < PIN_IFXPORT_MAX)
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{
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gpio_pin = pin;
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}
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else
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{
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return;
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}
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cyhal_gpio_write(gpio_pin, value);
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}
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static int ifx_pin_read(rt_device_t dev, rt_base_t pin)
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{
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rt_uint16_t gpio_pin;
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if (PORT_GET(pin) < PIN_IFXPORT_MAX)
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{
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gpio_pin = pin;
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}
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else
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{
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return -RT_ERROR;
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}
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return cyhal_gpio_read(gpio_pin);
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}
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static rt_err_t ifx_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
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rt_uint32_t mode, void (*hdr)(void *args), void *args)
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{
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rt_uint16_t gpio_port;
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rt_uint16_t gpio_pin;
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rt_base_t level;
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if (PORT_GET(pin) < PIN_IFXPORT_MAX)
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{
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gpio_port = PORT_GET(pin);
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gpio_pin = pin;
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}
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else
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{
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return -RT_ERROR;
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}
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level = rt_hw_interrupt_disable();
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if (pin_irq_handler_tab[gpio_port].pin == pin &&
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pin_irq_handler_tab[gpio_port].hdr == hdr &&
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pin_irq_handler_tab[gpio_port].mode == mode &&
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pin_irq_handler_tab[gpio_port].args == args)
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{
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rt_hw_interrupt_enable(level);
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return RT_EOK;
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}
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if (pin_irq_handler_tab[gpio_port].pin != -1)
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{
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rt_hw_interrupt_enable(level);
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return RT_EBUSY;
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}
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pin_irq_handler_tab[gpio_port].pin = pin;
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pin_irq_handler_tab[gpio_port].hdr = hdr;
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pin_irq_handler_tab[gpio_port].mode = mode;
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pin_irq_handler_tab[gpio_port].args = args;
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rt_hw_interrupt_enable(level);
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return RT_EOK;
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}
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static rt_err_t ifx_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
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{
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rt_uint16_t gpio_port;
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rt_uint16_t gpio_pin;
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rt_base_t level;
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if (PORT_GET(pin) < PIN_IFXPORT_MAX)
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{
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gpio_port = PORT_GET(pin);
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gpio_pin = pin;
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}
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else
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{
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return -RT_ERROR;
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}
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level = rt_hw_interrupt_disable();
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if (pin_irq_handler_tab[gpio_port].pin == -1)
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{
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rt_hw_interrupt_enable(level);
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return RT_EOK;
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}
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pin_irq_handler_tab[gpio_port].pin = -1;
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pin_irq_handler_tab[gpio_port].hdr = RT_NULL;
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pin_irq_handler_tab[gpio_port].mode = 0;
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pin_irq_handler_tab[gpio_port].args = RT_NULL;
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rt_hw_interrupt_enable(level);
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return RT_EOK;
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}
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static rt_err_t ifx_pin_irq_enable(struct rt_device *device, rt_base_t pin,
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rt_uint32_t enabled)
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{
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rt_uint16_t gpio_port;
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rt_uint16_t gpio_pin;
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rt_base_t level;
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rt_uint8_t pin_irq_mode;
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const struct pin_irq_map *irqmap;
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if (PORT_GET(pin) < PIN_IFXPORT_MAX)
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{
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gpio_port = PORT_GET(pin);
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gpio_pin = pin;
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}
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else
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{
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return -RT_ERROR;
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}
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if (enabled == PIN_IRQ_ENABLE)
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{
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level = rt_hw_interrupt_disable();
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if (pin_irq_handler_tab[gpio_port].pin == -1)
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{
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rt_hw_interrupt_enable(level);
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return -RT_EINVAL;
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}
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irqmap = &pin_irq_map[gpio_port];
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irq_cb_data.callback = irq_callback;
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irq_cb_data.callback_arg = (rt_uint16_t *)&pin_irq_map[gpio_port].port;
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cyhal_gpio_register_callback(gpio_pin, &irq_cb_data);
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Cy_GPIO_ClearInterrupt(CYHAL_GET_PORTADDR(gpio_pin), CYHAL_GET_PIN(gpio_pin));
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switch (pin_irq_handler_tab[gpio_port].mode)
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{
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case PIN_IRQ_MODE_RISING:
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pin_irq_mode = CYHAL_GPIO_IRQ_RISE;
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break;
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case PIN_IRQ_MODE_FALLING:
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pin_irq_mode = CYHAL_GPIO_IRQ_FALL;
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break;
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case PIN_IRQ_MODE_RISING_FALLING:
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pin_irq_mode = CYHAL_GPIO_IRQ_BOTH;
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break;
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default:
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break;
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}
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cyhal_gpio_enable_event(gpio_pin, pin_irq_mode, GPIO_INTERRUPT_PRIORITY, RT_TRUE);
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rt_hw_interrupt_enable(level);
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}
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else if (enabled == PIN_IRQ_DISABLE)
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{
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level = rt_hw_interrupt_disable();
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Cy_GPIO_Port_Deinit(CYHAL_GET_PORTADDR(gpio_pin));
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#if !defined(COMPONENT_CAT1C)
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IRQn_Type irqn = (IRQn_Type)(irqmap->irqno + PORT_GET(irqmap->port));
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#endif
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_cyhal_irq_disable(irqn);
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rt_hw_interrupt_enable(level);
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}
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else
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{
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return -RT_EINVAL;
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}
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return RT_EOK;
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}
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const static struct rt_pin_ops _ifx_pin_ops =
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{
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ifx_pin_mode,
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ifx_pin_write,
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ifx_pin_read,
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ifx_pin_attach_irq,
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ifx_pin_dettach_irq,
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ifx_pin_irq_enable,
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RT_NULL,
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};
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int rt_hw_pin_init(void)
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{
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return rt_device_pin_register("pin", &_ifx_pin_ops, RT_NULL);
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}
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#endif /* RT_USING_PIN */
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